Circuit Description
The circuit is a three-stage design, with the qualification that a cascoded amplifier is a
single stage (although it employs two active devices).
The input stage consists of a differential amplifier pair, with a common mode rejection
ratio of 90 db. This differential amplifier is cascoded and biased with an active current
source for each of the differential pair. The next gain stage is a complimentary push-pull
cascoded common emitter amplifier. The final gain stage is a complimentary push-pull
source follower MOSFET output stage using 4 power MOSFETS per channel.
The feedback configuration employs a negligible feedback loop arrangement, where 28
db of feedback is applied at DC to provide DC offset stability. Negative feedback is
rolled off above that frequency at a rate of 12 db per octave, so that when the feedback
frequency is 20 Hz, the feedback applied is 7 db., at 1 kHz, the negative feedback
applied is .3 db.
This configuration eliminates the use of an integrated circuit operational amplifier and its
attendant signal colorations. Cascoding the voltage gain stages enables the extremely
wide bandwidth and high slew rate. The high damping factor of 100 is achieved by using
the ultra high current gain of the complimentary push-pull cascoded common emitter
amplifier driving the high-gain power MOSFETS. Since the driver and output stage
circuits maintain full gain over the 20 Hz to 20 kHz bandwidth, the damping factor is
maintained at all audible frequencies. This means that high frequency control of the
