Maxim Integrated MAX20335 User manual

General Description
The MAX20335 is a battery-charge-management solution
ideal for low-power wearable applications. The device
includes a linear battery charger with a smart power
selector and several power-optimized peripherals. The
MAX20335 features two ultra-low quiescent current buck
regulators and three ultra-low quiescent current low-dropout
(LDO) linear regulators, providing up to five regulated
voltages, each with an ultra-low quiescent current, allows
designers to minimize power consumption and extend
battery life in 24/7 operation devices, such as those in the
wearable market.
The battery charger features a smart power selector that
allows operation on a dead battery when connected to a
power source. To avoid overloading a power adapter, the
input current to the smart power selector is limited based
on an I2C register setting. If the charger power source
is unable to supply the entire system load, the smart
power control circuit supplements the system load with
current from the battery. The charger also supports
temperature dependent charge currents.
The two synchronous, high-efficiency step-down buck
regulators feature a variable frequency mode for increased
efficiency during light-load operation. The output voltage
of these regulators can be programmed through I2C
with the default preconfigured. The buck regulators can
support dynamic voltage scaling to further improve
system power consumption.
The three configurable LDOs each have a dedicated
input pin. Each LDO regulator output voltage can be
programmed through I2C with the default preconfigured.
The linear regulators can also be configured to operate
as power switches that may be used to disconnect the
quiescent load of the system peripherals.
The MAX20335 features a programmable power controller
that allows the device to be configured for applications
that require the device be in a true-off, or always-on,
state. The controller also provides a delayed reset signal
and voltage sequencing.
The MAX20335 is available in a 36-bump, 0.4mm pitch,
2.72mm x 2.47mm wafer-level package (WLP).
Benets and Features
●Extend System Use Time Between Battery Charging
• Dual Ultra-Low-IQ200mA Buck Regulators
• Output Programmable from 0.7V to 2.275V and
0.7V to 3.85V
• 0.9μA (typ) Quiescent Current (Buck 1)
• Optional Fixed Peak-Current Mode to Optimize
Ripple Frequency in Noise-Sensitive Applications
• Three Ultra-Low-IQ 100mA LDOs
• LDO1
• Output Programmable from 0.8V to 3.6V
• 0.6μA (typ) Quiescent Current
• 2.7V to 5.5V Input with Dedicated Pin
• LDO2/3
• Output Programmable from 0.9V to 4V
• 1μA (typ) Quiescent Current
• 1.71V to 5.5V Input with Dedicated Pin
●Easy-to-Implement Li+ Battery Charging
• Smart Power Selector
• 28V/-5.5V Tolerant Input
• Thermistor Monitor
●Minimize Solution Footprint Through High Integration
• Provides Five Regulated Voltage Rails
• Switch Mode Option on Each LDO
●Optimize System Control
• Monitors Pushbutton for Ultra-Low Power Mode
• Power-On Reset Delay and Voltage Sequencing
• On-Chip Voltage Monitor Multiplexer
Applications
●Wearable Electronics
●Fitness Monitors
●Rechargeable IoT devices
19-100288; Rev 6 6/21
Ordering Information appears at end of data sheet.
MAX20335 PMIC with Ultra-Low IQVoltage Regulators and
Battery Chargers for Small Lithium Ion Systems
Click here for production status of specific part numbers.

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TABLE OF CONTENTS
General Description ............................................................................ 1
Benefits and Features .......................................................................... 1
Applications .................................................................................. 1
Typical Application Circuit ....................................................................... 5
Absolute Maximum Ratings ...................................................................... 6
Package Information ........................................................................... 6
Electrical Characteristics ........................................................................ 7
Typical Operating Characteristics ................................................................ 22
Bump Configuration ........................................................................... 25
Bump Description............................................................................. 25
Block Diagram ............................................................................... 27
Detailed Description........................................................................... 27
Power Regulation ...........................................................................27
Power On/Off and Reset Control ...............................................................27
Power Sequencing ..........................................................................30
Smart Power Selector........................................................................31
Thermal Current Regulation ...................................................................31
System Load Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Input Limiter ...............................................................................32
Fast-Charge Current Setting...................................................................33
Thermistor Monitoring with Charger Shutdown ....................................................33
I2C Interface ...............................................................................35
I2C Addresses..............................................................................35
Thermistor Monitoring with Charger Shutdown ....................................................36
I2C Interface................................................................................. 38
Start, Stop, And Repeated Start Conditions ....................................................38
Slave Address ...........................................................................38
Bit Transfer..............................................................................38
Single-Byte Write .........................................................................38
Burst Write ..............................................................................39
Single Byte Read .........................................................................39
Burst Read ..............................................................................40
Acknowledge Bits.........................................................................40
I2C Register Map ..............................................................................41
I2C Register Descriptions....................................................................... 43

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TABLE OF CONTENTS (continued)
Applications Information........................................................................ 63
Inductor Selection ...........................................................................63
Output Capacitor Selection....................................................................63
Input Capacitor Selection .....................................................................63
PCB Layout and Routing .....................................................................63
Ordering Information .......................................................................... 66
Chip Information.............................................................................. 66
Revision History .............................................................................. 67
LIST OF FIGURES
LIST OF TABLES
Table 1. Power Function Input Control Modes....................................................... 28
Table 2. Thermistor Monitoring/JEITA Monitoring Enable Control........................................ 35
Table 3. I2C Slave Addresses ................................................................... 38
Table 4. ChipId Register (0x00) .................................................................. 43
Table 5. ChipRev Register (0x01) ................................................................ 43
Table 6. StatusA Register (0x02) ................................................................. 43
Table 7. StatusB Register (0x03) ................................................................. 44
Figure 1. Power Function Input Control Modes Flow Diagrams ......................................... 29
Figure 2a. Power-On Sequencing ................................................................ 30
Figure 2b. Power-On Sequencing Without Battery ................................................... 31
Figure 3. Smart Power Selector Current/Voltage Behavior............................................. 32
Figure 4a. Charging Behavior Using Thermistor Monitoring Mode ....................................... 34
Figure 4b. Charging Behavior Using JEITA Monitoring 1 and 2 Modes ................................... 34
Figure 5a. Charger State Diagram (Thermistor Monitoring with Charger Shutdown) ......................... 36
Figure 5b. Battery Charger State Diagram (JEITA Monitoring with Charger Shutdown)....................... 37
Figure 6. I2C START, STOP and REPEATED START Conditions ....................................... 38
Figure 7. Write Byte Sequence .................................................................. 38
Figure 8. Burst Write Sequence.................................................................. 39
Figure 9. Read Byte Sequence .................................................................. 39
Figure 10. Burst Read Sequence................................................................. 40
Figure 11. Acknowledge........................................................................ 40

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LIST OF TABLES (continued)
Table 8. StatusC Register (0x04) ................................................................. 45
Table 9. IntA Register (0x05) .................................................................... 46
Table 10. IntB Register (0x06) ................................................................... 46
Table 11. IntMaskA Register (0x07)............................................................... 47
Table 12. IntMaskB Register (0x08)............................................................... 48
Table 13. ILimCntl Register (0x09)................................................................ 48
Table 14. ChgCntlA Register (0x0A) .............................................................. 49
Table 15. ChgCntlB Register (0x0B) .............................................................. 50
Table 16. ChTmr Register (0x0C)................................................................. 51
Table 17. Buck1Cfg Register (0x0D) .............................................................. 52
Table 18. Buck1VSet Register (0x0E) ............................................................. 53
Table 19. Buck2Cfg Register (0x0F) .............................................................. 53
Table 20. Buck2VSet Register (0x10) ............................................................. 54
Table 21. Buck1/2ISet Register (0x11) ............................................................. 54
Table 22. LDO1Cfg Register (0x12) ............................................................... 55
Table 23. LDO1VSet Register (0x13) .............................................................. 55
Table 24. LDO2Cfg Register (0x14) ............................................................... 56
Table 25. LDO2VSet Register (0x15).............................................................. 56
Table 26. LDO3Cfg Register (0x16)............................................................... 57
Table 27. LDO3VSet Register (0x17) .............................................................. 57
Table 28. ThrmCfg Register (0x18) ............................................................... 58
Table 29. ThrmCfg Register (0x19) ............................................................... 59
Table 30. MONCfg Register (0x1A) ............................................................... 59
Table 31. BootCfg Register (0x1B)................................................................ 60
Table 32. PinStat Register (0x1C) ................................................................ 60
Table 33. Buck1/2Extra Control Register (0x1D) ..................................................... 61
Table 34. PwrCfg Register (0x1E) ................................................................ 62
Table 35. PwrCmd Register (0x1F) ............................................................... 62
Table 36. Suggested Inductors .................................................................. 63
Table 37. Output Capacitor Values* ............................................................... 63
Table 38. Register Bit Default Values ............................................................. 64
Table 39. Register Default Values ................................................................ 65

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Typical Application Circuit
Li+ BATTERY
CHARGER WITH
SMART POWER
SELECTOR
BAT
THM
CAP
SYS
CHGIN
SET
MUX/
DIVIDER
SCL
SDA
INT
MPC0
CONTROL
GND
MAX20335
VSYS
VIO
L3OUT
L3IN
MPC1BUCK 2
B2LX
BUCK 1
B1OUT
B1LX
LDO/
SWITCH 1
L1IN
L1OUT
L2IN
1µF
1µF 1µF
10µF
10µF
10µF
1µF
2.2µH
SCL
SDA
INT
MPC0
MPC1
LDO/
SWITCH 2
LDO/
SWITCH 3
B2OUT
L2OUT
VSYS
VSYS
VSYS
PFN2
PFN1
PFN2
MON
1µF
1µF
2.2µH
LED
EXT
MON
* OPTIONAL EXTERNAL FET
VL3
VL2
VB2
VB1
VL1
VSYS
RST RST
(*)

(Voltages referenced to GND.)
SDA, SCL, THM, RST, SYS, PFN1, PFN2,
MPC0, MPC1, INT, MON, BAT, LED,
L1IN, L2IN, L3IN.............................................. -0.3V to +6.0V
B1LX, B2LX, B1OUT, B2OUT, EXT ...... -0.3V to (VSYS + 0.3V)
L1OUT................................................... -0.3V to (VL1IN + 0.3V)
L2OUT................................................... -0.3V to (VL2IN + 0.3V)
L3OUT................................................... -0.3V to (VL3IN + 0.3V)
CHGIN .................................................................... -6V to +30V
CAP ................................... -0.3V to min (|VCHGIN| + 0.3V, +6V)
SET .......................................................... -0.3V to VBAT + 0.3V
Continuous Current into CHGIN, BAT, SYS ................±1000mA
Continuous Current into any other terminal ..................±100mA
Continuous Power Dissipation (multilayer board at +70°C):
6 x 6 Array 36-Bump 2.72mm x 2.47mm
0.4mm Pitch WLP (derate 21.70mW/°C).......................1.74W
Operating Temperature Range........................... -40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range ............................ -65°C to +150°C
Soldering Temperature (reflow) .......................................+260°C
PACKAGE TYPE: 36 WLP
Package Code W362D2+1
Outline Number 21-0897
Land Pattern Number Refer to Application Note 1891
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θJA) 46°C/W
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Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; functional operation of the device at these or any
other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package Information

(VCHGIN = 5.0V, VBAT = 3.7V, TA= -40°C to +85°C, all registers in their default state, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
GLOBAL SUPPLY CURRENT (L_IN Connected to SYS)
Charger Input Current ICHG
All functions disabled 0.26
mA
Power on, VCHGIN = 5V
SYS switch closed, buck regulators
enabled, LDO1 enabled, ISYS = 0A,
IB_OUT = 0A, IL_OUT = 0A
1.5
BAT Input Current IBAT
Power o, VCHGIN = 0V,
SYS switch open 0.96 1.7
µA
Power on, VCHGIN = 0V
SYS switch closed, 2x buck
regulators enabled, LDOs disabled.
ISYS = 0A, IB_OUT = 0A
2.8 4.3
Power on, VCHGIN = 0V SYS switch
closed, 2x buck regulators enabled,
LDO1 enabled, ISYS = 0A, IB_OUT =
0A, IL_OUT = 0A
3.5 7
Power on, VCHGIN = 0V
SYS switch closed, 2x buck
regulators enabled, 3x LDOs
enabled, ISYS = 0A, IB_OUT = 0A,
IL_OUT = 0A
5.2
BUCK REGULATOR 1
(VSYS = +3.7V, L = 2.2µH, C = 2.2µF, VB1OUT = 1.2V)
Input Voltage VIN_BUCK1 Input voltage = VSYS 2.7 5.5 V
Output Voltage VOUT_BUCK1 25mV step resolution 0.7 2.275 V
Output UVLO Voltage VUVLO_BUCK1
Note: For VOUT < UVLO ZC is
imposed. Falling edge (75mV typ
hysteresis)
0.35 0.55 V
Quiescent Supply
Current IQ_BUCK1
Buck enabled, IB1OUT = 0mA,
VSYS = 3.7V, VB1OUT = 1.2V
(Note 2)
0.9 1.3 µA
Dropout Quiescent
Supply Current IQDO_BUCK1 IB1OUT = 0mA, (VSYS – VOUT)
≤ 0.1V 1.1 mA
Shutdown Supply
Current with Active
Discharge Enabled
ISD_BUCK1 Buck1 disabled. Falling edge (75mV typ
hysterisis) 60 µA
Output Accuracy ACCBUCK1 IB1OUT = 1mA -2.5 +2.5 %
Peak-to-Peak Ripple VPPRIPPLE1 Buck1ISet = 100mA, COUT = 2.2µF,
IB1OUT = 1mA 10 mV
IPEAK Set Range IPEAK_BUCK1 25mA step resolution set by
Buck1ISet[3:0]. 50 375 mA
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Electrical Characteristics

(VCHGIN = 5.0V, VBAT = 3.7V, TA= -40°C to +85°C, all registers in their default state, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Load Regulation Error VLOADR_BUCK1
Buck1ISet = 150mA,
Buck1IAdptEnb = 0,
IB1OUT = 300mA
-3 %
Line Regulation Error VLINER_BUCK1 VB1OUT = 1.2V; VSYS from 2.7V
to 5.5V 3 mV
Maximum Operating
Output Current IOUT_BUCK1
VSYS = 3.7V, Buck1VSet = 1.2V,
Buck1ISet = 200mA, Buck1IAdptEnb
= 0, load regulation error = -5%
200 500 mA
B1OUT Pulldown
Current ILEAK_B1OUT Buck1 enabled 110 nA
B1OUT Pulldown
Resistance RPD_B1OUT Buck1 disabled, VB1OUT = 1.2V 12 MΩ
pMOS On-Resistance RONP_BUCK1 Buck1FFET = 0 0.27 0.5 Ω
Buck1FFET = 1 0.55 1 Ω
nMOS On-Resistance RONN_BUCK1 Buck1FFET = 0 0.24 0.45 Ω
Buck1FFET = 1 0.43 0.9 Ω
Freewheeling
On-Resistance RONFW_BUCK1 VSYS = 3.7V, VB1OUT = 1.2V 7.3 13 Ω
Minimum TON TON_MIN 40 80 ns
Maximum Duty Cycle DMAX_BUCK1 Buck1IAdptEnb = 0 98 %
Switching Frequency fSW_BUCK1 Load regulation error = -3% 3 MHz
Average Current During
Short-Circuit to GND ISHRT_BUCK1 Buck1ISet = 150mA,
Buck1IAdptEnb = 0, VB1OUT = 0V 100 mA
BLX Leakage Current IBLX_BUCK1 0.005 1µA
Active Discharge Current IPD_BUCK1 VB1OUT = 1.2V 17 mA
Passive Discharge
Resistance RPD_BUCK1 VB1OUT = 1.2V 9kΩ
Full Turn-On Time tON_BUCK1 Time from enable to full current
capability, Buck1Fst = 0 58 ms
Eciency EBUCK1
ILOAD = 10mA, Buck1ISet = 150mA,
Inductor = BOURNS SRP2010-
2R2M, VB1OUT = 1.2V
87 %
BLX Rising/Falling Slew
Rate SRBLX_BUCK1 Buck1LowEMI = 0 2V/ns
Buck1LowEMI = 1 0.5
Thermal-Shutdown
Temperature TSHDN_BUCK1 140 °C
Thermal-Shutdown
Temperature Hysteresis TSHDN_HYST_BUCK1 10 °C
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Electrical Characteristics (continued)

(VCHGIN = 5.0V, VBAT = 3.7V, TA= -40°C to +85°C, all registers in their default state, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
BUCK REGULATOR 2
(VSYS = +3.7V, L = 2.2µH, C = 2.2µF, VB2OUT = 1.2V)
Input Voltage VIN_BUCK2 Input voltage = VSYS 2.7 5.5 V
Output Voltage VOUT_BUCK2 50mV step resolution 0.7 3.85 V
Output UVLO Voltage VUVLO_BUCK2
Note: For VOUT < UVLO ZC is
imposed. Falling edge (75mV typ
hysteresis)
0.35 0.55 V
Quiescent Supply
Current IQ_BUCK2
Buck enabled, IB2OUT = 0mA,
VSYS = 3.7V, VB2OUT = 1.2V
(Note 2)
1 1.4 µA
Dropout Quiescent
Supply Current IQDO_BUCK2
IB2OUT = 0mA, VSYS – VB2OUT
≤ 0.1V 1.1 mA
Shutdown Supply
Current with Active
Discharge Enabled
ISD_BUCK2 Buck1 disabled, Buck2ActDSC = 1. 60 µA
Output Accuracy ACCBUCK2 IB2OUT = 1mA, VB2OUT < 3.4V -2.5 +2.5 %
Peak-to-Peak Ripple VPPRIPPLE2
Buck2ISet = 100mA, COUT = 2.2µF,
IB2OUT = 1mA 10 mV
IPEAK Set Range IPEAK_BUCK2
25mA step resolution set by
Buck2ISet[3:0]. 50 375 mA
Load Regulation Error VLOADR_BUCK2
Buck2ISet = 150mA,
Buck2IAdptEnb = 0, IB2OUT =
300mA
-3 %
Line Regulation Error VLINER_BUCK2
VB2OUT = 1.2V; VSYS from 2.7V
to 5.5V 3 mV
Maximum Operating
Output Current IOUT_BUCK2
VSYS = 3.7V, Buck2VSet = 1.2V,
Buck2ISet = 200mA, Buck2IAdptEnb
= 0, load regulation = -5%
200 500 mA
B2OUT Pulldown
Current ILEAK_B2OUT Buck2 enabled 220 nA
B2OUT Pulldown
Resistance RPD_B2OUT Buck2 disabled, VB2OUT = 1.2V 6MΩ
pMOS On-Resistance RONP_BUCK2
Buck2FFET = 0 0.27 0.5 Ω
Buck2FFET = 1 0.55 1 Ω
nMOS On-Resistance RONN_BUCK2
Buck2FFET = 0 0.24 0.45 Ω
Buck2FFET = 1 0.43 0.9 Ω
Freewheeling
On-Resistance RONFW_BUCK2 VSYS = 3.7V, VB2OUT = 1.2V 7.3 13 Ω
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Electrical Characteristics (continued)

(VCHGIN = 5.0V, VBAT = 3.7V, TA= -40°C to +85°C, all registers in their default state, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Minimum TON TON_MIN 40 80 ns
Maximum Duty Cycle DMAX_BUCK2 Buck2IAdptEnb = 0 98 %
Switching Frequency fSW_BUCK2 Load regulation error = -3% 3 MHz
Average Current During
Short-Circuit to GND ISHRT_BUCK2
Buck2ISet = 150mA,
Buck2IAdptEnb = 0, VB2OUT = 0V 100 mA
BLX Leakage Current IBLX_BUCK2 0.005 1µA
Active Discharge Current IPD_BUCK2 VB2OUT = 1.2V 17 mA
Passive Discharge
Resistance RPD_BUCK2 VB2OUT = 1.2V 9kΩ
Full Turn-On Time TON_BUCK2
Time from enable to full current
capability, Buck2Fst = 0 58 ms
Eciency EBUCK2
ILOAD = 10mA, Buck2ISet = 150mA,
Inductor = BOURNS SRP2010-
2R2M, VB2OUT = 1.2V
87 %
BLX Rising/Falling Slew
Rate SRBLX_BUCK2
Buck2LowEMI = 0 2 V/ns
Buck2LowEMI = 1 0.5
Thermal-Shutdown
Temperature TSHDN_BUCK2 140 °C
Thermal-Shutdown
Temperature Hysteresis TSHDN_HYST_BUCK2 10 °C
LDO1
(C = 1μF, unless otherwise noted. Typical values are at VL1IN = 3.7V, with IL1OUT = 10mA, VL1OUT = 3V.)
Input Voltage VINLDO1
LDO mode 2.7 5.5 V
Switch mode 1.2 5.5 V
Quiescent Supply
Current IQ_LDO1
LDO enabled, IL1OUT = 0µA 0.55 4
µA
LDO enabled, IL1OUT = 0µA,
Switch mode 0.45
Shutdown Supply
Current with Active
Discharge Enabled
ISD_LDO1 LDO1 disabled. LDO1ActDSC=1. 55 µA
Maximum Output
Current IL1OUT_MAX 100 mA
Output Voltage VL1OUT 0.8 3.6 V
Output Accuracy ACCLDO1 VL1IN = (VL1OUT + 0.5V) or higher,
IL1OUT = 100µA -2.7 +2.7 %
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Electrical Characteristics (continued)

(VCHGIN = 5.0V, VBAT = 3.7V, TA= -40°C to +85°C, all registers in their default state, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Dropout Voltage VDROP_LDO1 VL1IN = 3V, IL1OUT_ = 100mA,
LDO1VSet = 3V 102 mV
Line Regulation Error VLINEREG_LDO1 VL1IN = (VL1OUT + 0.5V) to 5.5V -0.12 0.022 +0.12 %/V
Load Regulation Error VLOADREG_LDO1 IL1OUT = 100µA to 100mA 0.002 0.005 %/mA
Line Transient VLINETRAN_LDO1
VL1IN = 4V to 5V, 200ns rise time ±36 mV
VL1IN = 4V to 5V, 1µs rise time ±28 mV
Load Transient VLOADTRAN_LDO1
IL1OUT = 0mA to 10mA, 200ns
rise time 145 mV
IL1OUT = 0mA to 100mA, 200ns
rise time 290 mV
Passive Discharge
Resistance RPD_LDO1 510 16 KΩ
Active Discharge Current IADL_LDO1 VL1IN = 3.7V 7 20 37 mA
Switch Mode Resistance RON_LDO1
VL1IN = 2.7V, IL1OUT = 100mA 0.5 0.85
ΩVL1IN = 1.8V, IL1OUT = 100mA 0.76 1.3
VL1IN = 1.2V, IL1OUT = 5mA 1.7 2.8
Turn-On Time tON_LDO1
IL1OUT = 0mA, time from 10% to
90% of nal value 1.6 3.7
ms
IL1OUT = 0mA, time from 10% to
90% of nal value, Switch mode 0.25 0.65
Short-Circuit Current
Limit ISHRT_LDO1
VL1IN = 2.7V, VL1OUT = GND 150 345 550 mA
VL1IN = 2.7V , VL1OUT = GND,
Switch mode 150 335 550 mA
Thermal-Shutdown
Temperature TSHDN_LDO1 150 °C
Thermal-Shutdown
Temperature Hysteresis TSHDN_HYST_LDO1 16 °C
Output Noise OUTNOISE
10Hz to 100kHz, VL1IN = 5V,
VL1OUT = 3.3V 110
µVrms
10Hz to 100kHz, VL1IN = 5V,
VL1OUT = 2.5V 95
10Hz to 100kHz, VL1IN = 5V,
VL1OUT = 1.2V 60
10Hz to 100kHz, VL1IN = 5V,
VL1OUT = 0.8V 60
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Electrical Characteristics (continued)

(VCHGIN = 5.0V, VBAT = 3.7V, TA= -40°C to +85°C, all registers in their default state, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
LDO2
(C = 1μF, unless otherwise noted. Typical values are at VL2IN = 3.7V, with IL2OUT = 10mA, VL2OUT = 3V.)
Input Voltage VINLDO2
LDO mode 1.71 5.5 V
Switch mode 1.2 5.5 V
Quiescent Supply
Current IQ_LDO2
IL2OUT = 0µA 1 5.1 µA
IL2OUT = 0µA, Switch mode 0.5
Quiescent Supply
Current in Dropout IQDO_LDO2
IL2OUT = 0µA, VL2IN = 2.9V,
LDO2VSet = 3V. 1.8 µA
Shutdown Supply
Current with Active
Discharge Enabled
ISD_LDO2 LDO2 disabled. LDO2ActDSC=1. 54 µA
Maximum Output
Current IL2OUT_MAX
VL2IN ≥ 2.7V 100 mA
VL2IN = 1.8V or lower 50 mA
Output Voltage VL2OUT 0.9 4 V
Output Accuracy ACCLDO2
VL2IN = (VL2OUT + 0.5V) or higher,
IL2OUT = 100µA -2.7 +2.7 %
Dropout Voltage VDROP_LDO2
VL2IN = 3V, IL2OUT_ = 100mA,
LDO2VSet = 3V 100 mV
Line Regulation Error VLINEREG_LDO2 VL2IN = (VL2OUT + 0.5V) to 5.5V -0.4 +0.05 +0.4 %/V
Load Regulation Error VLOADREG_LDO2 IL2OUT = 100µA to 100mA 0.001 0.005 %/mA
Line Transient VLINETRAN_LDO2
VL2IN = 4V to 5V, 200ns rise time ±35 mV
VL2IN = 4V to 5V, 1µs rise time ±25 mV
Load Transient VLOADTRAN_LDO2
IL2OUT = 0mA to 10mA, 200ns
rise time 100 mV
IL2OUT = 0mA to 100mA, 200ns
rise time 200 mV
Passive Discharge
Resistance RPD_LDO2 510 16 KΩ
Active Discharge Current IADL_LDO2 VL2IN = 3.7V 7 20 37 mA
Switch Mode
Resistance RON_LDO2
VL2IN = 2.7V, IL2OUT = 100mA 0.46 0.76
ΩVL2IN = 1.8V, IL2OUT = 50mA 0.7 1.15
VL2IN = 1.2V, IL2OUT = 5mA 1.7 2.6
Turn-On Time tON_LDO2
IL2OUT = 0mA, time from 10% to
90% of nal value 1.5 3.7
ms
IL2OUT = 0mA, time from 10% to
90% of nal value, Switch mode 0.25 0.65
MAX20335 PMIC with Ultra-Low IQVoltage Regulators and
Battery Chargers for Small Lithium Ion Systems
www.maximintegrated.com Maxim Integrated
│
12
Electrical Characteristics (continued)

(VCHGIN = 5.0V, VBAT = 3.7V, TA= -40°C to +85°C, all registers in their default state, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Short-Circuit Current
Limit ISHRT_LDO2
VL2IN = 2.7V, VL2OUT = GND 140 340 600 mA
VL2IN = 2.7V , VL2OUT = GND,
Switch mode 140 330 600 mA
Thermal-Shutdown
Temperature TSHDN_LDO2 150 °C
Thermal-Shutdown
Temperature Hysteresis TSHDN_HYST_LDO2 21 °C
Output Noise OUTNOISE
10Hz to 100kHz, VL2IN = 5V,
VL2OUT = 3.3V 150
µVrms
10Hz to 100kHz, VL2IN = 5V,
VL2OUT = 2.5V 125
10Hz to 100kHz, VL2IN = 5V,
VL2OUT = 1.2V 90
10Hz to 100kHz, VL2IN = 5V,
VL2OUT = 0.9V 80
L2IN UVLO VUVLO_LDO2
VL2IN Falling 1.14 1.38 V
VL2IN Rising 1.4 1.64
LDO3
(C = 1μF, unless otherwise noted. Typical values are at VL3IN = 3.7V, with IL3OUT = 10mA, VL3OUT = 3V.)
Input Voltage VINLDO3
LDO mode 1.71 5.5 V
Switch mode 1.2 5.5 V
Quiescent Supply
Current IQ_LDO3
IL3OUT = 0µA 1 5.1 µA
IL3OUT = 0µA, Switch mode 0.5
Quiescent Supply
Current in Dropout IQDO_LDO3
IL3OUT = 0µA, VL3IN = 2.9V,
LDO3VSet = 3V. 1.8 µA
Shutdown Supply
Current with Active
Discharge Enabled
ISD_LDO3 LDO3 disabled. LDO3ActDSC=1. 54 µA
Maximum Output
Current IL3OUT_MAX
VL3IN ≥ 2.7V 100 mA
VL3IN = 1.8V or lower 50 mA
Output Voltage VL3OUT 0.9 4 V
Output Accuracy ACCLDO3
VL3IN = (VL3OUT + 0.5V) or higher,
IL3OUT = 100µA -2.7 +2.7 %
Dropout Voltage VDROP_LDO3
VL3IN = 3V, IL3OUT_ = 100mA,
LDO3VSet = 3V 100 mV
MAX20335 PMIC with Ultra-Low IQVoltage Regulators and
Battery Chargers for Small Lithium Ion Systems
www.maximintegrated.com Maxim Integrated
│
13
Electrical Characteristics (continued)

(VCHGIN = 5.0V, VBAT = 3.7V, TA= -40°C to +85°C, all registers in their default state, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Line Regulation Error VLINEREG_LDO3 VL3IN = (VL3OUT + 0.5V) to 5.5V -0.4 +0.05 +0.4 %/V
Load Regulation Error VLOADREG_LDO3 IL3OUT = 100µA to 100mA 0.001 0.005 %/mA
Line Transient VLINETRAN_LDO3
VL3IN = 4V to 5V, 200ns rise time ±35 mV
VL3IN = 4V to 5V, 1µs rise time ±25 mV
Load Transient VLOADTRAN_LDO3
IL3OUT = 0mA to 10mA, 200ns
rise time 100 mV
IL3OUT = 0mA to 100mA, 200ns
rise time 200 mV
Passive Discharge
Resistance RPD_LDO3 510 16 KΩ
Active Discharge Current IADL_LDO3 VL3IN = 3.7V 7 20 37 mA
Switch Mode Resistance RON_LDO3
VL3IN = 2.7V, IL3OUT = 100mA 0.46 0.76
ΩVL3IN = 1.8V, IL3OUT = 100mA 0.7 1.15
VL3IN = 1.2V, IL3OUT = 5mA 1.7 2.6
Turn-On Time tON_LDO3
IL3OUT = 0mA, time from 10% to
90% of nal value 1.5 3.7
ms
IL3OUT = 0mA, time from 10% to
90% of nal value, Switch mode 0.25 0.65
Short-Circuit Current
Limit ISHRT_LDO3
VL3IN = 2.7V, VL3OUT = GND 140 340 600 mA
VL3IN = 2.7V , VL3OUT = GND,
Switch mode 140 330 600 mA
Thermal-Shutdown
Temperature TSHDN_LDO3 150 °C
Thermal-Shutdown
Temperature Hysteresis TSHDN_HYST_LDO3 21 °C
Output Noise OUTNOISE
10Hz to 100kHz, VL3IN = 5V,
VL3OUT = 3.3V 150
µVrms
10Hz to 100kHz, VL3IN = 5V,
VL3OUT = 2.5V 125
10Hz to 100kHz, VL3IN = 5V,
VL3OUT = 1.2V 80
10Hz to 100kHz, VL3IN = 5V,
VL3OUT = 0.9V 60
L3IN UVLO VUVLO_LDO3
VL3IN Falling 1.14 1.38 V
VL3IN Rising 1.4 1.64
MAX20335 PMIC with Ultra-Low IQVoltage Regulators and
Battery Chargers for Small Lithium Ion Systems
www.maximintegrated.com Maxim Integrated
│
14
Electrical Characteristics (continued)

(VCHGIN = 5.0V, VBAT = 3.7V, TA= -40°C to +85°C, all registers in their default state, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
CHGIN TO SYS PATH
(VCHGIN = 5.0V, VSYS = VSYS_REG)
Allowed CHGIN Input
Voltage Range VCHGIN_RNG -5.5 28 V
VCHGIN Detect
Threshold VCHGIN_DET
Rising 3.8 3.9 4.1 V
Falling 3.0 3.1 3.2
VCHGIN Overvoltage
Threshold VCHGIN_OV Rising 7.2 7.5 7.8 V
VCHGIN Overvoltage
Threshold Hysteresis VCHGIN_OV_HYS 200 mV
VCHGIN Valid Trip Point VCHGIN-SYS_TP
VCHGIN – VSYS, Rising,
VBAT = 4V +30 +145 +290 mV
VCHGIN Valid Trip Point
Hysteresis VCHGIN-SYS_TP_HYS 275 mV
Input Limiter Current ILIM
ILimCntl[1:0] = 00 0
mA
ILimCntl[1:0] = 01 90 100
ILimCntl[1:0] = 10 450 550
ILimCntl[1:0] = 11 1000
Internal CAP Regulator VCAP VCHGIN = 5V 3.9 4.2 4.7 V
CHGIN-SYS Regulation
Voltage VCHGIN-SYS VCHGIN = 4V, ISYS = 1mA 40 mV
CHGIN to SYS
On-Resistance RCHGIN-SYS VCHGIN = 4.4V, ISYS = 500mA 370 660 mΩ
Thermal-Shutdown
Temperature TCHGIN_SHDN (Note 3) +150 oC
Thermal-Shutdown
Temperature Hysteresis TCHGIN_SHDN_HYS 30 oC
Input Current Soft-Start
Time tSFST_LIM 1ms
Internal Supply
Switchover Threshold VCCINT_TH VCHGIN = VCAP rising, VBAT = 4.2V 2.5 2.8 3.0 V
MAX20335 PMIC with Ultra-Low IQVoltage Regulators and
Battery Chargers for Small Lithium Ion Systems
www.maximintegrated.com Maxim Integrated
│
15
Electrical Characteristics (continued)

(VCHGIN = 5.0V, VBAT = 3.7V, TA= -40°C to +85°C, all registers in their default state, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SYS, BATTERY, AND VCCINT UVLOs
SYS UVLO Threshold VSYSUVLO_R Rising 3 3.06 V
VSYSUVLO_F Falling 2.92 2.98 3.04
SYS UVLO Threshold
Hysteresis VSYSUVLO_HYS Hysteresis 26 mV
SYS UVLO Falling
Debounce Time tSYSUVLO_FDEB SYS Falling 20 µs
VCCINT UVLO Threshold
(POR) VUVLO VCCINT Rising 0.8 1.82 2.6 V
VCCINT UVLO Threshold
Hysteresis VUVLO_HYS 140 mV
BAT UVLO Threshold VBAT_UVLO
Rising (Valid only when CHGIN is
present. When VBAT < VBAT_UVLO,
the BAT-SYS switch opens and
BAT is connected to SYS through a
diode.)
1.9 2.05 2.2 V
BAT UVLO Threshold
Hysteresis VBAT_UVLO_HYS Hysteresis 50 mV
BATTERY CHARGER (See Figure 5a and Figure 5b)
(VBAT = 4.2V. Typical values are at VCHGIN = 5.0V, VSYS = VSYS_REG)
Allowed BAT Voltage
Range VBAT_RNG 0 5.5 V
BAT to SYS
On-Resistance RBAT-SYS VBAT = 4.2V, IBAT = 300mA 80 140 mΩ
Current Reduce Thermal
Threshold Temperature TCHG_LIM (Note 4) 120 oC
BAT-to-SYS Switch-On
Threshold VBAT-SYS-ON SYS falling 10 22 35 mV
BAT-to-SYS Switch-O
Threshold VBAT-SYS-OFF SYS rising -3 -1.5 0 mV
SYS-BAT Regulation
Voltage VSYS_REG VCHGIN = 5V, ISYS = 1mA VBatReg
+ 140mV
VBatReg
+ 200mV
VBatReg
+ 260mV V
MAX20335 PMIC with Ultra-Low IQVoltage Regulators and
Battery Chargers for Small Lithium Ion Systems
www.maximintegrated.com Maxim Integrated
│
16
Electrical Characteristics (continued)

(VCHGIN = 5.0V, VBAT = 3.7V, TA= -40°C to +85°C, all registers in their default state, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SYS Threshold Voltage
Charger Limiting Current
(Note 5)
VSYS_LIM
SysMin = 000,
VBAT > 3.6V VBAT+
0.1
V
SysMin = 000,
VBAT < 3.4V 3.6
SysMin = 001,
VBAT < 3.4V 3.7
SysMin = 010,
VBAT < 3.4V 3.8
SysMin = 011,
VBAT < 3.4V 3.9
SysMin = 100,
VBAT < 3.4V 3.86 4 4.14
SysMin = 101,
VBAT < 3.4V 4.1
SysMin = 110,
VBAT < 3.4V 4.2
SysMin = 111,
VBAT < 3.4V 4.3
Charger Current Soft-
Start Time tCHG_SOFT 1ms
PRECHARGE
Precharge Current IPCHG
IPChg = 00 5
%IFChg
IPChg = 01 910 11
IPChg = 10 20
IPChg = 11 30
Prequalication
Threshold VBAT_PChg
VPChg = 000 2.1
V
VPChg = 001 2.15 2.25 2.35
VPChg = 010 2.40
VPChg = 011 2.55
VPChg = 100 2.7
VPChg = 101 2.85
VPChg = 110 3.0
VPChg = 111 3.15
Prequalication
Threshold Hysteresis VBAT_PChg_HYS 90 mV
MAX20335 PMIC with Ultra-Low IQVoltage Regulators and
Battery Chargers for Small Lithium Ion Systems
www.maximintegrated.com Maxim Integrated
│
17
Electrical Characteristics (continued)

(VCHGIN = 5.0V, VBAT = 3.7V, TA= -40°C to +85°C, all registers in their default state, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
FAST CHARGE
SET Current Gain Factor
KSET 2000 A/A
SET Regulation Voltage VSET 1V
Fast-Charge Current IFChg
RSET = 400kΩ 5
mARSET = 40kΩ 45 50 55
RSET = 4kΩ 450 500 550
Fast-Charge Current
Accuracy (Note 6) IFChg_ACC RSET Range = 4kΩ to 40kΩ -10 +10 %
MAINTAIN CHARGE
Charge Done
Qualication IChg_DONE
ChgDone = 00 5
%IFChg
ChgDone = 01 8.5 10 11.5
ChgDone = 10 20
ChgDone = 11 30
BAT Regulation Voltage
(Note 7) VBatReg
BatReg = 0000 4.05
V
BatReg = 0001 4.10
BatReg = 0010 4.15
BatReg =
0011
TA= +25°C 4.179 4.2 4.221
TA= 0 to +45C 4.168 4.2 4.232
BatReg = 0100 4.25
BatReg = 0101 4.3
BatReg = 0110 4.35
BatReg = 0111 4.4
BatReg = 1000 4.45
BatReg = 1001 4.5
BatReg = 1010 4.55
BatReg = 1011 4.6
BAT Recharge
Threshold VBatReChg
BatReChg = 00 VBatReg - 70
mV
BatReChg = 01 VBatReg - 120
BatReChg = 10 VBatReg -170
BatReChg = 11 VBatReg -220
MAX20335 PMIC with Ultra-Low IQVoltage Regulators and
Battery Chargers for Small Lithium Ion Systems
www.maximintegrated.com Maxim Integrated
│
18
Electrical Characteristics (continued)

(VCHGIN = 5.0V, VBAT = 3.7V, TA= -40°C to +85°C, all registers in their default state, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
CHARGER TIMER
Maximum
Prequalication Time tPChg
PChgTmr = 00 30
min
PChgTmr = 01 60
PChgTmr = 10 120
PChgTmr = 11 240
Maximum Fast-Charge
Time tFChg
FChgTmr = 00 75
min
FChgTmr = 01 150
FChgTmr = 10 300
FChgTmr = 11 600
Maintain-Charge Time tTOChg
TOChgTmr = 00 0
min
TOChgTmr = 01 15
TOChgTmr = 10 30
TOChgTmr = 11 60
Timer Accuracy tCHG_ACC -10 +10 %
Timer Extend Threshold TIMEXD_THRES
If charge current is reduced due to
ILIM or TDIE this is the percentage
of charge current below which timer
clock operates at half speed
50
%IFChg
Timer Suspend
Threshold TIMSUS_THRES
If charge current is reduced due to
ILIM or TDIE this is the percentage
of charge current below which timer
clock pauses
20
%IFChg
THERMISTOR MONITOR AND NTC DETECTION
THM Hot Threshold T4
VTHM falling 30.9 32.9 34.9
%CAP
VTHM falling 21.3 23.3 25.3
THM Warm Threshold T3
VTHM falling 48 50 52
VTHM falling 30.9 32.9 34.9
THM Cool Threshold T2VTHM rising 62.5 64.5 66.5
THM Cold Threshold T1VTHM rising 71.9 73.9 75.9
THM Disable Threshold THMDIS VTHM rising 91 93 95
THM Threshold
Hysteresis THMHYS 60 mV
THM Input Leakage ILKG_THM -1 1 µA
MAX20335 PMIC with Ultra-Low IQVoltage Regulators and
Battery Chargers for Small Lithium Ion Systems
www.maximintegrated.com Maxim Integrated
│
19
Electrical Characteristics (continued)

(VCHGIN = 5.0V, VBAT = 3.7V, TA= -40°C to +85°C, all registers in their default state, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
MAX20335 PMIC with Ultra-Low IQVoltage Regulators and
Battery Chargers for Small Lithium Ion Systems
www.maximintegrated.com Maxim Integrated
│
20
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
START UP TIMING (See Figure 2)
Boot Delay tRST
BootDly = 00 80
ms
BootDly = 01 120
BootDly = 10 220
BootDly = 11 420
Boot Delay Timer
Accuracy
tRST_ACC -10 10 %
DIGITAL SIGNALS
Input
Logic-High (
SDA,
SCL,
MPC0, MPC1,
PFN1, PFN2)
VIH 1.4
V
Input Logic-Low (
SDA,
SCL,
MPC0, MPC1,
PFN1, PFN2)
VIL 0.5
V
Output
Logic-Low (
SDA,
RST
,
INT
, LED, PFN2)
VOL IOL = 4mA 0.4
V
High Level Leakage
Current (
SDA,
RST
,
INT
,
LED, PFN2)
ILK 1µA
SCL Clock
Frequency
fSCL 400 kHz
Bus Free Time Between
a
STOP
and
START
Condition
tBUF 1.3 µs
START
Condition
(Repeated) Hold Time tHD:STA (Note 8) 0.6 µs
Low Period of SCL
Clock
tLOW 1.3 µs
High Period of SCL
Clock
tHIGH 0.6 µs
Setup Time for a
Repeated
START
Condition
tSU:STA 0.6 µs
Data Hold Time tHD:DAT (Note 9) 0 0.9 µs
Data Setup Time tSU:DAT (Note 9) 100 ns
Setup Time for
STOP
Condition
tSU:STO 0.6 µs
Spike Pulse Widths
Suppressed by Input
Filter
tSP (Note 10) 50 ns
Electrical Characteristics (continued)
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