Maxim Integrated DS1886 User manual

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
General Description
The DS1886 controls and monitors all functions for SFF,
SFP, and SFP+ modules including all SFF-8472 func-
tionality for GPON/EPON and 10G PON ONU applica-
tions. The combination of the DS1886 with the MAX3710
supports all transmitter and receiver functionality. The
DS1886 includes modulation current control and APC set-
point control with tracking error adjustment. It continually
monitors RSSI for LOS generation. A 13-bit analog-to-
digital converter (ADC) monitors VCC, temperature, laser
bias, laser modulation, and receive power to meet all
monitoring requirements. Receive power measurement
is differential with support for common mode to VCC. A
9-bit digital-to-analog converter (DAC) is included with
temperature compensation for APD bias control.
Applications
SFF, SFP, and PON ONU Modules
Features
S Meets All SFF-8472 Control and Monitoring
Requirements
S Companion Controller for the MAX3710 Laser
Driver/Limiting Amplifier and MAX3945 Limiting
Amplifier
S MAX3710/DS1886 Combination Supports
Broad Spectrum of Continuous Mode and PON
Applications Up to 2.5GHz
S Temperature Lookup Table (LUT) to Compensate
for APC Tracking Error and Dual Closed-Loop
Variables
S Three Laser Control Modes
Dual Closed Loop: Laser Bias and Laser
Modulation Are Automatically Controlled with
Multiple LUTs to Compensate Dual Closed-Loop
Calibration Points
APC Loop: Laser Bias Automatically Controlled,
Laser Modulation Controlled by Temperature LUT
Open Loop: Laser Bias and Laser Modulation
Are Controlled by Temperature LUTs
S 13-Bit ADC
Laser Bias, Laser Power, and Receive Power
Support Internal and External Calibration
Differential Receive Power Input
Scalable Dynamic Range
Internal Direct-to-Digital Temperature Sensor
Alarm and Warning Flags for All Monitored
Channels
S 10-Bit DAC with Temperature Compensation for
APD Bias
S Digital I/O Pins: Transmit Disable Input/Output,
Rate Select Input, LOS Input/Output, Transmit
Fault Input/Output, and IN1 Status Monitor and
Fault input
S Comprehensive Fault Measurement System with
Maskable Alarm/Warnings
S Flexible Password Scheme Provides Three Levels
of Security
S 256-Byte A0h and 128-Byte Upper A2h EEPROM
S I2C-Compatible Interface
S 3-Wire Master to Communicate with the MAX3710/
MAX3711 Laser Driver/Limiting Amplifier and
MAX3945 Limiting Amplifier
19-6259; Rev 1; 8/12
Ordering Information appears at end of data sheet.
For pricing, delivery, and ordering information, please contact Maxim Direct at
1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
2Maxim Integrated
TABLE OF CONTENTS
General Description ............................................................................ 1
Applications .................................................................................. 1
Features ..................................................................................... 1
Absolute Maximum Ratings ..................................................................... 10
Recommended Operating Conditions ............................................................. 10
DC Electrical Characteristics .................................................................... 10
DAC Electrical Characteristics ................................................................... 11
Analog Voltage Monitoring Characteristics ......................................................... 11
Digital Thermometer Characteristics .............................................................. 11
AC Electrical Characteristics .................................................................... 12
Startup Timing Characteristics ................................................................... 12
3-Wire Digital Interface Specification .............................................................. 12
I2C AC Electrical Characteristics ................................................................. 13
Nonvolatile Memory Characteristics............................................................... 13
Typical Operating Characteristics ................................................................ 14
Pin Configuration ............................................................................. 15
Pin Description ............................................................................... 15
Block Diagram ............................................................................... 16
Typical Operating Circuit—GPON ONU............................................................ 17
Typical Operating Circuit—10G PON ONU ......................................................... 18
Detailed Description........................................................................... 19
Monitors and Fault Detection ..................................................................19
Monitors ................................................................................19
ADC Monitors and Alarms ..................................................................20
Alarms and Warnings......................................................................20
ADC Timing .............................................................................20
Right-Shifting ADC Result ..................................................................21
Differential RSSI Input .....................................................................21
Laser Bias and Laser Power Through TXMON ..................................................22
Enhanced RSSI Monitoring (Dual Range Functionality) ...........................................22
APD Mode .............................................................................22
PIN Mode ..............................................................................23
Low-Voltage Operation .......................................................................23
Power-On Analog (POA) ......................................................................24
Delta-Sigma Output and Reference .............................................................25
Digital I/O Pins..............................................................................26

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
3Maxim Integrated
LOS, LOSOUT ...........................................................................26
RSEL ..................................................................................26
TXD, TXDOUT ...........................................................................26
IN1, TXF, Transmit Fault (TXFOUT) Output .....................................................26
Die Identification ............................................................................27
DS1886 Master Communication Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3-Wire Master Interface.......................................................................28
Protocol ................................................................................28
3-Wire Slave Register Map and DS1886 Corresponding Location ...................................29
3-Wire Master Flowchart ...................................................................29
3-Wire Power-On Reset.......................................................................31
DS1886 with MAX3710 Operating Modes ........................................................32
Open Loop Mode, DPC_EN = 0, APC_EN = 0 ..................................................32
APC Loop Mode, DPC_EN = 0, APC_EN = 1...................................................32
Dual Closed-Loop Mode, DPC_EN = 1, APC_EN = 1 ............................................32
BIAS, MODULATION, SET_2XAPC, TXCTRL5 LUTs ................................................33
MODULATION Value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
BIAS Value ..............................................................................34
Power Leveling .............................................................................35
Manual MAX3710 Operations ..................................................................35
I2C Communication ........................................................................... 35
I2C Definition ...............................................................................35
I2C Protocol................................................................................37
Memory Organization .......................................................................... 38
Register Descriptions .......................................................................... 40
A2h Lower Memory Register Map ..............................................................40
A2h Table 01h Register Map...................................................................40
A2h Table 02h Register Map ..................................................................41
A2h Table 04h Register Map ..................................................................42
A2h Table 05h Register Map ..................................................................42
A2h Table 06h Register Map ..................................................................42
A2h Table 08h Register Map ..................................................................43
A2h Table 09h Register Map ..................................................................43
Auxiliary A0h Memory Register Map ............................................................43
A2h Lower Memory Register Descriptions ........................................................44
A2h Lower Memory, Register 00h–01h: TEMP ALARM HI ........................................44
TABLE OF CONTENTS (continued)

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
4Maxim Integrated
A2h Lower Memory, Register 04h–05h: TEMP WARN HI .........................................44
A2h Lower Memory, Register 02h–03h: TEMP ALARM LO........................................44
A2h Lower Memory, Register 06h–07h: TEMP WARN LO.........................................44
A2h Lower Memory, Register 08h–09h: VCC ALARM HI .........................................45
A2h Lower Memory, Register 0Ch–0Dh: VCC WARN HI ..........................................45
A2h Lower Memory, Register 10h–11h: TXB ALARM HI ..........................................45
A2h Lower Memory, Register 14h–15h: TXB WARN HI ...........................................45
A2h Lower Memory, Register 18h–19h: TXP ALARM HI ..........................................45
A2h Lower Memory, Register 1Ch–1Dh: TXP WARN HI ..........................................45
A2h Lower Memory, Register 20h–21h: RSSI ALARM HI .........................................45
A2h Lower Memory, Register 24h–25h: RSSI WARN HI ..........................................45
A2h Lower Memory, Register 0Ah–0Bh: VCC ALARM LO.........................................46
A2h Lower Memory, Register 0Eh–0Fh: VCC WARN LO ..........................................46
A2h Lower Memory, Register 12h–13h: TXB ALARM LO .........................................46
A2h Lower Memory, Register 16h–17h: TXB WARN LO ..........................................46
A2h Lower Memory, Register 1Ah–1Bh: TXP ALARM LO .........................................46
A2h Lower Memory, Register 1Eh–1Fh: TXP WARN LO ..........................................46
A2h Lower Memory, Register 22h–23h: RSSI ALARM LO ........................................46
A2h Lower Memory, Register 26h–27h: RSSI WARN LO .........................................46
A2h Lower Memory, Register 28h–37h: EMPTY ................................................47
A2h Lower Memory, Register 38h–5Fh: EE ....................................................47
A2h Lower Memory, Register 60h–61h: TEMP VALUE ...........................................47
A2h Lower Memory, Register 62h–63h: VCC VALUE ............................................48
A2h Lower Memory, Register 64h–65h: TXB VALUE ............................................48
A2h Lower Memory, Register 66h–67h: TXP VALUE.............................................48
A2h Lower Memory, Register 68h–69h: RSSI VALUE ............................................48
A2h Lower Memory, Register 6Ah–6Dh: RESERVED ............................................48
A2h Lower Memory, Register 6Eh: STATUS....................................................49
A2h Lower Memory, Register 6Fh: UPDATE ...................................................50
A2h Lower Memory, Register 70h: ALARM3.........................................................51
A2h Lower Memory, Register 71h: ALARM2.........................................................52
A2h Lower Memory, Register 72h–73h: RESERVED .............................................52
A2h Lower Memory, Register 74h: WARN3..........................................................53
A2h Lower Memory, Register 75h: WARN2..........................................................54
A2h Lower Memory, Register 76h–7Ah: RESERVED .............................................54
TABLE OF CONTENTS (continued)

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
5Maxim Integrated
TABLE OF CONTENTS (continued)
A2h Lower Memory, Register 7Bh–7Eh: PASSWORD ENTRY (PWE) ................................55
A2h Lower Memory, Register 7Fh: TBL SEL ...................................................55
A2h Table 01h Register Descriptions ............................................................56
A2h Table 01h, Register 80h–BFh: EEPROM...................................................56
A2h Table 01h, Register C0h–F7h: EEPROM ..................................................56
A2h Table 01h, Register F8h: ALARM EN3...........................................................57
A2h Table 01h, Register F9h: ALARM EN2..........................................................58
A2h Table 01h, Register FAh–FBh: RESERVED.................................................58
A2h Table 01h, Register FCh: WARN EN3...........................................................59
A2h Table 01h, Register FDh: WARN EN2...........................................................60
A2h Table 01h, Register FEh–FFh: RESERVED OR EE ...........................................60
A2h Table 02h Register Descriptions ............................................................61
A2h Table 02h, Register 80h: MODE .........................................................61
A2h Table 02h, Register 81h: Temperature Index (TINDEX) .......................................62
A2h Table 02h, Register 82h–83h: MODULATION VALUE ........................................62
A2h Table 02h, Register 84h: RESERVED .....................................................62
A2h Table 02h, Register 85h: APC VALUE ....................................................63
A2h Table 02h, Register 86h–87h: SET_IBIAS VALUE ...........................................63
A2h Table 02h, Register 88h: DACFS ........................................................63
A2h Table 02h, Register 89h: CNFGA ........................................................64
A2h Table 02h, Register 8Ah: CNFGB........................................................65
A2h Table 02h, Register 8Bh: CNFGC........................................................66
A2h Table 02h, Register 8Ch: RESERVED ....................................................66
A2h Table 02h, Register 8Dh: CNFGD .......................................................67
A2h Table 02h, Register 8Eh: RIGHT-SHIFT1(RSHIFT1)..........................................67
A2h Table 02h, Register 8Fh: RIGHT-SHIFT0(RSHIFT0)..........................................68
A2h Table 02h, Register 90h–91h: XOVER COARSE ............................................68
A2h Table 02h, Register 92h–93h: VCC SCALE ................................................69
A2h Table 02h, Register 94h–95h: TXB SCALE ................................................69
A2h Table 02h, Register 96h–97h: TXP SCALE.................................................69
A2h Table 02h, Register 98h–99h: RSSI FINE SCALE ...........................................69
A2h Table 02h, Register 9Ah–9Bh: RESERVED ................................................69
A2h Table 02h, Register 9Ch–9Dh: RSSI COARSE SCALE .......................................69
A2h Table 02h, Register 9Eh–9Fh: RESERVED.................................................69
A2h Table 02h, Register A0h–A1h: XOVER FINE................................................70
A2h Table 02h, Register A2h–A3h: VCC OFFSET ...............................................70

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
6Maxim Integrated
TABLE OF CONTENTS (continued)
A2h Table 02h, Register A4h–A5h: TXB OFFSET ...............................................70
A2h Table 02h, Register A6h–A7h: TXP OFFSET ...............................................70
A2h Table 02h, Register A8h–A9h: RSSI FINE OFFSET ..........................................70
A2h Table 02h, Register AAh–ABh: RESERVED ................................................70
A2h Table 02h, Register ACh–ADh: RSSI COARSE OFFSET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
A2h Table 02h, Register AEh–AFh: INTERNAL TEMP OFFSET ....................................71
A2h Table 02h, Register B0h–B3h: PW1 ......................................................71
A2h Table 02h, Register B4h–B7h: PW2 ......................................................72
A2h Table 02h, Register B8h–BFh: EMPTY....................................................72
A2h Table 02h, Register C0h: PW_ENA.......................................................73
A2h Table 02h, Register C1h: PW_ENB.......................................................74
A2h Table 02h, Register C2h–C6h: RESERVED ................................................75
A2h Table 02h, Register C7h: TBLSELPON....................................................75
A2h Table 02h, Register C8h–C9h: DAC VALUE................................................75
A2h Table 02h, Register CAh: INCBYTE ......................................................76
A2h Table 02h, Register CBh: TXCTRL5 DPC..................................................76
A2h Table 02h, Register CCh: IMODMAX .....................................................76
A2h Table 02h, Register CDh: IBIASMAX .....................................................77
A2h Table 02h, Register CEh: DEVICE ID .....................................................77
A2h Table 02h, Register CFh: DEVICE VER ...................................................77
A2h Table 02h, Register D0h–DFh: EMPTY ...................................................78
A2h Table 02h, Register E0h: RXCTRL1 ......................................................78
A2h Table 02h, Register E1h: RXCTRL2 ......................................................78
A2h Table 02h, Register E2h: SETCML .......................................................79
A2h Table 02h, Register E3h: SETLOSH ......................................................79
A2h Table 02h, Register E4h: TXCTRL1.......................................................79
A2h Table 02h, Register E5h: TXCTRL2 ......................................................80
A2h Table 02h, Register E6h: TXCTRL3 ......................................................80
A2h Table 02h, Register E7h: TXCTRL4 ......................................................80
A2h Table 02h, Register E8h: TXCTRL5 APC OL ...............................................81
A2h Table 02h, Register E9h: TXCTRL6 ......................................................81
A2h Table 02h, Register EAh: TXCTRL7 ......................................................81
A2h Table 02h, Register EBh: RESERVED.....................................................82
A2h Table 02h, Register ECh: SETLOSH_3945.................................................82
A2h Table 02h, Register EDh: SETLOSL_3945 .................................................82
A2h Table 02h, Register EEh: SETLOSTIMER_3945.............................................83

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
7Maxim Integrated
TABLE OF CONTENTS (continued)
A2h Table 02h, Register EFh: 3WSET ........................................................83
A2h Table 02h, Register F0h: 3WCTRL .......................................................84
A2h Table 02h, Register F1h: ADDRESS ......................................................84
A2h Table 02h, Register F2h: WRITE .........................................................85
A2h Table 02h, Register F3h: READ .........................................................85
A2h Table 02h, Register F4h: TXSTAT2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
A2h Table 02h, Register F5h: TXSTAT1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
A2h Table 02h, Register F6h: DPCSTAT ......................................................86
A2h Table 02h, Register F7h: RXSTAT ........................................................86
A2h Table 02h, Register F8h–FFh: RESERVED .................................................86
A2h Table 04h Register Descriptions ............................................................87
A2h Table 04h, Register 80h–A7h: MODULATION or TXCTRL5 LUT................................87
A2h Table 04h, Register A8h–EFh: EMPTY ....................................................87
A2h Table 04h, Register F0h–F7h: MOD MAX LUT .............................................87
A2h Table 04h, Register F8h–FFh: MOD OFFSET or SET_IMOD LUT ...............................88
A2h Table 06h Register Descriptions ............................................................88
A2h Table 06h, Register 80h–A7h: BIAS or SET_IBIAS ..........................................88
A2h Table 06h, Register A8h–EFh: EMPTY ....................................................89
A2h Table 06h, Register F0h–F7h: BIAS MAX LUT..............................................89
A2h Table 06h, Register F8h–FFh: BIAS OFFSET or APC LUT.....................................89
A2h Table 08h Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
A2h Table 08h, Register 80h–F7h: EMPTY ....................................................90
A2h Table 08h, Register F8h–FFh: INCBYTE ..................................................90
A2h Table 09h Register Descriptions ............................................................90
A2h Table 09h, Register 80h–F7h: EMPTY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
A2h Table 09h, Register F8h–FFh: DAC OFFSET LUT ...........................................90
Auxiliary Memory A0h Register Description .......................................................91
Auxiliary Memory A0h, Register 00h–FFh: EEPROM.............................................91
Applications Information........................................................................ 91
Power-Supply Decoupling.....................................................................91
Layout Considerations........................................................................91
SDA and SCL Pullup Resistors .................................................................91
Ordering Information .......................................................................... 91
Package Information........................................................................... 91
Revision History .............................................................................. 92

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
8Maxim Integrated
Figure 1a. ADC Channel Only for TXP when BURST_MODE = 1 in Table 02h, Register 89h .................. 19
Figure 1b. ADC Channel ....................................................................... 19
Figure 2. ADC Round-Robin Timing............................................................... 21
Figure 3. RSSI Differential Input for High-Side RSSI .................................................. 21
Figure 4. Laser Bias (TXB) and Laser Power (TXP) Monitoring Through TXMON ........................... 22
Figure 5. RSSI in APD Mode .................................................................... 22
Figure 6. RSSI in PIN Mode ..................................................................... 23
Figure 7. Low-Voltage Hysteresis Example ......................................................... 24
Figure 9. Delta-Sigma Output ................................................................... 25
Figure 8. Recommended Shunt Reference and RC Filter for DAC Output ................................. 25
Figure 10. TXFOUT and TXDOUT Logic Diagram. ................................................... 26
Figure 11. RSEL Logic Diagram .................................................................. 26
Figure 12a. TXFOUT Nonlatched Operation ........................................................ 27
Figure 12b. TXFOUT Latched ................................................................... 27
Figure 12c. TXFOUT During Power-On ............................................................ 27
Figure 13. 3-Wire Interface Timing Diagram ........................................................ 28
Figure 14. 3-Wire Flowchart ..................................................................... 30
Figure 15. MAX3710 Brownout Detection Flowchart .................................................. 31
Figure 16. Offset LUT .......................................................................... 34
Figure 17. MODULATION LUT (Open Loop and APC Mode) ........................................... 34
Figure 18. BIAS LUT (Open Loop) ................................................................ 34
Figure 19. I2C Timing Diagram .................................................................. 36
Figure 20. Example I2C Timing .................................................................. 37
Figure 21. Memory Organization ................................................................. 39
LIST OF FIGURES

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
9Maxim Integrated
LIST OF TABLES
Table 1. Acronyms ............................................................................ 19
Table 2. ADC Default Monitor Full-Scale Ranges .................................................... 20
Table 3. RSSI Hysteresis Threshold Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 4. RSSI Configuration Registers ............................................................. 23
Table 5. 3-Wire Transaction Detail ................................................................ 28
Table 6. 3-Wire Register Map and DS1886 Corresponding Location ..................................... 29
Table 7. DS1886 LUT Functions in Open Loop, APC Loop, and Dual Closed-Loop Modes.................... 32
Table 8. DS1886 LUT Memory Map for 5-Row Table (Temperature Values Indicated in °C)........................33
Table 9. DS1886 LUT Memory Map for 5-Row Table (TINDEX Values Indicated in Hex) ...................... 33
Table 10. Temperature Resolution for Offsets ....................................................... 34
Table 11a. Power Leveling Details (when DS1863_MODE = 0, default) ................................... 35
Table 11b. Power Leveling Details (when DS1863_MODE = 1).......................................... 35

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
10Maxim Integrated
(All voltages relative to ground.)
Voltage Range on IN1, DAC, LOS, RSSIP, RSSIN,
REFIN, RSEL, TXF, TXMON, TXD......... -0.5V to (VCC + 0.5V)
(subject to not exceeding +6V)
Voltage Range on VCC, SDA, SCL, TXFOUT
and LOSOUT .......................................................-0.5V to +6V
Continuous Power Dissipation (TA= +70NC)
TQFN (derate 28.6mW/NC above +70NC) ...............2285.7mW
Operating Temperature Range.......................... -40NC to +95NC
Programming Temperature Range ....................... 0NC to +95NC
Storage Temperature Range............................ -55NC to +125NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
(TA= -40NC to +95NC, unless otherwise noted.) (Note 1)
DC ELECTRICAL CHARACTERISTICS
(VCC = +2.97V to +3.63V, TA= -40NC to +95NC, unless otherwise noted.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Main Supply Voltage VCC (Note 2) 2.97 3.63 V
High-Level Input Voltage
(SDA, SCL, SDAOUT) VIH:1 0.7 x VCC
VCC +
0.3 V
Low-Level Input Voltage
(SDA, SCL, SDAOUT) VIL:1 -0.3 +0.3 x VCC V
High-Level Input Voltage
(IN1, LOS, RSEL, TXD, TXF) VIH:2 2.0 VCC + 0.3 V
Low-Level Input Voltage
(IN1, LOS, RSEL, TXD, TXF) VIL:2 -0.3 +0.8 V
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Supply Current ICC (Notes 2, 3) 0.7 2 mA
Output Leakage
(LOSOUT, SDA, SDAOUT,
TXFOUT)
ILO 1FA
Low-Level Output Voltage
(CSEL1OUT, CSEL2OUT,
LOSOUT, SDA, SDAOUT,
SCLOUT, TXDOUT, TXFOUT)
VOL
IOL = 4mA 0.4
V
IOL = 6mA 0.6
High-Level Output Voltage
(CSEL1OUT, CSEL2OUT,
SCLOUT, SDAOUT, TXDOUT)
VOH IOH = 4mA VCC -
0.4 V
Input Leakage Current
(IN1, LOS, RSEL, SCL, TXD, TXF) ILI 1FA
Digital Power-On Reset POD 1.6 2.6 V
Analog Power-On Reset POA POA > POD by design 2.2 2.8 V

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
11Maxim Integrated
DAC ELECTRICAL CHARACTERISTICS
(VCC = +2.97V to +3.63V, TA= -40NC to +95NC, unless otherwise noted.) (Note 1)
ANALOG VOLTAGE MONITORING CHARACTERISTICS
(VCC = +2.97V to +3.63V, TA= -40NC to +95NC, unless otherwise noted.) (Note 1)
DIGITAL THERMOMETER CHARACTERISTICS
(VCC = +2.97V to +3.63V, TA= -40NC to +95NC, unless otherwise noted.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Delta-Sigma Input Clock
Frequency fDS 2.1 MHz
Reference Voltage Input (REFIN) VREFIN Minimum 0.1µF to GND 2 VCC V
Output Range 0 VREFIN V
Output Resolution See the Delta-Sigma Output and Reference
section for details (DAC FS[9:2] = FFh) 10 Bits
Output Impedance RDS VREFIN = 2.5V 45 100 I
Recovery After Power-Up tINIT_DAC From VCC > VCC LO alarm or warning See the Startup Timing
Characteristics table ms
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
ADC Resolution (Note 4) 13 Bits
INL TA= +25NC-3 +3 LSB
DNL -1 +1 LSB
Update Rate for Temperature,
TXMON (TXB/TXP),
RSSIP-RSSIN, VCC
tRR RSSIP-RSSIN requires only a coarse
conversion (Note 5) 30 ms
Update Rate for RSSIP-RSSIN tR/R2 RSSIP-RSSIN requires a fine conversion 36 ms
Input/Supply Offset (TXMON,
RSSIP, RSSIN, VCC) VOS (Notes 5, 6) -1 0 +1 LSB
Factory Setting Full Scale
TXMON and RSSIP-RSSIN coarse
(Notes 6, 7) 2.5 V
VCC (Note 7) 6.5536
RSSIP-RSSIN fine (Note 7) 312.5 µV
Temperature LSB Weighting 1/256 NC
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Thermometer Error TERR -40NC to +95NC, guaranteed by design -3 +3 NC

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
12Maxim Integrated
AC ELECTRICAL CHARACTERISTICS
(VCC = +2.97V to +3.63V, TA= -40NC to +95NC, unless otherwise noted.) (Note 1)
STARTUP TIMING CHARACTERISTICS
(VCC= +2.97V to +3.63V, TA= -40NC to +95NC, unless otherwise noted.) (Note 1)
3-WIRE DIGITAL INTERFACE SPECIFICATION
(VCC = +2.97V to +3.63V, TA= -40NC to +95NC, unless otherwise noted. Timing is referenced to VIL(MAX) and VIH(MIN).) (Note 1)
(See Figure 13.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
TXD Rising Edge to Fault Clear tOFF From hTXD (Notes 8, 9) 5Fs
TXD Falling Edge to TXDOUT
Falling tON From iTXD (Note 10) 5Fs
Recovery After Power-Up:
MAX3710 tINIT_3710 From hVCC > POA (Note 11) 1 ms
Recovery After Power-Up:
MAX3710 and MAX3945 tINIT_3945 From hVCC > VCC LO alarm or warning
(Note 12) 1 ms
Fault Assert Time
(to TXFOUT = 1) tINITR1 From iTXD 30 ms
Fault Reset Time at Power-On
(to TXFOUT = 0) tINITR2 From hVCC > POA, Figure 12c (Note 13) 12.5 ms
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Output Enable Time Following
POA tINIT (Notes 13, 14) 13 ms
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SCLOUT Clock Frequency fSCLOUT 1.05 MHz
SCLOUT Duty Cycle t3WDC 50 %
SDAOUT Setup Time tDS 500 ns
SDAOUT Hold Time tDH 100 ns
CSEL1OUT, CSEL2OUT Pulse-Width
Low tCSW 1Fs
CSEL1OUT, CSEL2OUT Leading
Time Before the First SCLOUT Edge tL1Fs
CSEL1OUT, CSEL2OUT Trailing
Time After the Last SCLOUT Edge tT1Fs
SDAOUT, SCLOUT Load CB3W Total bus capacitance on one line 10 pF

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
13Maxim Integrated
I2C AC ELECTRICAL CHARACTERISTICS
(VCC = +2.97V to +3.63V, TA= -40NC to +95NC, unless otherwise noted. Timing is referenced to VIL(MAX) and VIH(MIN).) (Note 1) (See
Figure 19.)
NONVOLATILE MEMORY CHARACTERISTICS
(VCC = +2.97V to +3.63V, unless otherwise noted.) (Note 1)
Note 1: Limits are production tested at TA= +25°C. Limits over the operating temperature range and relevant supply voltage
range are guaranteed by design and characterization. Typical values are not guaranteed.
Note 2: All voltages are referenced to ground. Current entering the IC is considered positive, and current exiting the IC is consid-
ered negative.
Note 3: Inputs are at supply rail. Outputs are not loaded. Does not include REFIN current. Measured using the Typical Operating
Circuit—GPON ONU.
Note 4: The ADC output is available internally as a 16-bit value. The 16 bits are derived by left-shifting the 13-bit ADC output by 3.
Note 5: Guaranteed by design.
Note 6: TXB (transmit bias) and TXP (transmit power) are separate ADC conversions that are performed on the same input pin, TXMON.
Note 7: Full scale is user-programmable.
Note 8: Time until faults are cleared (falling edge of TXFOUT).
Note 9: Time until rising edge of TXDOUT.
Note 10: Time until falling edge of TXDOUT.
Note 11: Time until completion of initial MAX3710 control registers configuration.
Note 12: Time until completion of initial MAX3945 and MAX3710 control registers configuration.
Note 13: VCC LO alarm or warning is enabled, a VCC conversion is completed, and VCC is above VCC LO alarm or warning. See
Figure 12c.
Note 14: DAC output valid, 3-wire writes from LUTs complete, and digital outputs valid.
Note 15: I2C interface timing shown is for fast-mode (400kHz) operation. This device is also backward compatible with I2C stan-
dard mode.
Note 16: CB= Total capacitance of one bus line in pF.
Note 17: EEPROM write begins after a STOP condition occurs.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SCL Clock Frequency fSCL (Note 15) 0 400 kHz
Clock Pulse-Width Low tLOW 1.3 Fs
Clock Pulse-Width High tHIGH 0.6 Fs
Bus Free Time Between STOP and
START Condition tBUF 1.3 Fs
START Hold Time tHD:STA 0.6 Fs
START Setup Time tSU:STA 0.6 Fs
Data in Hold Time tHD:DAT 0 0.9 Fs
Data in Setup Time tSU:DAT 100 ns
Rise Time of Both SDA and SCL
Signals tR(Note 16) 20 + 0.1CB300 ns
Fall Time of Both SDA and SCL
Signals tF(Note 16) 20 + 0.1CB300 ns
STOP Setup Time tSU:STO 0.6 Fs
Capacitive Load for Each Bus Line CB400 pF
EEPROM Write Time tW(Note 17) 20 ms
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
EEPROM Write Cycles At TA= +25NC50,000 —
At TA= +85NC10,000

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
14Maxim Integrated
Typical Operating Characteristics
(TA= +25°C, unless otherwise noted.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
DS1886 toc01
VCC (V)
SUPPLY CURRENT (mA)
3.853.603.353.10
0.35
0.40
0.45
0.50
0.55
0.60
0.65
0.70
0.75
0.80
0.30
2.85
SDA = SCL = VCC
-40°C
+25°C
+95°C
TXMON AND RSSI INL
DS1886 toc03
TXMON AND RSSI INPUT VOLTAGE (V)
TXMON AND RSSI INL (LSB)
2.01.51.00.5
-2
-1
0
1
2
3
-3
0 2.5
USING FACTORY-PROGRAMMED
FULL-SCALE VALUE OF 2.5V
VCC = 3.3V
DAC INL
DS1886 toc05
DAC POSITION (DEC)
DAC INL (LSB)
500400100 200 300
-1.5
-1.0
-0.5
0
0.5
1.0
1.5
2.0
-2.0
0
SUPPLY CURRENT vs. TEMPERATURE
DS1886 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
6010
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
0
-40
SDA = SCL = VCC
VCC = 2.85V
VCC = 3.3V
VCC = 3.9V
TXMON AND RSSI DNL
DS1886 toc04
TXMON AND RSSI INPUT VOLTAGE (V)
TXMON AND RSSI DNL (LSB)
2.01.51.00.5
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1.0
-1.0
0 2.5
USING-FACTORY PROGRAMMED
FULL-SCALE VALUE OF 2.5V
VCC = 3.3V
DAC DNL
DS1886 toc06
DAC POSITION (DEC)
DAC DNL (LSB)
500400300200100
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1.0
-1.0
0

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
15Maxim Integrated
Pin Configuration Pin Description
PIN NAME FUNCTION
1 CSEL2OUT Chip-Select Output. Part of the
3-wire interface to the MAX3945.
2 SCL I2C Serial-Clock Input
3 SDA Open-Drain I2C Serial-Data Input/
Output
4 TXFOUT Open-Drain Transmit Fault Output
5 LOS Loss-of-Signal Input
6 IN1 Digital Maskable Fault Input
7 TXD Transmit Disable Input
8, 15,
17 GND Ground
9 RSEL Rate Select Input
10 TXDOUT Transmit Disable Output
11, 12 RSSIP,
RSSIN Differential External Monitor Input
13 TXMON
External Monitor Input for Both
Transmit Power (TXP) and Transmit
Bias (TXB)
14, 16 VCC Power-Supply Input
18 DAC DAC Output
19 REFIN Reference Input for DAC Full Scale
20 CSEL1OUT Chip-Select Output. Part of the
3-wire interface to the MAX3710.
21 SCLOUT Serial-Clock Output. Part of the
3-wire interface to the MAX3710.
22 SDAOUT
Serial-Data Input/Output. Part
of the 3-wire interface to the
MAX3710.
23 LOSOUT Open-Drain Receive Loss-of-
Signal Output
24 TXF Transmit Fault Input
— EP Exposed Pad. Connect to ground.
TQFN
(4mm × 5mm × 0.75mm)
TOP VIEW
DS1886
1CSEL2OUT
2SCL
3SDA
4TXFOUT
5LOS
6IN1
7TXD
EP
19 REFIN
18 DAC
17 GND
16 VCC
15 GND
TXF LOSOUT SDAOUT SCLOUT CSEL1OUT
14 VCC
13 TXMON
8
GND
9
RSEL
10
TXDOUT
11
RSSIP
12
RSSIN
24 23 22 21 20
+

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
16Maxim Integrated
Block Diagram
ANALOG MUX
A2h MEMORY
EEPROM/SRAM
ADC CONFIGURATION/RESULTS,
SYSTEM STATUS/CONTROL BITS,
ALARMS/WARNINGS,
LOOKUP TABLES,
USER MEMORY
I2C
INTERFACE
3-WIRE
MASTER
TEMPERATURE
SENSOR
CONFIGURABLE
LOGIC
POA AND
POD
RESET
CALCULATED
TXP
EEPROM
256 BYTES
AT A0h
SDA
SCL
VCC
VCC
TXMON
TXB
MON_SEL
TXP
RSSIP
RSSIN
CONFIGURABLE
LOGIC
10-BIT
DELTA-SIGMA
13-BIT
ADC
DAC
SDAOUT
SCLOUT
CSEL1OUT
CSEL2OUT
TXFOUT
REFIN
TXDOUT
LOSOUT
TXD
TXF
IN1
RSEL
LOS
GND
DS1886
VCC
*See Figure 1a, 1b

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
17Maxim Integrated
Typical Operating Circuit—GPON ONU
LOS
TXFOUT
BENP/N
TXDOUTREFIN
TXD
FAULT
DISABLE
RSEL
LOS
LOSOUT
TXF
IN1
TX_FAULT
SDA
SCL
MODE_DEF2 (SDA)
RATE SELECT
LOS
MODE_DEF1 (SCL)
TX_DISABLE
LPD LASER SIGNAL DETECT
MOD
DAC
BIAS
DAC
EEPROM
2.5V REF
CURRENT MONITOR
DAC
DC-DC CONTROL
ADC
I2C
3W
DC-DC OUTPUT
3W
DS1886
MAX3710
DS3920
TXMON
RSSIP
BMON
MDIN
RSSIN
LOS
DAC
LA
APD-TIA
MD AND DFB
LDD

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
18Maxim Integrated
Typical Operating Circuit—10G PON ONU
LOS
TXFOUT
BENP/N
TXDOUTREFIN
TXD
FAULT
DISABLE
RSEL
LOS
LOSOUT
TXF
IN1
TX_FAULT
SDA
SCL
MODE_DEF2 (SDA)
RATE SELECT
LOS
MODE_DEF1 (SCL)
TX_DISABLE
LPD LASER SIGNAL DETECT
MOD
DAC
BIAS
DAC
EEPROM
2.5V REF
DC-DC CONTROL
ADC
I2C
3W
3W
DS1886
MAX3710
MAX3945
3W
TXMON
RSSIP
BMON
MDIN
10G LA
10G
APD-TIA
MD AND DFB
LDD
DAC
CURRENT MONITOR DC-DC OUTPUT
DS3920
RSSIN
1.25G TO 2.5G
TOSA

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
19Maxim Integrated
Detailed Description
The DS1886 integrates the control and monitoring func-
tionality required to implement an SFP or PON ONU
system using the Maxim MAX3710 or other compatible
laser driver and limiting amplifier. Key components of the
DS1886 are shown in the Block Diagram and described
in subsequent sections.
Monitors and Fault Detection
Monitors
The DS1886 monitors five ADC channels. This monitoring
combined with the alarm enables (A2h Table 01h/05h)
determines when/if the DS1886 turns off the MAX3710
DACs and triggers the TXFOUT and TXDOUT outputs.
All the monitoring levels and interrupt masks are user-
programmable. See Figure 1a.
Table 1. Acronyms
Figure 1a. ADC Channel Only for TXP when BURST_MODE = 1 in Table 02h, Register 89h
Figure 1b. ADC Channel
ACRONYM DESCRIPTION
ADC Analog-to-Digital Converter
APC Automatic Power Control
APD Avalanche Photodiode
DAC Digital-to-Analog Converter
LOS Loss of Signal
LUT LUT
NV Nonvolatile
QT Quick Trip
ROSA Receiver Optical Subassembly
SEE Shadowed EEPROM
ACRONYM DESCRIPTION
SFF Small Form Factor
SFF-8472 Document Defining Register Map of SFPs
and SFFs
SFP Small Form-Factor Pluggable
SFP+ Enhanced SFP
TE
Tracking Error. Deviation from linear of the
relationship between transmitted power and
monitor diode current.
TIA Transimpedance Amplifier
TOSA Transmit Optical Subassembly
TXP Transmit Power
1616
OFFSET
REGISTERS
16
16
RIGHT-SHIFT2
DETERMINED
BY KRMD
COMPARE
(MD0REGH[7:0] + 8
x MD1REGH[7:0])
65,536
TXP SCALE
TXFINT
SHIFT
ALARM AND WARNING
THRESHOLDS
RESULTS
REGISTERS
ALARM/
WARNING
FLAGS
ALARM/
WARNING
ENABLES
COUPLED*
SHIFT
RIGHT-SHIFT1
DETERMINED
BY KIMD
(A)
*USER HAS TO CALIBRATE THE GAIN USING THE SCALE REGISTERS
IN CASE RIGHT-SHIFTING IS DESIRED IN ORDER TO MAINTAIN CORRECT BIT WEIGHTING.
x
TXP =
ADC 13
OFFSET
REGISTERS
SCALE
REGISTERS
13 13
RIGHT-SHIFT
SETTINGS
COMPARE
ANALOG INPUT
TXFINT
SHIFT
ALARM AND WARNING
THRESHOLDS
ALARM/
WARNING
FLAGS
ALARM/
WARNING
ENABLES
COUPLED*
*USER HAS TO CALIBRATE THE GAIN USING THE SCALE REGISTERS
IN CASE RIGHT-SHIFTING IS DESIRED IN ORDER TO MAINTAIN CORRECT BIT WEIGHTING.
(B)
13 RESULTS
REGISTERS

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
20Maxim Integrated
ADC Monitors and Alarms
The ADC monitors temperature (internal temp sen-
sor), VCC, laser bias (TXB), laser power (TXP), and
receive power (RSSIC for coarse, RSSIF for fine)
using an analog multiplexer to measure them using
a round-robin scheme with a single ADC (see the
ADC Timing section). The voltage channels have a
customer-programmable full-scale range and all chan-
nels have a customer-programmable offset value that
is factory programmed to a default value (Table 2).
Additionally, TXB, TXP, RSSIC, and RSSIF can right-shift
results as described in the Right-Shifting ADC Result
section. This allows customers with specified ADC
ranges to calibrate the ADC input gain by a factor of
2nto measure small signals (thereby reducing the full
scale by a factor of 2n). The DS1886 can then right-shift
the results by n bits (effectively multiplying by a factor
of 1/2n) to maintain the bit weight of their specification.
See the Right-Shifting ADC Result and Enhanced RSSI
Monitoring (Dual Range Functionality) sections for more
information.
Alarms and Warnings
The ADC results (after right-shifting, if used) are
compared to the alarm and warning thresholds after
each conversion, and the corresponding alarms and/
or warnings are set, which can be programmed to
create the internal signal TXFINT. The status of TXFINT
can be read in A2h Lower Memory, Register 71h. TXFINT
is one of the signals used to trigger TXFOUT. TXFOUT
can be programmed to cause TXDOUT outputs. These
ADC thresholds are user-programmable, as are the
masking registers that can be used to prevent the alarms
from triggering the TXFOUT and TXDOUT outputs.
ADC Timing
Five analog channels are digitized in a round-robin
fashion in the order as shown in Figure 2. RSSI is
measured twice to obtain coarse and fine measure-
ments (RSSIC and RSSIF, respectively). The total time
required to convert all channels is tRR (see the Analog
Voltage Monitoring Characteristics table for details). After
each TXMON conversion, a 3-wire communication is
initiated to toggle the MON_SEL bit (bit 6 in the
MAX3710’s TXCTRL2 register, programmed through A2h
Table 02h, Register E5h, bit 6). This causes the laser
driver to alternate sending laser bias (TXB) and laser
power (TXP) signals to the DS1886’s TXMON input.
The DS1886 has a burst mode option to allow internal
calculation of TXP using the MD0 and MD1 register
values read from the MAX3710 over the 3-wire inter-
face. In this option, the sampled TXP value is ignored.
The TXP value in this burst mode is calculated as
follows:
(MD0 REGH [7:0] + 8 x
MD1 REGH [7:0]) x 65536
TXP TXP Scale =
TXP is then right-shifted (Figure 1a).
RIGHT-SHIFT1is determined by KIMD[1:0],
TXCTRL3[4:3] as follows:
Table 2. ADC Default Monitor Full-Scale Ranges
SIGNAL (UNITS) +FS SIGNAL +FS HEX -FS SIGNAL -FS HEX
Temperature (°C) 127.996 7FFFh -128 8000h
VCC (V) 6.5528 FFF8h 0 0000h
TXB, TXP, RSSIC, RSSIF (V) 2.4997 FFF8h 0 0000h
KIMD[1:0]
TXCTRL3[4:3] NO. OF RIGHT-SHIFTS
00 2
01 1
10 0
11 0