Microchip Technology SAMA5D3 XPLAINED User manual

2019 Microchip Technology Inc. DS50002884A-page 1
Scope
This user guide introduces the Microchip SAMA5D3 Xplained evaluation kit and describes the development and debug-
ging capabilities for applications running on a SAMA5D36 Arm®-based microprocessor unit (MPU).
This guide provides details on the SAMA5D3 Xplained evaluation kit. It is made up of four main sections:
•Section 1. “Evaluation Kit Specifications” describes the evaluation kit content and its main features.
•Section 2. “Power-Up” provides instructions to power up the SAMA5D3 Xplained board.
•Section 3. “Hardware Introduction” provides an overview of the SAMA5D3 Xplained board.
•Section 4. “Board Components” describes the SAMA5D3 Xplained board components.
Contents
• Boards
- One SAMA5D3 Xplained board
•Cables
- One Micro-AB type USB cable
• A welcome letter
Related Items
• SAMA5D3 Series Data Sheet
• SAMA5D3 Xplained Getting Started
SAMA5D3
X
PLAINED
SAMA5D3 Xplained Evaluation Kit User’s Guide
SAMA5D3 XPLAINED

SAMA5D3 XPLAINED
DS50002884A-page 2 2019 Microchip Technology Inc.
1. Evaluation Kit Specifications
1.1 Electrostatic Warning
1.2 Power Supply Warning
Table 1-1: Evaluation Kit Specifications
Characteristic Specifications
Temperature
Operating 0°C to +70°C
Storage -40°C to +85°C
Relative Humidity 0 to 90% (non-condensing)
RoHS status Compliant
Ordering code ATSAMA5D3-XPLD
WARNING
ESD-Sensitive Electronic Equipment!
The evaluation kit is shipped in a protective anti-static package. The board system must not be sub-
ject to high electrostatic potentials.
We strongly recommend using a grounding strap or similar ESD protective device when handling
the board in hostile ESD environments (offices with synthetic carpet, for example). Avoid touching
the component pins or any other metallic element on the board.
WARNING
Hardware Power Supply Limitation
Using a power adapter greater than 5Vcc (e.g. the 12Vcc power adapters from other kits such as
Arduino kits) may damage the board.
WARNING
Hardware Power Budget
Using the USB as the main power source (max. 500 mA) is acceptable only with the use of the on-
board peripherals and low-power LCD extension.
When external peripheral or add-on boards need to be powered, we recommend the use of an exter-
nal power adapter connected to a J2 DC Jack (can provide up to 1.2A on the 3.3V node).
Electrostatic
sensitive
device

2019 Microchip Technology Inc. DS50002884A-page 3
SAMA5D3 XPLAINED
2. Power-Up
Several power source options are available to power up the SAMA5D3 Xplained board.
The board can be:
• USB-powered through the USB Micro-AB connector (J6 connector - default configuration)
• Powered through an external AC-to-DC adapter connected via a 2.1 mm center-positive plug into the optional power jack of the
board. The recommended output voltage range of the power adapter is 5V at 2A.
• Powered through the Arduino shield
2.1 Power up the Board
Unpack the board, taking care to avoid electrostatic discharge. Simply connect the USB Micro-AB cable to the connector (J6).Then, con-
nect the other end of the cable to a free USB port of your PC.
2.2 Sample Code and Technical Support
After booting up the board, you can run sample code or your own application on the board. You can download sample code and get tech-
nical support from the Microchip website.
Linux®software and demos can be found on the website Linux4SAM.
WARNING
Unlike Arduino Uno boards, the SAMA5D3 Xplained board runs at 3.3V. The maximum voltage that
the I/O pins can tolerate is 3.3V. Providing higher voltages (e.g. 5V) to an I/O pin could damage the
board.
Table 2-1: Electrical Characteristics
Electrical Parameter Values
Input voltage 5 VCC
Maximum input voltage 6 VCC
Max DC 3.3V current available 1.2A
I/O Voltage 3.3V only

SAMA5D3 XPLAINED
DS50002884A-page 4 2019 Microchip Technology Inc.
3. Hardware Introduction
3.1 Introduction
The SAMA5D3 Xplained board is a fully-featured evaluation platform for Microchip SAMA5D3 series MPUs. It allows users to extensively
evaluate, prototype and create application-specific designs.
3.2 Equipment List
The SAMA5D3 Xplained board is built around the integration of a Cortex®-A5-based MPU (BGA 324 package) with external memory, dual
Ethernet physical layer transceiver, two SD/MMC interfaces, two host USB ports and one device USB port, one 24-bit RGB LCD interface
and one debug interface.
Seven headers, compatible with Arduino R3, are available for various shield connections.

2019 Microchip Technology Inc. DS50002884A-page 5
SAMA5D3 XPLAINED
3.3 Board features
Table 3-1: Board Specifications
Characteristics Specifications
PCB characteristics 125 x 75 x 20mm (10-layers)
Processor SAMA5D36 (324-ball BGA package) ARM Cortex-A5 Processor with ARM
v7-A Thumb2®instruction set, core frequency up to 536 MHz.
Processor clock sources 12-MHz crystal oscillator
32.768-kHz crystal oscillator
Memory 2 x 1Gb DDR2 (16M x 16 bits x 8 banks)
1 x 2Gb SLC NAND Flash (256M x 8 bits)
Optional on-board memory One Serial EEPROM SPI
One 1-Wire EEPROM
SD/MMC One 8-bit SD card connector
One optional 4-bit Micro-SD card connector
USB Two USB Hosts with power switch
One Micro-AB USB device
Display interface One LCD interface connector, LCD TFT Controller with overlay, alpha-
blending, rotation, scaling and color space conversion
Ethernet One Gigabit Ethernet PHY (GRMII 10/100/1000)
One Ethernet PHY (RMII 10/100)
Debug port One JTAG interface connector
One serial DBGU interface (3.3V level)
Expansion connectors
Arduino R3 compatible set of headers
The SAMA5D36 GPIO,TWI, SPI, USART, UART, Audio and ISI interfaces
are accessible through these headers.
Board supply voltage
5V from USB or power jack or Arduino shield
On-board power regulation is performed by a Power Management Unit
(PMU)
Battery On-board optional power Cap for CMOS backup
User interface Reset, wake-up and free user push button
One red user/power LED and one blue user LED

SAMA5D3 XPLAINED
DS50002884A-page 6 2019 Microchip Technology Inc.
4. Board Components
4.1 Board Overview
The full-featured SAMA5D3 Xplained board integrates several peripherals and interface connectors, as shown in Figure 4-1.
Figure 4-1: SAMA5D3 Xplained Board Overview
ATSAMA5D36
CU
1401 A
XXXXXXXXXX
ARM
J15 PIO Expansion
1Gb DDR2 Memory
1Gb DDR2 Memory
2Gb Nand Flash Memory
System Buttons
JTAG Interface
LCD Connector
Ethernet 10/100
GigaBit Ethernet
J18 PIO Expansion
Free User Push Button
ADC Inputs and CAN Interfaces
Debug Interface
SAMA5D36
Voltages and Reset Interface
ADC Inputs Expansion
Optional Supply Input
USB A Device
Supply Input
SPI Interface
J20 PIO Expansion
J19 PIO Expansion
XX
USB Host Interfaces
e
ctor
A
t

2019 Microchip Technology Inc. DS50002884A-page 7
SAMA5D3 XPLAINED
The SAMA5D3 Xplained board is equipped with the interface connectors described in Table 4-1.
Table 4-1: SAMA5D3 Xplained Board Interface Connectors
Header Interfaces to
J2 Main power supply
J6 USB-A device. Supports USB device using a Micro-AB connector
J7 (upper) USB-B Host. Supports USB host using a type A connector
J7 (lower) USB-C™ Host. Supports USB host using a type A connector
J23 Serial DBGU 3.3V level
J24 JTAG, 20-pin IDC connector
J10 SD/MMC connector
J11 Micro-SD connector
J12 Gigabit Ethernet ETH0
J13 Ethernet ETH1
J22 Expansion connector with all LCD controller signals for display module connection (QTouch®, TFT LCD
display with Touch Screen and backlight
C41 Optional SuperCap
J14–J21 Expansion connectors with Arduino R3 compatible PIO signals
– Various test points located on the board

SAMA5D3 XPLAINED
DS50002884A-page 8 2019 Microchip Technology Inc.
4.2 Function Blocks
Figure 4-2: Evaluation Kit Architecture
4.2.1 Processor
The SAMA5D3 Xplained board is built around the SAMA5D36, a Cortex-A5 application processor which combines high-performance com-
puting device with low-power consumption and a wide range of communication peripherals. It features a combination of user interface
functionalities and high data rate IOs, including LCD controller, touchscreen, camera interface, Gigabit and 10/100 Ethernet ports, high-
speed USB and SDIO.
The ARM Cortex-A5 supports the latest generation of DDR2 and NAND Flash memory interfaces for program and data storage. An internal
166-MHz multi-layer bus architecture associated with 24 DMA channels and two 64-Kbyte SRAM blocks, sustains the high bandwidth
required by the processor and the high-speed peripherals.
4.2.2 Clock Circuitry
The SAMA5D3 Xplained evaluation board features four clock sources:
• Two clocks are alternatives for the SAMA5D3 series processor main clock
• Two crystal oscillators are used for the GETH and Ethernet MII/RMII chip
Table 4-2: Main Components Associated with the Clock Systems
Quantity Description Component Assignment
1 Crystal for internal clock, 12 MHz Y1
1 Crystal for RTC clock, 32.768 kHz Y2
1 Oscillator for ethernet clock RGMII, 25 MHz Y3
1 Oscillator for ethernet clock RMII, 25 MHz Y4
JTAG
DBGU
JTAG & DBGU
SERIAL
DATA
Micro SD
CARD
10/100/1000
FAST ETHERNET
10/100
ETHERNET
SD
CARD
LCD
Connector FLASH ETH0 ETH1
PIO A,...EPIO A,...E
Single
PMU
Solution
5V INPUT
SAMA5D36
CORTEX®-A5 PROCESSOR
2Gb
DDR2
SDRAM
2Gb
NAND
FLASH
USB
DEVICE
USB
Host
x2
ANALOG Reference
VBAT
USER
LEDS PIO
Expansion Headers
Power rails
USB A,B,C
Reset
Force PwrOn
Push
Buttons
EBI
5V & 3V3
(Up to 4Gb)
(Up to 4Gb)

2019 Microchip Technology Inc. DS50002884A-page 9
SAMA5D3 XPLAINED
4.2.3 Power Supplies
The on-board power supply generation is based on the Active-Semi®Power Management Unit (PMU) featuring a 3-channel (3.3V / 1.8V
/1.2V or 1.0V) topology. For maximum efficiency, these supply channels are generated by three integrated step-down converters.
In addition to these 3 DCDC channels, 4 LDO channels with low noise and high PSRR performance are available for the application. These
channels are disabled at startup by default and can be turned on and adjusted under software control through an I²C link. They are also
used to supply the 2.5V VDDFUSE and the 3.3V VDDANA power inputs of the processor.
The power supply sequencing of the three primary channels is controlled by the PMU itself in full compliance with the SAMAD3 require-
ments. The turn-on sequence is: 3.3V first, then 1.8V and finally 1.2V.
Table 4-3 summarizes the power specifications.
WARNING
There is a known error on the ACT8865 I²C implementation. The port must be shut off after config-
uration or problems may occur with devices using the same I²C channel, e.g., TM43xx LCD display.
Refer to the ACT8865 data sheet at http://www.active-semi.com/ for more details.
WARNING
This evaluation kit was equipped with an engineering version of ACT8865 PMIC known as
ACT8865QI303-T. The singularity of this engineering version is that OUT4 and OUT5 outputs, nor-
mally enabled at power-up, are disabled at power-up. Consequently, VDDANA and VDDFUSE
power inputs of the processor are OFF when the external reset pin (NRST) is released. They must
therefore be turned on by software in the very first execution steps of the application. In particular,
VDDFUSE is needed to switch SAMA5D3 devices in Secure mode.
The engineering version ACT8865QI303-T of the active semi PMIC is end-of-life (EOL) and replaced
by ACT8865QI305-T devices that have OUT4 and OUT5 enabled by default at power-up. Refer to
the following application note:
https://active-semi.com/wp-content/uploads/ActiveSemi_-ACT8865QI305-
T_versus_ACT8865QI303-T.pdf
Table 4-3: Supply Group Configuration
Nominal Name Power Domains Power Source
3.0V VDDBU
The slow clock oscillator, the internal
32K RC, the internal 12 MHz RC and a part
of the system controller
Optional on-board battery
3.3V VDDIOP0 A part of peripheral I/O lines
PMU
3.3V VDDIOP1 A part of peripheral I/O lines
3.3V VDDUTMII The three USB interfaces
3.3V VDDOSC The main oscillator cells
3.3V VDDANA The analog-to-digital converter
1.2V VDDCORE The core, including the processor, the
embedded memories and the peripherals

SAMA5D3 XPLAINED
DS50002884A-page 10 2019 Microchip Technology Inc.
Note: Jumper footprints are available on-board to measure power consumption on main power lines. By default, the jumpers are not
implemented. They are short-circuited by a thin PCB wire. To use this functionality, open the short circuit and mount a 2-pin
jumper.
Figure 4-3: Board Power Management Schematic
1.2V VDDUTMIC The USB UTMI + core
PMU
1.2V VDDPLLA The PLLA cell
1.8V VDDIODDR DDR2 interface I/O lines
1.8V VDDIOM NAND, NOR Flash and SMC interface I/O
lines
3.0V to
3.3V ADVREF ADC reference voltage J15 header
2.5V VDDFUSE Fuse box for programming PMU
Table 4-3: Supply Group Configuration (Continued)
Nominal Name Power Domains Power Source
BP2 BP1
5V_MAIN
VDDCORE
VDDIOP1
VDDIOP0
VDDANA
VDDPLLA
VDDOSC
VDDIODDR
VDDIOM
AVDDL_PLL
DVDDL
AVDDL
FUSE_2V5
5V_MAIN
3V3
3V3
VDDUTMIC
3V3
TWCK_PMIC[7]
TWD_PMIC[7]
NRST
[5,9,10,11]
SHDN[5]
PC31
[7]
WKUP
[5]
PE30
[7]
(1V2)
(1V8)
(3V3)
(3V3)
(2V5)
RESETWAKUP or
Force Power ON
Auto
PWRON
(option)
PC27
PC26
C10
100nF
C10
100nF
L9 2.2uHL9 2.2uH
R14
50K
R14
50K
C21
2.2uF
C21
2.2uF
BP2BP2
C4
1uF
C4
1uF
C13
10uF
C13
10uF
R16 0RR16 0R
C23
2.2uF
C23
2.2uF
R17 2R2R17 2R2
C20
100nF
C20
100nF
MN1 ACT8865MN1 ACT8865
GNDP1
29
GNDA
2
INL45 5
VP1
31
INL67 6
GNDP2
28
VP2
26
GNDP3
14
EXPAD
33
VP3
16
NC2
25
VDDREF
23
nRST0
11
nIRQ
12
nPBSTAT
13
VSEL
20
NC1
18
PWRHLD
10
PWREN
17
SCL
21
SDA
22
REFBP
32
nPBIN
9
SW1 30
OUT1 1
OUT2 24
SW2 27
SW3 15
OUT3 19
OUT4 3
OUT5 4
OUT6 7
OUT7 8
C2
4.7uF
C2
4.7uF
JP1 DNP(JUMPER) JP1 DNP(JUMPER)
1 2
Q1
IRLML2502
Q1
IRLML2502
1
3
2
C5
1uF
C5
1uF
R19
100K 1%
R19
100K 1%
C1
4.7uF
C1
4.7uF
R15
0R
R15
0R
L11
180ohm at 100MHz
L11
180ohm at 100MHz
1 2
L8
180ohm at 100MHz
L8
180ohm at 100MHz
12
C18
47nF
C18
47nF
C22
2.2uF
C22
2.2uF
JP3 DNP(JUMPER)JP3 DNP(JUMPER)
1 2
R11 0RR11 0R
TP2
SMD
TP2
SMD
C26
4.7uF
C26
4.7uF
C6
1uF
C6
1uF
R6
1.5K 1%
R6
1.5K 1% L5 2.2uH
L5 2.2uH
JP4 DNP(JUMPER) JP4 DNP(JUMPER)
1 2
C25
100nF
C25
100nF
L6
10uH60mA
L6
10uH60mA
C3
4.7uF
C3
4.7uF
JP2 DNP(JUMPER) JP2 DNP(JUMPER)
1 2
R7
1.5K 1%
R7
1.5K 1%
C11
4.7uF
C11
4.7uF
R5 2R2R5 2R2
R8
10K
R8
10K
R4
1R
R4
1R
C17
100nF
C17
100nF
C9
10uF
C9
10uF
L7 2.2uHL7 2.2uH
C19
100nF
C19
100nF
L12
10uH60mA
L12
10uH60mA
C7
4.7uF
C7
4.7uF
R186 0RR186 0R
L3
180ohm at 100MHz
L3
180ohm at 100MHz
1 2
L1
180ohm at 100MHz
L1
180ohm at 100MHz
1 2
R12 49.9K
L10
180ohm at 100MHz
L10
180ohm at 100MHz
1 2
C15
10uF
C15
10uF
TP1
SMD
TP1
SMD
C14
100nF
C14
100nF
R18 1KR18 1K
C130
10nF
C130
10nF
C16
10uF
C16
10uF
C8
10uF
C8
10uF
R9 DNP(0R)R9 DNP(0R)
C24
2.2uF
C24
2.2uF
R13 0RR13 0R
R10 2R2R10 2R2
L4
10uH60mA
L4
10uH60mA
L2
180ohm at 100MHz
L2
180ohm at 100MHz
1 2
BP1BP1
C12
10uF
C12
10uF

2019 Microchip Technology Inc. DS50002884A-page 11
SAMA5D3 XPLAINED
4.2.3.1 Power Options
Several power options are available to configure the SAMA5D3 Xplained board powering scheme.
The power sources are selected by a set of 0R resistors.
The USB-powered operation is the default configuration. The power source is the USB device port (J6) connected to a PC or a mini-AB
5V DC supply. The USB supply is sufficient to power the board in most applications if USB host ports are not used. If USB host ports are
used, it is recommended to use a DC supply source.
Schematic diagrams of various power options are illustrated in Figure 4-4.
Figure 4-4: Input Powering Scheme Option Schematic
Note: USB-powered operation is a good “single cable” solution because it combines powering and board control through a unique
cable. Consequently, it eliminates the need for other wires and batteries. This power option is suitable for most projects that
only require 5 volts at up to 500 mA.
4.2.3.2 Mains Power Adapter
A mains power supply adapter can be used to provide power to the board. A regulated 5V DC supply of typically 2A is required but a
current range of 3A is recommended if the USB ports and expansion headers are likely to be used. It needs a 2.1 mm plug with a center-
hot configuration.
If you are using the USB host ports or expansion board Arduino shields, a higher current is required. To supply the full 500 mA per port,
a mains power adapter must be used.
4.2.3.3 VBAT
By default, VDDBU is delivered through the 3.3V node. An optional SuperCap (C41), used for real-time clock backup, is provided. The
board does not come equipped with the SuperCap. When the SuperCap is not installed, an R185 must be installed. You must make sure
that the R185 is removed prior to installing the SuperCap.
Figure 4-5: VBAT Powering Scheme Option Schematic
4.2.4 Reset Circuitry
The reset sources for the SAMA5D3 Xplained board are:
5V_MAIN
Vbus[5]
5V_Ext[11]
R175 0RR175 0R
J2
DNP(DC JACK)
J2
DNP(DC JACK)
3
1
2
R176 DNP(0R)R176 DNP(0R) D4
P4SMAJ5.0A
D4
P4SMAJ5.0A
1 2
R3 DNP(0R)R3 DNP(0R)
R1 0RR1 0R
R2 DNP(0R)R2 DNP(0R)
R177 DNP(0R)R177 DNP(0R)
TDI
TMS
TCK
TDO
NTRST
NRST
VDDBU
3V3
3V3
TMS
[11]
TCK
[11]
TDO
[11]
TDI
[11]
NRST[4,9,10,11]
NTRST
[11]
VBat
[11]
(Super)-Capacitor
energy storage
Place TP4 to Bottom
Populate R185 if
no Super Cap (C41)
R25 10KR25 10K
R185
1.5K 1%
R185
1.5K 1%
D1
BAT54CLT1
D1
1 2
3
TP4
SMD
TP4
SMD
C27
10nF
C27
10nF
C28
100nF
C28
100nF
C41
DNP(0.2F/3V3)
C41
DNP(0.2F/3V3)
TDO
M11
TMS
N10
TCK
P9
NTRST
P11
TDI
R8 JTAGSEL
T9
BMS
U9 TST
U15
NRST
V9
VDDBU V15
R23
1.5K 1%
R23
1.5K 1%
R21
100K 1%
R21
100K 1% R22
DNP(100K)
R22
DNP(100K)
R20 100RR20 100R

SAMA5D3 XPLAINED
DS50002884A-page 12 2019 Microchip Technology Inc.
• Power-on reset from the Power Management Unit (PMU),
• Reset Push button BP2,
• JTAG reset from an in-circuit emulator (through JTAG interface)
4.2.5 Memory Organization
The SAMA5D3x-series processor features a DDR2/SDRAM memory interface and an External Bus Interface (EBI) to interface with a wide
range of external memories and to almost any kind of parallel peripherals.
The memory devices that equip the SAMA5D3 Xplained evaluation kit are as follows:
• Two DDR2/SDRAM (MT47H64M16HR) used as main system memory (256 MByte). The board includes 2 Gbits of on-board sol-
dered DDR2 (double data rate) SDRAM. The footprints can also host two DDR2 (MT47H128M16RT) from Micron®for a total of 512
MBytes of DDR2 memory. The memory bus is 32 bits wide and operates with a frequency of up to 166 MHz (See Figure 4-6).
• One NAND Flash (MT29F2G08ABAEAWP) connected to the processor. The default size is 256 Mbytes. The footprint can also host
a 4-Gbit Micron chip for a total of 512 MBytes of NAND Flash memory (See Figure 4-7).
Figure 4-6: DDR2 Schematic
DDR_A8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D15
DDR_D14
DDR_A1
DDR_A9
DDR_A2 DDR_D2
DDR_A10
DDR_A3
DDR_A11
DDR_A4
DDR_A12
DDR_A5
DDR_D1
DDR_VREF
DDR_D0
DDR_A6
DDR_D4
DDR_D3
DDR_A7
DDR_D6
DDR_D5
DDR_D7
DDR_D8
DDR_A0
DDR_A8
DDR_D27
DDR_D26
DDR_D25
DDR_D31
DDR_D29
DDR_D28
DDR_D30
DDR_A1
DDR_A9
DDR_A2
DDR_A10
DDR_D18
DDR_A3
DDR_A11
DDR_A4
DDR_A12
DDR_A5
DDR_VREF
DDR_D17
DDR_D16
DDR_A6
DDR_D19
DDR_D20
DDR_D22
DDR_A7 DDR_D23
DDR_D21
DDR_D24
DDR_A0
DDR_DQM0
DDR_DQS1
DDR_DQS0
DDR_CS
DDR_BA0
DDR_BA1
DDR_BA2
DDR_CKE
DDR_WE
DDR_CLK
DDR_RAS
DDR_CLKN
DDR_CAS
DDR_DQM2
DDR_DQS2
DDR_DQS3
DDR_CS
DDR_BA0
DDR_BA1
DDR_BA2
DDR_WE
DDR_CKE
DDR_RAS
DDR_CLK
DDR_CAS
DDR_CLKN
DDR_A13
DDR_DQM1
DDR_DQM3
DDR_A13
VDDIODDR
VDDIODDR
VDDIODDR
VDDIODDR
DDR_A[0..13]
DDR_D[0..31]
C98
100nF
C98
100nF
C73 100nFC73 100nF
C100
100nF
C100
100nF
C68 100nFC68 100nF
R39 4.7KR39 4.7K
C93 100nFC93 100nF
C90 100nFC90 100nF
C69 100nFC69 100nF
R41 4.7KR41 4.7K
C91 100nFC91 100nF
C70 100nFC70 100nF
C97 100nFC97 100nF
MT47H64M16HR
DDR2 SDRAM
MN5
MT47H64M16HR
DDR2 SDRAM
MN5
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3
A10
M2
BA0
L2
ODT
K9
DQ0 G8
DQ1 G2
DQ2 H7
DQ3 H3
DQ4 H1
DQ5 H9
DQ6 F1
DQ7 F9
UDQS
B7
UDQS
A8
LDM
F3
VDD J9
VDD M9
VDDL J1
VREF J2
VDDQ E9
VSS A3
VSS E3
VDDQ A9
VDD E1
RFU1
A2
RFU2
E2
CKE
K2
CK
J8
CK
K8
CAS
L7
RAS
K7
WE
K3
CS
L8 VDDQ C3
VDDQ C7
VDDQ C9
VSSQ D8
VSSQ E7
VSSQ F2
VSSQ F8
VDD A1
VSS J3
A11
P7
BA1
L3
A12
R2
BA2
L1
VSS N1
VSSDL J7
VSSQ B2
RFU3
R3
DQ8 C8
DQ9 C2
DQ10 D7
DQ11 D3
DQ12 D1
DQ13 D9
DQ14 B1
DQ15 B9
VDD R1
VDDQ G1
VDDQ G7
VDDQ G9
VSS P9
VSSQ D2
VSSQ A7
VSSQ B8
VSSQ H2
VSSQ H8
VDDQ G3
VDDQ C1
UDM
B3
LDQS
E8 LDQS
F7
RFU4
R7
A13
R8
R40 4.7KR40 4.7K
C79 100nFC79 100nF
R36 DNP(1K) R36 DNP(1K)
C71 100nFC71 100nF
R42 4.7KR42 4.7K
MT47H64M16HR
DDR2 SDRAM
MN4
MT47H64M16HR
DDR2 SDRAM
MN4
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3
A10
M2
BA0
L2
ODT
K9
DQ0 G8
DQ1 G2
DQ2 H7
DQ3 H3
DQ4 H1
DQ5 H9
DQ6 F1
DQ7 F9
UDQS
B7
UDQS
A8
LDM
F3
VDD J9
VDD M9
VDDL J1
VREF J2
VDDQ E9
VSS A3
VSS E3
VDDQ A9
VDD E1
RFU1
A2
RFU2
E2
CKE
K2
CK
J8
CK
K8
CAS
L7
RAS
K7
WE
K3
CS
L8 VDDQ C3
VDDQ C7
VDDQ C9
VSSQ D8
VSSQ E7
VSSQ F2
VSSQ F8
VDD A1
VSS J3
A11
P7
BA1
L3
A12
R2
BA2
L1
VSS N1
VSSDL J7
VSSQ B2
RFU3
R3
DQ8 C8
DQ9 C2
DQ10 D7
DQ11 D3
DQ12 D1
DQ13 D9
DQ14 B1
DQ15 B9
VDD R1
VDDQ G1
VDDQ G7
VDDQ G9
VSS P9
VSSQ D2
VSSQ A7
VSSQ B8
VSSQ H2
VSSQ H8
VDDQ G3
VDDQ C1
UDM
B3
LDQS
E8 LDQS
F7
RFU4
R7
A13
R8
C94 100nFC94 100nF
C78 100nFC78 100nF
C74 100nFC74 100nFR38 0R R38 0R
C95 100nFC95 100nF
C75 100nFC75 100nF
C96 100nFC96 100nF
R37 0RR37 0R
C88 100nFC88 100nF
C80 100nFC80 100nF
C89 100nFC89 100nF
C82 100nFC82 100nF
R35 DNP(1K)R35 DNP(1K) C66 100nFC66 100nF
C83 100nFC83 100nF
C81 100nFC81 100nF
C84 100nFC84 100nF
C76 100nFC76 100nF
C86 100nFC86 100nFC85 100nFC85 100nF
C77 100nFC77 100nF
C67 100nFC67 100nF
C87 100nFC87 100nF
C92 100nFC92 100nF
C72 100nFC72 100nF
DDR_VREF
VDDIODDR
R46
1.5K 1%
R46
1.5K 1%
R45
1R
R45
1R
R47
1.5K 1%
R47
1.5K 1%
C101
4.7uF
C101
4.7uF
TP3
SMD
TP3
SMD
L16
10uH60mA
L16
10uH60mA
C102
100nF
C102
100nF
C104
100nF
C104
100nF
C103
4.7uF
C103
4.7uF

2019 Microchip Technology Inc. DS50002884A-page 13
SAMA5D3 XPLAINED
Figure 4-7: NAND Flash Schematic
The following memory part numbers are recommended:
4.2.6 SD/MMC Interface
The SAMA5D3 Xplained board features two high-speed Multimedia Card Interfaces (MCI).
• The first interface is used as an 8-bit interface (MCI0), connected to a SD/MMC card slot (J10) located on the bottom side of the
PCB.
• The second interface is used as a 4-bit interface (MCI1), connected to an optional Micro-SD card connector (J11) located on the top
side of the PCB.
The MCI0 SD card power line is enabled by default. It is PIO-controlled through a MOSFET transistor.
Note: The power source is VCC (3.3 volts).
4.2.6.1 J10 SD Card Slot
When a card is inserted into the SD/MMC connector, the Card Detect pin (PE0) is tied to ground.
Table 4-4: Recommended Memories
Part Number Supplier Size Type
MT47H128M16 Micron 2 Gb (16 M x 16 x 8 banks) DDR2 - BGA
MT47H128M32 Micron 4 Gb (32 M x 16 x 8 banks) DDR2 - BGA
MT29F2G08 Micron 2 Gb NAND Flash - TSOP
MT29F4G08 Micron 4 Gb NAND Flash - TSOP
NRD
NWE
M_EBI_D2
M_EBI_D4
M_EBI_D3
M_EBI_D6
M_EBI_D7
M_EBI_D5
M_EBI_D0
M_EBI_D1
NANDRDY
PE21
PE22
NCS3 VDDIOM
VDDIOM
(NANDCE)
(NANDCLE)
(NANDALE)
C105
100nF
C105
100nF
R48
100K 1%
R48
100K 1%
R50
100K 1%
R50
100K 1%
JP5
JUMPER
JP5
JUMPER
1
2
R49
100K 1%
R49
100K 1%
MN6
MT29F2G08ABAEAWP
MN6
MT29F2G08ABAEAWP
WE
18
N.C6
6
VCC 37
CE
9
RE
8
N.C11
20
WP
19
N.C5
5
N.C1
1
N.C2
2
N.C3
3
N.C4
4
DNU1
21
DNU2
22
N.C12
23
N.C13
24
R/B
7
I/O8_N.C 26
I/O9_N.C 27
I/O10_N.C 28
I/O0 29
VCC_N.C 34
N.C14
35
VSS 36
DNU3
38
VCC_N.C 39
VCC 12
VSS 13
ALE
17
N.C8
11 N.C7
10
N.C9
14
N.C10
15
CLE
16
VSS_N.C 25
I/O11_N.C 33
I/O1 30
I/O3 32
I/O2 31
I/O15_N.C 47
I/O14_N.C 46
I/O13_N.C 45
I/O7 44
I/O6 43
I/O5 42
I/O4 41
I/O12_N.C 40
VSS_N.C 48
C106
100nF
C106
100nF

SAMA5D3 XPLAINED
DS50002884A-page 14 2019 Microchip Technology Inc.
Figure 4-8: J10 SD Card Schematic
4.2.6.2 J11 SD Card Slot (optional)
When a card is inserted into the Micro SD connector, the Card Detect pin is tied to ground. This is detected on pin PE1 of the main pro-
cessor.
Figure 4-9: J11 Micro SD Card Schematic
4.2.7 Serial Peripheral Interface (SPI)
The SAMA5D3X-series processor features two high-speed Serial Peripheral Interfaces. One port is used to interface with the optional on-
board serial DataFlash®.
There are four main signals used in the SPI interface; Clock, Data In, Data Out, and Chip Select.
VDDIOP1
VDD_MCI0
VDDIOP1
VDDIOM
PD1[7]
PE2 [7]
PD9[7]
PD0
[7]
PD4[7]
PD3[7]
PE0[7]
PD6[7]
PD7[7]
PD8[7]
PD5[7]
PD2[7]
(MCI0_CD)
(MCI0_WP)
(MCI0_DA1)
(MCI0_DA0)
(MCI0_CK)
(MCI0_CDA)
(MCI0_DA3)
(MCI0_DA2)
(MCI0_DA4)
(MCI0_DA5)
(MCI0_DA7)
(MCI0_DA6)
C108
10uF
C108
10uF
R55
DNP(4.7K)
R55
DNP(4.7K)
R12268K R12268K
R182 22RR182 22R
R12768K R12768K
J10
7SDMM-B0-2211
J10
7SDMM-B0-2211
8
5
7
6
4
3
2
1
9
14
15
16
13
12
11
10
R5410K R5410K
R12468K R12468K
R53
100K 1%
R53
100K 1%
R57 0RR57 0R
R12668K R12668K R12168K R12168K
Q3
IRLML6402
Q3
IRLML6402
1
32
R12368K R12368K
R56
10K
R56
10K
R12868K R12868K
C109
100nF
C109
100nF
R12568K R12568K
VDDIOM
VDDIOP1
PB20[7]
PB21[7]
PB22[7]
PB23[7]
PB19[7]
PB24
[7]
PE1[7]
(MCI1_DA1)
(MCI1_CK)
(MCI1_CDA)
(MCI1_DA3)
(MCI1_DA2)
(MCI1_CD)
(MCI1_DA0)
Micro SD CARD INTERFACE - MCI1
C110
10uF
C110
10uF
R183 22RR183 22R
J11
DNP(MCTF-0403)
J11
DNP(MCTF-0403)
DAT0
7
DAT1
8
DAT2
1
DAT3
2
VDD
4
VSS
6
CD
9
PGND
10
PGND 11
PGND 12
PGND 13
NC 14
NC 15
CMD
3
CLK
5
R12968K R12968K
R59
10K
R59
10K
R5810K R5810K R13068K R13068K R112DNP(68K) R112DNP(68K) R13168K R13168K R13268K R13268K
C111
100nF
C111
100nF

2019 Microchip Technology Inc. DS50002884A-page 15
SAMA5D3 XPLAINED
Figure 4-10: Optional Serial DataFlash Schematic
PD11
PD12
PD10
PD13
VDDIOP1
VDDIOP1
(SPI0_MIS0)
(SPI0_MOSI)
(SPI0_SPCK)
(SPI0_CS)
C107
100nF
C107
100nF
MN8
DNP(N25Q032A13ESE40F)
MN8
DNP(N25Q032A13ESE40F)
HOLD/DQ3 7
GND 4
VCC 8
S
1
C
6
DQO
5
DQ1
2
W/Vpp/DQ2 3
JP6
JUMPER
JP6
JUMPER
1 2
R52
100K 1%
R52
100K 1%

SAMA5D3 XPLAINED
DS50002884A-page 16 2019 Microchip Technology Inc.
4.2.8 Optional 1-Wire EEPROM
The SAMA5D3 Xplained board can use a 1-Wire device as “soft label” to store data such as chip type, manufacturer’s name, production
date, etc.
Figure 4-11: Optional One-Wire EEPROM Schematic
4.2.9 10/100/100 Ethernet Port
The SAMA5D3 Xplained board features a MICREL PHY device (KSZ9031RN) operating at 10/100/1000 Mb/s. The board supports the
RGMII Interface mode. The Ethernet interface consists of four pairs of low-voltage differential pair signals designated from GRX± and
GTX± plus Control signals for link activity indicators. These signals are routed to the 10/100/1000BASE-T RJ45 connector (J12).
For monitoring and control purposes, LEDs are integrated in the RJ45 connectors to indicate activity, link, and speed status information
for the corresponding ports.
For more information about the Ethernet controller device, refer to the MICREL KSZ9031RN data sheet.
Figure 4-12: Gigabit Ethernet Schematic
PE23
VDDIOM
R51
1.5K
R51
1.5K
MN7
DNP(DS2431)
MN7
DNP(DS2431)
IO
2
GND
1
NC1 3
NC2 4
NC3 5
NC4 6
MN11
DNP(DS28E05)
MN11
DNP(DS28E05)
NC
2
IO
1
GND 3
PB3
PB2
PB1
PB0
PB4
PB5
PB6
PB7
ETH0_A+
ETH0_A-
ETH0_B-
ETH0_C+
ETH0_C-
ETH0_D+
ETH0_D-
PB16
PB11
PB13
PB9
PB17
PB10
ETH0_LED2
XI XO
ETH0_LED1
XI
XO
PB18
PB8
ETH0_B+
VDDIOP1
DVDDL
AVDDL
AVDDH
AVDDL_PLL
VDDIOP1
VDDIOP1
VDDIOP1
VDDIOP1
PB[0..31]
[7,8,10,11]
NRST [4,5,10,11]
G125CK
GTX0
GTX1
GTX2
GTX3
GRX0
GRX1
GRX2
GRX3
GTXCK
GTX_CTL
GRXCK
GRX_CTL
GMDC
GMDIO
INT_GETHR
10Base-T/100Base-TX/1000BASE-T
R64
4.7K
R64
4.7K
R68 22RR68 22R
+
C127
10uF
+
C127
10uF
C112 20pFC112 20pF
R61 1KR61 1K
C120
10nF
C120
10nF
R67
4.7K
R67
4.7K
C136
10nF
C136
10nF
+
C113
10uF
+
C113
10uF
Y3
25MHz
Y3
25MHz
1 23
4
C121
10nF
C121
10nF
C135
10nF
C135
10nF
C129
10nF
C129
10nF
+
C126
10uF
+
C126
10uF
C116 20pFC116 20pF
R69
4.7K
R69
4.7K
C119
10nF
C119
10nF
L17
180ohm at 100MHz
L17
180ohm at 100MHz
1 2
C122
10nF
C122
10nF
C115
10nF
C115
10nF
R65
4.7K
R65
4.7K
C134
10nF
C134
10nF
C128
10nF
C128
10nF
C118
10nF
C118
10nF
C114
10nF
C114
10nF
C133
10nF
C133
10nF
C123
10nF
C123
10nF
KSZ9031RNI
48-pin QFN
MN10
KSZ9031RN
KSZ9031RNI
48-pin QFN
MN10
KSZ9031RN
VSS_PS
13
LED2
15
DVDDH
16
LED1
17
DVDDL
14
TXD0
19
TXD1
20
TXD2
21
TXD3
22
DVDDL
18
DVDDL
23
GTX_CLK
24
TX_EN 25
DVDDL 26
RXD3 27
VSS 29
DVDDL 30
RXD1 31
RXD0 32
RX_DV 33
DVDDH 34
RX_CLK 35
MDC 36
MDIO 37
INT_N 38
DVDDL 39
DVDDH 40
CLK125_NDO 41
RESET_N 42
LDO_O 43
XO 45
XI 46
AVDDH 47
ISET 48
AVDDH
1
TXRXP_A
2
TXRXM_A
3
TXRXP_B
5
TXRXM_B
6
TXRXP_C
7
TXRXM_C
8
TXRXP_D
10
TXRXM_D
11
AVDDH
12
RXD2 28
AVDDL_PLL 44
P_GND 49
AVDDL
4
AVDDL
9
R66
4.7K
R66
4.7K
R63 12.1K 1%R63 12.1K 1%
C138
10nF
C138
10nF
R60 4.7KR60 4.7K
+
C117
10uF
+
C117
10uF
C137
10nF
C137
10nF R70 22RR70 22R
+
C132
10uF
+
C132
10uF
R62 22RR62 22R
EARTH_ETH0
ETH0_GND
R73 0RR73 0R
L18 180ohm at 100MHzL18 180ohm at 100MHz
12
ETH0_B+
ETH0_B-
ETH0_D+
ETH0_D-
ETH0_A+
ETH0_A-
ETH0_C+
ETH0_C-
ETH0_LED1
ETH0_LED2
AVDDH
VDDIOP1
EARTH_ETH0
ETH0_GND
LINK
ACT
Left Green LED
Right Yellow LED
C124
100nF
C124
100nF
R71470R R71470R
J12
48F-01GY2DPL2NL
J12
48F-01GY2DPL2NL
TD2+
3
TD1+
1
TD1-
2
TD3+
7
TD3-
8
RCT
6
TD2-
4
GRLA 11
GRLC 12
TD4+
9
TD4-
10
TCT
5
YELC 13
YELA 14
GND 15
GND 16
GND 17
GND 18
R72470R R72470R
R111 DNP(0R)R111 DNP(0R)
C125
DNP(10uF 0805)
C125
DNP(10uF 0805)

2019 Microchip Technology Inc. DS50002884A-page 17
SAMA5D3 XPLAINED
4.2.10 Ethernet 10/100 Port
The SAMA5D3 Xplained board features a MICREL PHY device (KSZ8081RNB) operating at 10/100 Mb/s. The board supports RMII inter-
face modes. The Ethernet interface consists of two pairs of low-voltage differential pair signals designated from GRX± and GTX± plus
Control signals for link activity indicators. These signals are routed to the 10/100BASE-T RJ45 connector (J13).
For monitoring and control purposes, an LED functionality is added on the RJ45 connectors to indicate activity, link, and speed status
information for the corresponding ports.
For more information about the Ethernet controller device, refer to the MICREL KSZ8081RNB controller manufacturer's data sheet.
Figure 4-13: RMII Ethernet Schematic
4.2.11 Indicators
Two LEDs are available on the SAMA5D3 Xplained board. Both can be software-controlled by the user.
• The red LED indicates that power is applied to the board (by default). It can be controlled via software.
• The blue LED is mainly controlled by one GPIO line.
Figure 4-14: LED Indicators Schematic
ETH1_XO
ETH1_XI
ETH1_XO
ETH1_XI
ETH1_LED0
ETH1_LED0
TX+TX+
TX-
RX+
RX-
RX-
RX+
TX-
ETH1_LED1ETH1_LED1
VDDIOP1 VDDIOP0
VDDIOP0
E1_AVDDT
VDDIOP0
EARTH_ETH1
EARTH_ETH1
GND_ETH1
VDDIOP0
EARTH_ETH1GND_ETH1
VDDIOP0
NRST [4,5,9,11]
ETH1_PC2 [7]
ETH1_PC3 [7]
ETH1_PC0 [7]
ETH1_PC5 [7]
ETH1_PC6 [7]
ETH1_PC7 [7]
ETH1_PC4 [7]
ETH1_PC8 [7]
ETH1_PC9 [7]
PB12 [7]
ETH1_PC1 [7]
10Base-T/100Base-TX
ACT
LINK
+
C148
10uF
+
C148
10uF
L19
180ohm at 100MHz
L19
180ohm at 100MHz
1 2
MN9
KSZ8081RNB
MN9
KSZ8081RNB
RXC/B-CAST_OFF 19
CRS/CONFIG1 29
COL/CONFIG0 28
TXD1 25
TXD0 24
TXEN 23
RXD3/PHYAD0 13
RXD2/PHYAD1 14
RXD1/PHYAD2 15
RXD0/DUPLEX 16
RXDV/CONFIG2 18
RXER/ISO 20
MDC 12
MDIO 11
INTRP/NAND 21
VDDA_3V3 3
VDDIO 17
RESET 32
TXP
7
TXM
6
RXP
5
RXM
4
VDD_1V2
2
GND
1
PADDLE
33
TXC
22
TXD2
26
TXD3
27
REXT
10
XO
8
XI
9
LED0/NWAYEN
30
LED1/SPEED
31
R116
10K R116 10K
+
C146
10uF
+
C146
10uF
R120
10K R120 10K
+
C144
10uF
+
C144
10uF
C139
100nF
C139
100nF
R114
10K R114 10K
R115
10K R115 10K
C147 20pFC147 20pF
C140
100nF
C140
100nF C141 2.2uFC141 2.2uF
R79 470RR79 470R
Y4
25MHz
Y4
25MHz
1 23
4
C142 100nFC142 100nF
R80 470RR80 470R
C149
20pF
C149
20pF
R766.49k/1% R766.49k/1% C143
100nF
C143
100nF
R75
1K
R75
1K
C145
100nF
C145
100nF
R74
1K
R74
1K
R113
10K R113 10K
R81 0RR81 0R
R78
10K
R78
10K
L20
180ohm at 100MHz
L20
180ohm at 100MHz
1 2
R77
10K
R77
10K
R117
10K R117 10K
R118
10K R118 10K
1
2
3
6
4
5
7
8
75
75
75 75
1nF
TD+
TD-
CT
NC
RD-
CT
TX+
TX-
RX+
RX-
RD+
Left Green LEDRight yellow LED
J1313F-64GYD2PL2NL
1
2
3
6
4
5
7
8
75
75
75 75
1nF
TD+
TD-
CT
NC
RD-
CT
TX+
TX-
RX+
RX-
RD+
Left Green LEDRight yellow LED
J1313F-64GYD2PL2NL
1
2
7
8
3
6
5
4
9
10 11 12
13
14
15
16
R119
10K R119 10K
PE23
PE24
3V3
PE[0..31][4,7,8,11]
LED
D3
RED
D3
RED
R34
470R
R34
470R
R33 100K 1%R33 100K 1%
Q2
IRLML2502
Q2
IRLML2502
1
32
R32
470R
R32
470R
D2
BLUE
D2
BLUE

SAMA5D3 XPLAINED
DS50002884A-page 18 2019 Microchip Technology Inc.
4.2.12 USB
The SAMA5D3 Xplained board features three USB communication ports:
• Port A: High-speed (EHCI) and full-speed (OHCI) host multiplexed with high-speed USB device Micro-AB connector (J6)
• Port B: High-speed (EHCI) and full-speed (OHCI) host, standard type A connector (J7 upper port)
• Port C: Full-speed OHCI host, standard type A connector (J7 lower port)
The two USB host ports are equipped with 500-mA high-side power switch for self-powered and bus-powered applications.
The USB device port A (J6) features a VBUS insert detection function through the ladder-type resistors R26 and R27.
Figure 4-15: USB Interface Schematic
4.2.13 Push Button Switches
The following push button switches are available:
• One board reset button (BP2). When pressed and released, this push button causes a Power-on Reset of the whole board.
• One wake-up push button that brings the processor out of Low-Power mode (BP1)
• One user push button (BP3)
Figure 4-16: Push Button Schematic
HHSDPC
HHSDMA
HHSDPA
HHSDMB
HHSDPB
HHSDMC
HHSDMC
HHSDPC
HHSDMB
HHSDPB
5V_USBB 5V_USBC
5V_USBB
5V_USBC
GNDUTMI
GNDUTMI
EARTH_USB
5V_MAIN
EARTH_USB
EARTH_USB_A
PE5 [7]
Vbus[4]
PE9
[7,11]
PE4 [7]
PE3 [7]
OVCUR_USB
USB A DEVICE INTERFACE
(VBUS_SENSE)
J7_USB_A_Up J7_USB_B_Down
EN5V_USBC
EN5V_USBB
C60
10pF
C60
10pF
32.768K
Y
2
Y2
1
1
2
3
3
4
4
R27
200K
R27
200K
C5
C5
3
3
20p
F
20pF
p
p
MN3
SP2526A-2E
MN3
SP2526A-2E
ENA 1
FLGA 2
ENB 4
OUTA
8
GNG
6FLGB 3
IN
7
OUTB
5
J6
UBAF-1015P
J6
UBAF-1015P
MN2H
SAMA5D3x_BGA324
MN2H
SAMA5D3x_BGA324
GNDCORE_1
A
A
1
1
6
6
GNDCORE_2
C
C
9
9
GNDIODDR_1
E
E
1
1
4
4
GNDIODDR_2
F10
F10
GNDIODDR_3
F13
F13
GNDIODDR_4
F15
F15
GNDIODDR_5
H1
H1
4
4
GNDIOP_1
J
J
7
7
GNDIOM_1
J1
J1
1
1
GNDANA
L4
ADVREF
VDDANA
GNDIOP_2
N1
N1
1
1
GNDCORE_3
N1
N1
3
3
GNDFUSE
P
P
4
4
GNDPLL
P
P
1
1
0
0
GNDUTMI_1
R12
VDDPLLA
VBG
R11
GNDCORE_4
T8
T8
GNDOSC
T11
T11
GNDBU
T13
T13
GNDCORE_5
T14
T14
GNDIOM_2
T17
T17
GNDIOP_3
U
U
7
7
VDDOSC
VDDUTMII
XIN32
U16
XOUT
V8
VDDUTMIC
XOUT32
V16
GNDCORE_6
V
V
1
1
7
7
GNDIOP_4
E
E
5
5
HHSDMA
V10
HHSDPA
U10
HHSDMC
V14
HHSDPC
U14
HHSDPB
U12 HHSDMB
V12
DIBN
U6
DIBP
V6
C61
100nF
C61
100nF
L21 180ohm at 100MHzL21 180ohm at 100MHz
12
C5
C5
6
6
20
pF
20pF
12MHz
3
3
3
4
4
4
4
C64
100nF
C64
100nF
R30
5.62K 1%
R30
5.62K 1%
L13
180ohm at 100MHz
L13
180ohm at 100MHz
1 2
C62
10uF
C62
10uF C63
100nF
C63
100nF
L15
180ohm at 100MHz
L15
180ohm at 100MHz
1 2
A
B
J7
Dual USB A
A
B
J7
Dual USB A
5
8
6
7
910
1
2
3
4
1112
R31 0RR31 0R
C5
C5
1
1
20p
F
20pF
p
p
L14
180ohm at 100MHz
L14
180ohm at 100MHz
1 2
C65
10uF
C65
10uF
R26 100K 1%R26 100K 1%
3
3
3
3
3
3
3
3
3
3
3
EARTH_USB_A
VBUS
DM
DP
ID
GND
VBUS
DM
DP
ID
GND
1
2
3
4
5
76
8
BP2 BP1
RESET
WAKUP or Force Power ON
Auto
PWRON
(option)
R14
50K
R14
50K
BP2BP2
C20
100nF
C20
100nF
GNDP1
29
GNDA
2
GNDP2
28
REFBP
32
nPBIN
9
Q1
IRLML2502
Q1
IRLML2502
1
3
2
R19
100K 1%
R19
100K 1%
R15
0R
R15
0R
C18
47nF
C18
47nF
C25
100nF
C25
100nF
R12 49.9K
C130
10nF
C130
10nF
BP1BP1
PE29
[7,11]
Place TP5 to Bottom
BP3BP3
TP5
SMD
TP5
SMD
USER BUTTON

2019 Microchip Technology Inc. DS50002884A-page 19
SAMA5D3 XPLAINED
4.2.14 LCD
The SAMA5D36 processor drives 24 bits of Data and Control signals to the LCD interface. Other signals are used to control the LCD and
are also routed to the J22 connector: TWI, SPI, 2 GPIOs for interrupt, ID for 1-Wire EEPROM (ID_SYS) and power supply lines.
4.2.14.1 LCD Connector
One 1.27 mm pitch 50-pin header is provided to gain access to the LCD signals.
Figure 4-17: LCD Expansion Header Interface Schematic
4.2.14.2 LCD Power
To operate correctly with various LCD modules, regardless of the processor, two voltage lines are available: 3V3 by default and 5V_MAIN,
both selected by 0R resistors R92 and R93.
4.2.15 Debug JTAG/ICE and DBGU
4.2.15.1 Debug JTAG/ICE
A 2x10-pin JTAG header is implemented on the SAMA5D3 Xplained board to enable the software development and debugging of the
board by using various JTAG emulators. The interface signals have a voltage level of 3.3V.
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA15
PA14
PA13
PA12
PA25
PA24
PC13
PC12
PC11
PC14
PC10
PC15
PE27
PE28
PA29
PA27
PA26
PE8
PE7
TWD_LCD
TWCK_LCD
PE23
PD10
PD11
PD12
PD16
PD20
PD21
PD22
PD23
PE6
NRST
TWCK_LCD
TWD_LCD
PA28
3V3
5V_MAIN
TWCK_LCD[7]
TWD_LCD[7]
LCD Connector
(ID_SYS)
(SPI0_SPCK)
(SPI0_MOSI)
(SPI0_MISO)
(SPI0_NPCS3)
(AD0)
(AD1)
(AD2)
(AD3)
(RST_LCD)
(LCDDAT0)
(LCDDAT1)
(LCDDAT2)
(LCDDAT3)
(LCDDAT4)
(LCDDAT5)
(LCDDAT6)
(LCDDAT7)
(LCDDAT8)
(LCDDAT9)
(LCDDAT10)
(LCDDAT11)
(LCDDAT12)
(LCDDAT13)
(LCDDAT14)
(LCDDAT15)
(LCDDAT16)
(LCDDAT17)
(LCDDAT18)
(LCDDAT19)
(LCDDAT20)
(LCDDAT21)
(LCDDAT22)
(LCDDAT23)
(LCDPCK)
(LCDVSYNC)
(LCDHSYNC)
(LCDDEN)
(LCDDISP)
(LCDPWM)
(IRQ2)
IRQ1)
R101 22RR101 22R
R103 22RR103 22R
R93 0RR93 0R
R102 DNP(0R) R102 DNP(0R)
R100 DNP(0R) R100 DNP(0R)
R184 22RR184 22R
R99 DNP(0R)R99 DNP(0R)
J22J22
FP520T1-50SR04
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
52
51
R92 DNP(0R) R92 DNP(0R)
R94 0RR94 0R
R96 22RR96 22R
R98 DNP(0R) R98 DNP(0R)
R97 22RR97 22R
R95 DNP(0R)R95 DNP(0R)
See
Errata section

SAMA5D3 XPLAINED
DS50002884A-page 20 2019 Microchip Technology Inc.
Figure 4-18: JTAG/ICE Interface Schematic
4.2.15.2 DBGU
The SAMA5D3 Xplained board has a dedicated serial port for debugging, which is accessible through the 6-pin male header J23. Various
interfaces can be used as USB/Serial DBGU port bridge, such as FTDI TTL-232R-3V3 USB to TTL serial cable or basic breakout board
for the 232/USB converter.
These interfaces are available on the following websites:
• Adafruit: http://www.adafruit.com/products/284
•Sparkfun:https://www.sparkfun.com/products/9873
Figure 4-19: DBGU Interface Schematic
R171 and R172 are optional (not implemented) resistors that can be used for power selection. Power can be delivered either by the
SAMA5D3 Xplained board or by the debug interface tool. To avoid a contention between your debug interface (e.g. FTDI) and the on-
board power system, be careful during the installation of one of these resistors.
4.2.16 Expansion Ports
Five 8-pin, one 10-pin, one 6-pin and one 2x18-pin headers (J14 to J21) are implemented on the board to enable the PIO connection of
various expansion cards that could be developed by users or by other sources. Due to multiplexing, different signals can be provided on
each pin. These connectors are mechanically- and footprint- compatible with the Arduino R3 shields. As the SAMA5D3 signals have a
voltage level of 3.3V, 5-V level shields must not be used on the SAMA5D3 Xplained.
In addition to its standard IO functionality, the SAMA5D3 processor can provide alternate functions to external IO lines available on the
J14 to J21 headers.
These alternate functions are:
• UARTs: UART0, UART1
• USARTs: USART0, USART1, USART2, USART3
• SPI: SPI1
TCK
TMS
RTCK
TDI
TDO
3V3
VDDIOP0
NRST [4,5,9,10]
TDO [5]
TDI [5]
TCK [5]
TMS [5]
NTRST [5]
JTAG
R106
100K 1%
R106
100K 1%
J24J24
1
2
34
5
6
7
8
9
10
11
12
13
15
17
19
14
16
18
20
R105
100K 1%
R105
100K 1%
R108 0RR108 0R
R104
100K 1%
R104
100K 1%
R109 0RR109 0R
R107
100K 1%
R107
100K 1%
R110 0RR110 0R
DEBUG
(TXD)
(RXD)
PE13
PE14
5V_MAIN
3V33V3
PB31
[7]
PB30
[7]
R190
68K
J23
P101-1*06SGF-116A-NX
1
2
3
4
5
6
R173 0R
R171DNP(0R)
R174 0R
R189
68K
R172DNP(0R)