Microgate SyncLink GT2 Instructions for use
SyncLinkGT2/GT4SerialAdapter
HardwareUser’sManual
MicroGateSystems,Ltd
http://www.microgate.com
MicroGate®andSyncLink®areregisteredtrademarksofMicroGateSystems,Ltd.
Copyright©2008‐2012MicroGateSystems,Ltd.AllRightsReserved
Contents
Overview.......................................................................................................................................................3
Features....................................................................................................................................................3
Specifications............................................................................................................................................3
Y‐Cables.........................................................................................................................................................4
SignalSpecifications......................................................................................................................................5
SingleEndedSignals(RS‐232/V.28)..........................................................................................................5
DifferentialSignals(RS‐422/RS‐485/V.11)................................................................................................5
ClockPolarity............................................................................................................................................5
SerialInterfaceSelection..............................................................................................................................7
DifferentialInputTermination......................................................................................................................8
DifferentialFail‐SafeBiasing.........................................................................................................................9
SerialConnectorPinAssignments..............................................................................................................10
RS‐232.....................................................................................................................................................11
V.35.........................................................................................................................................................12
RS‐422/RS‐449/RS‐485/RS‐530...............................................................................................................13
X.21.........................................................................................................................................................15
GeneralPurposeI/OSignals.......................................................................................................................16
DCGPIOSpecifications............................................................................................................................16
Overview
TheSyncLinkGT2andGT4SerialAdaptersareadd‐incardsforuseinsystemswithaPCIexpansionslot.
Thecardsprovidetwo(GT2)orfour(GT4)serialportsforusebythesystem.Avarietyofserialprotocols
andinterfacestandardsaresupported.Refertothesoftwaredocumentationincludedwiththecardfor
detailsonusingthecardforaspecificapplication.
Features
•MaximumSpeeds
10Mbpssynchronous
1.8432Mbpsasynchronouswithstandardoscillator(14.7456MHz)
4Mbpsasynchronouswithcustomoscillator(32MHz)
•SDLC,HDLC,BISYNC,MONOSYNC,ASYNC,rawbit‐synchronousprotocols
•SelectablehardwareCRC:CRC‐16,CRC‐32,None
•DPLLClockRecovery(x8andx16sampling)
•ClockGeneration
•Configurabletransmitpreambleandidlepatterns
•Encoding:NRZ,NRZB,NRZ‐L,NRZI,NRZ‐M,NRZ‐S,FM0,FM1,Manchester,differentialbiphaselevel
•SelectableinterfaceforRS‐232,V.35,RS‐422/485,RS‐530,RS‐449,X.21
•Optionalterminationfordifferentialinputs
•Optionalfailsafebiasingfordifferentialinputs
•Fullsetofcontrolandstatussignals(DTR,DSR,RTS,CTS,DCD,RI,LL,RL)
Specifications
•MicroGateFPGAserialcontroller(2or4ports)
•PCI3.0(compatiblewith5V,3.3V,andPCI‐Xslots)
•BusMasterDMAdatatransfer
•OperatingTemperature:0Cto60Cstandard,‐40Cto+85Coptional
•StorageTemperature:‐55Cto+125C
•Environmental:humidity0to95%non‐condensing;alt.‐200to+20,000ft
•Mechanical:StandardPCIshortcard;length6.875",height4.2",Weight5.5Oz
•Powerusage:300mA5V,80mA+12V,80mA‐12V
•Regulatory:FCCClassB,CE,ANSIC63.4ClassB,VCCIClassB,EN55022ClassB,EN55024,RoHS
•Connectors:DB‐25(male)
•CableOptions:DB‐25(female)toDB‐25(male);DB‐25(female)to34‐pinV.35(male);DB‐25
(female)to37‐pinRS‐449(male);DB‐25(female)to15‐pinX.21(male)
YCables
Thecardhastwo60‐pinconnectors,eachcarryingtwoports.Y‐cablesareincludedwiththecardto
converteach60‐pinconnectorintotwostandardDB‐25maleconnectors.TheGT2cardusesone60‐pin
connectorandincludesasingleY‐cableforatotalof2ports.TheGT4cardusesboth60‐pinconnectors
andincludestwoY‐cablesforatotalof4ports.EachbranchofaY‐cableislabeledwithaportnumber.
TheY‐cablelabeled1and2shouldbeinstalledonthe60‐pinconnectorclosesttothePCIedge
connector(goldfingers).TheY‐cablelabeled3and4shouldbeinstalledonthe60‐pinconnector
farthestfromthePCIedgeconnector.
includedwiththecardto
converteach60‐pinconnectorintotwostandardDB‐25maleconnectors.TheGT2cardusesone60‐pin
connectorandincludesasingleY‐cableforatotalof2ports.TheGT4cardusesboth60‐pinconnectors
andincludestwoY‐cablesforatotalof4ports.EachbranchofaY‐cableislabeledwithaportnumber.
TheY‐cablelabeled1and2shouldbeinstalledonthe60‐pinconnectorclosesttothePCIedge
connector(goldfingers).TheY‐cablelabeled3and4shouldbeinstalledonthe60‐pinconnector
farthestfromthePCIedgeconnector.
Note:TheserialcontrollerontheGT2hasonlytwoports.AddingaY‐cabletothesecond60‐pin
connectorofaGT2cardwillnotaddports3and4.
Note:TheserialcontrollerontheGT2hasonlytwoports.AddingaY‐cabletothesecond60‐pin
connectorofaGT2cardwillnotaddports3and4.
Figure1 Y‐CablesandPortNumbering
SignalSpecifications
Eachserialsignal(control,status,data,orclock)iscompatiblewithanelectricalspecificationthatis
selectedbyplacementofjumpersonthecard.Thissectionbrieflydescribesthespecificationssupported
bythecard.
SingleEndedSignals(RS232/V.28)
SingleendedsignalssupportedbythecardarecompatiblewithbothRS‐232andITUV.28standards.
Eachsingleendedsignalusesoneconductorinacable,andallsingleendedsignalsshareacommon
groundconductor.
•MaximumVoltageRange:+15to‐15V(betweensignalandground)
•+3Vto+15V(+5Vtypical)=control/statussignalonordatavalueof0
•‐3Vto‐15V(‐5Vtypical)=control/statussignaloffordatavalueof1
•Voltagebetween‐3Vto+3V=invalid(indeterminate)state
•Maxcablelength50feet
•Maxdatarate20kbps
Themaximumdatarateof20kbpsispartoftheRS‐232/V.28standards.TheSyncLinkcardcanoperate
atspeedsupto120kbpsdependingonthecablelengthandloading.Longercablesandincreased
loadingreducesthemaximumsupporteddatarate.
DifferentialSignals(RS422/RS485/V.11)
DifferentialsignalssupportedbythecardarecompatiblewithRS‐422,RS‐485andITUV.11standards.
Eachdifferentialsignalusestwoconductorsinacable(signalpair).Acommongroundconductoris
recommendedforusewithdifferentialsignalstoreducecommonmodevoltagesbetweencableends
whichmayresultinincorrectorimpairedoperation.
•MaximumVoltageRange:+5to‐5V(betweenconductorsinapair)
•+200mVto+5V(+2Vtypical)=control/statussignalonordatavalueof0
•‐200mVto‐5V(‐2Vtypical)=control/statussignaloffordatavalueof1
•Voltagebetween‐200mVto+200mVinvalid(indeterminate)state
•Maxcablelength4000feet
•Maxdatarate10Mbps
Longercablesandincreasedloadingreducesthemaximumsupporteddatarate.
ClockPolarity
Synchronousserialcommunications(HDLC/Bisync/Monosync)mayuseseparateclocksignalstocontrol
thetimingofdatasignals.Oneclockcycleequalsonebit.Therearetwoclockedges(risingandfalling)
foreachclockcycle.Ononeedge,thetransmitdataoutputchanges.Ontheotheredge,thereceive
datainputissampled.Theassignmentofclockedgestotransmitdatatransitionandreceivedata
samplingisreferredtoasclockpolarity.
TheSyncLinkcardusestheclockpolarityintheRS‐232/RS‐422/V.24/V.28/V.11standardsasdescribed
below:
RS‐232/V.28SingleEndedSignals
•+3Vto+15V(+5Vtypical)=clockon
•‐3Vto‐15V(‐5Vtypical)=clockoff
•OntoOffedge(fallingedge)=receivedatasample(bitcenter)
•OfftoOnedge(risingedge)=transmitdatatransition(bitedge)
RS‐422/RS‐485/V.11DifferentialSignals
•+200mVto+5V(+2Vtypical)=clockon
•‐200mVto‐5V(‐2Vtypical)=clockoff
•OntoOffedge(fallingedge)=receivedatasample(bitcenter)
•OfftoOnedge(risingedge)=transmitdatatransition(bitedge)
Mostserialcommunicationsequipmentusestheaboveclockpolarity,butsomenon‐standard
equipmentmayusetheoppositepolarity.Fordifferentialsignals,thepolaritycanbealteredbyinverting
theconductorsofeachclocksignalpair.
SerialInterfaceSelection
Theserialadaptersupportsdifferentinterfacetypeswhichareselectedbyplacementofjumpersonthe
card.Eachporthasthreerowsofheaders(pinsstickingupfromthecard).Eachrowislabeledwitha
portnumberandaninterfacetype(RS‐232,V.35,RS‐422/485).Placejumpersontheheaderrowlabeled
withthedesiredinterfacetype.Theinterfacetypemustmatchthatoftheconnectedcommunications
equipment.
Interfaceselectionispresetatthefactoryasspecifiedbytheorderingcode.Theselectionmaybe
changedbymovingthejumperstothedesiredheaderrowasdescribedabove.Useplierstoremovethe
jumpersfromthecurrentposition,carefullyworkingthejumpersloosefromtheheaders.Takecareto
notdamagethecardorcauseinjury.
Someinterfacetypesrequireaconversioncableinadditiontoaspecificjumpersettingtoprovidethe
necessaryconnectortype.RefertotheSerialPinAssignmentssectionformoredetails.
Figure2InterfaceSelectionJumpers
DifferentialInputTermination
EachportonthecardhasoptionalterminationofRS‐422/485differentialinputs.Whenaresistorpackis
installedinthesocketlabeled‘TERM’,alldifferentialinputsforthatportareterminatedwith120ohms.
Bydefaulttheterminationresistorpackisinstalledforallports.Thepresenceoftheterminationresistor
packdoesnotaffectsingleended(RS‐232/V.28)inputs.
Terminationisusedtoincreasesignalreliabilityathighspeeds(generally1Mbpsormore).Athigh
speeds,receiversateachendofacableshouldbeterminated.Foramulti‐dropsetups(morethan2
devicesonacable),donotterminatereceiversconnectedtothemiddleofthecable.Atslowerspeeds,
theterminationcanusuallyremainwithoutproblem.Removingterminationatslowerspeedsmayallow
theuseoflongercables.
Toremoveaterminationresistorpack,identifythesocketlabeled‘TERM’.Thenremovetheyellow
resistorpackfromtheblacksocketusingaflatheadscrewdriverorequivalenttool.Terminationcanbe
reinstalledbypressingtheresistorpackbackintothesocket.Takecarethatthepinsontheresistorpack
arenotbentandarefirmlyseatedintothesocket.
Figure3TerminationSockets
DifferentialFailSafeBiasing
Fail‐safebiasingisatechniquethatguaranteesdifferentialinputsignalsareinasteadystatewhennot
connectedtoanactivedifferentialoutput.Optionalfail‐safebiasingofalldifferentialinputs(RS‐422/RS‐
485/V.11)foraportisavailablebyinstallingaresistorpackinthesocketlabeled‘FAILSAFE’.Thisresistor
packisnotincludedbydefaultwiththehardware.ContactMicroGatesalestorequestfail‐saferesistor
packswhenorderingthehardware.
Fail‐safebiasingisonlyusedwhenaninputisnotconstantlydrivenbyanoutput,andthatinputis
terminated(seeprevioussectionondifferentialinputtermination).Whenaninputisnotterminated,
fail‐safebiasingintegraltoeachreceivercircuitmaintainstheinputinasteadystate.Whenaninputis
terminated,externalfail‐safebiasing(resistorpack)mayberequiredtoguaranteetheinputisina
steadystate.
Anexampleapplicationthatusesfail‐safebiasingisbusmodeconnectionswhereasinglecable
conductorpairisconnectedtoboththetransmitdataoutputandreceivedatainputformorethanone
station.Inthissetup,onlyoneoutputmaybeactiveatthesametimeandeachoutputisonlydriven
whensendingdata.Whennostationissending,theexternalfail‐safebiasingmaintainsavoltageonthe
cablepairthatkeepsinputsinasteadystate.
WARNING:Fail‐safebiasingmustbepresentononlyasinglestationconnectedtoacablepair.This
singlestationmaintainsthevoltageonthecabletokeepallconnectedinputsinasteadystate.Applying
fail‐safebiasingatmultiplepointsonacablemayresultinincorrectoperation.
Figure4FailSafeBiasingSockets
SerialConnectorPinAssignments
TheserialconnectorsontheendofeachbanchoftheY‐cableareDB‐25(25pins)maleconnectors.The
assignmentofsignalstotheconnectorpinsiscontrolledbytheinterfaceselectionjumpersonthecard.
ForinterfacetypesthatuseaconnectordifferentthanDB‐25anadaptercablepurchasedfrom
MicroGateisrequired.Thefollowingsectionsdescribethejumpersettingsandcablesforeach
supportedstandard.
RS232
TheRS‐232standardusessingleendedsignalsonaDB‐25connector.TheadapterDB‐25connector
followsthisstandardwhentheportjumpersareinstalledforRS‐232.Useanystraightthrough25
conductorDB‐25MtoDB‐25Fcable(suchasMicroGatePart#CMF000)toconnecttheadapter
connectortothecommunicationsequipment.
ThemaximumdataratesupportedbytheadapterwhenusingRS‐232is128Kbps.Cablelengthand
signalloadingmayreducethemaximumusabledataratefromthisvalue.
RS‐232DB‐25MaleDTE
SignalNameElectricalDescPin#Direction
Earth/ShieldGround1
TxD,TransmitDataRS‐232/V.282Output
RxD,ReceiveDataRS‐232/V.283Input
RTS,RequesttoSendRS‐232/V.284Output
CTS,CleartoSendRS‐232/V.285Input
DSR,DataSetReadyRS‐232/V.286Input
SignalGround7
DCD,DataCarrierDetectRS‐232/V.288Input
TxC,TransmitClockRS‐232/V.2815Input
RxC,ReceiveClockRS‐232/V.2817Input
LL,LocalLoopbackControlRS‐232/V.2818Output
DTR,DataTerminalReadyRS‐232/V.2820Output
RL,RemoteLoopbackControlRS‐232/V.2821Output
RI,RingIndicatorRS‐232/V.2822Input
AuxClk,DTEClockOutputRS‐232/V.2824Output
Figure5RS‐232Cable(Part#CMF000)
V.35
TheV.35standardusesamixofsingleendedanddifferentialsignalsona34pinblockconnector.Touse
thisstandard,installtheV.35jumpersontheportandusetheMicroGateV.35cable(Part#2534GT,
pictureshownbelow).
NotethattheLL,RL,andRIsignalsareavailableontheadapter’sDB‐25connectorwhentheV.35
jumpersareinstalled,butarenotavailable(NC=noconnect)onthe34pinblockconnectorwhenusing
theV.35cable.
ThemaximumdataratesupportedbytheadapterwhenusingV.35is10Mbps.Cablelengthandsignal
loadingmayreducethemaximumusabledataratefromthisvalue.
V.35MaleDTE
SignalNameElectricalDescDB25
Pin#
V.35Block
Pin#
Direction
Earth/ShieldGround1A
TxD(+/A),TransmitDataRS‐422/V.112POutput
RxD(+/A),ReceiveDataRS‐422/V.113RInput
RTS,RequesttoSendRS‐232/V.284COutput
CTS,CleartoSendRS‐232/V.285DInput
DSR,DataSetReadyRS‐232/V.286EInput
SignalGround7B
DCD,DataCarrierDetectRS‐232/V.288FInput
RxC(‐/B),ReceiveClockRS‐422/V.119XInput
AuxClk(‐/B),DTEClockOutputRS‐422/V.1111WOutput
TxC(‐/B),TransmitClockRS‐422/V.1112AAInput
TxD(‐/B),TransmitDataRS‐422/V.1114SOutput
TxC(+/A),TransmitClockRS‐422/V.1115YInput
RxD(‐/B),ReceiveDataRS‐422/V.1116TInput
RxC(+/A),ReceiveClockRS‐422/V.1117VInput
LL,LocalLoopbackControlRS‐232/V.2818NCOutput
DTR,DataTerminalReadyRS‐232/V.2820HOutput
RL,RemoteLoopbackControlRS‐232/V.2821NCOutput
RI,RingIndicatorRS‐232/V.2822NCInput
AuxClk(+/A),DTEClockOutputRS‐422/V.112424Output
Figure6V.35Cable(Part#2534GT)
RS422/RS449/RS485/RS530
TheRS‐422andRS‐485standardsdescribedifferentialelectricalsignalsbutnotconnectororpin
assignments.TheRS‐530andRS‐449standardsdefinespecificconnectorsandpinassignmentsusing
differentialsignals.ThedifferentialsignalsonthecardmeetbothRS‐422andRS‐485electrical
specifications.
RS‐530usesdifferentialsignalsonaDB‐25connector.TheadapterDB‐25connectorfollowsthis
standardwhentheportjumpersareinstalledforRS‐422/485.Useanystraightthrough25conductor
DB‐25MtoDB‐25Fcable(suchasMicroGatePart#CMF000)toconnecttheadaptertoRS‐530
communicationsequipment.
RS‐449usesdifferentialsignalsonaDB‐37connector.TousethisstandardinstalltheRS‐422/485
jumpersfortheportandusetheMicroGateRS‐449cable(Part#2537FM).
ThemaximumdataratesupportedbytheadapterwhenusingRS‐530orRS‐449is10Mbps.Cablelength
andsignalloadingmayreducethemaximumusabledataratefromthisvalue.
RS‐422/RS‐530/RS‐449MaleDTE
SignalNameElectricalDescDB25
RS‐530
Pin#
DB37
RS‐449
Pin#
Direction
Earth/ShieldGround11
TxD(+/A),TransmitDataRS‐422/V.1124Output
RxD(+/A),ReceiveDataRS‐422/V.1136Input
RTS(+/A),RequesttoSendRS‐422/V.1147Output
CTS(+/A),CleartoSendRS‐422/V.1159Input
DSR(+/A),DataSetReadyRS‐422/V.11611Input
SignalGround719
DCD(+/A),DataCarrierDetectRS‐422/V.11813Input
RxC(‐/B),ReceiveClockRS‐422/V.11926Input
DCD(‐/B),DataCarrierDetectRS‐422/V.111031Input
AuxClk(‐/B),DTEClockOutputRS‐422/V.111135Output
TxC(‐/B),TransmitClockRS‐422/V.111223Input
CTS(‐/B),CleartoSendRS‐422/V.111327Input
TxD(‐/B),TransmitDataRS‐422/V.111422Output
TxC(+/A),TransmitClockRS‐422/V.11155Input
RxD(‐/B),ReceiveDataRS‐422/V.111624Input
RxC(+/A),ReceiveClockRS‐422/V.11178Input
LL,LocalLoopbackControlRS‐232/V.281810Output
RTS(‐/B),RequesttoSendRS‐422/V.111925Output
DTR(+/A),DataTerminalReadyRS‐422/V.112012Output
RL,RemoteLoopbackControlRS‐232/V.282114Output
DSR(‐/B),DataSetReadyRS‐422/V.112229Input
DTR(‐/B),DataTerminalReadyRS‐422/V.112330Output
AuxClk(+/A),DTEClockOutputRS‐422/V.112417Output
Figure7RS‐530Cable(Part#CMF000)
Figure8RS‐449Cable(Part#2537FM)
X.21
X.21isaninterfacestandardusingdifferentialsignalsonaDB‐15connector.Tousethisstandard,install
theRS‐422/485jumpersonaportandusetheMicroGateX.21cable(Part#2515FM).
TheX.21signalnamesaredifferentthanthoseusedbytheadapterandotherinterfacestandards.The
mappingoftheX.21signalstotheadaptersignalsareshowninthetablebelow.
ThemaximumdataratesupportedbytheadapterwhenusingX.21is10Mbps.Cablelengthandsignal
loadingmayreducethemaximumusabledataratefromthisvalue.
X.21MaleDTE
SignalNameElectricalDescDB25
Pin#
DB15
Pin#
Direction
Earth/ShieldGround11
T+,TransmitDataRS‐422/V.1122Output
R+,ReceiveDataRS‐422/V.1134Input
I+,Indicator(DSR/DCD)RS‐422/V.116,85Input
SignalGround78
S‐,ClockInput(TxC,RxC)RS‐422/V.119,1213Input
I‐,Indicator(DSR/DCD)RS‐422/V.1110,2212Input
X‐,ClockOutput(AuxClk)RS‐422/V.111114Output
T‐,TransmitDataRS‐422/V.11149Output
S+,ClockInput(TxC,RxC)RS‐422/V.1115,176Input
R‐,ReceiveDataRS‐422/V.111611Input
C+,Control(DTR)RS‐422/V.11203Output
C‐,Control(DTR)RS‐422/V.112310Output
X+,ClockOutput(AuxClk)RS‐422/V.11247Output
Figure9X.21Cable(Part# 2515FM )
GeneralPurposeI/OSignals
Theserialcardhasanoptional14pinheaderthatprovidesgeneralpurposeinput/output(GPIO)signals
forapplicationspecificuses.ThesesignalsarecontrolledbyanapplicationusingtheserialAPI(Windows
andLinux).Eachsignalcanbeconfiguredtobeeitheraninputoranoutput.Inputscanbemonitored
andoutputscanbecontrolled.
DCGPIOSpecifications
Vil(inputlow)=‐0.5Vmin,0.8Vmax
Vih(inputhigh)=2.0Vmin,5.5Vmax
Vol(outputlow)=0.4Vmax
Voh(outputhigh)=2.4Vmin
Iol(outputlow)=24mAmax
Iil(outputhigh)=‐24mAmax
InputCurrent=+/‐10uAmax
GPIOsignalsare3.3VTTLcompatibleandinputsare5Vtolerant.
GPIOPinAssignments
Pin#Description
1Ground
2GCK0DedicatedspecialpurposeLVTTL
input–Leaveunconnected
3GPIO[6]
4GPIO[0]
5GPIO[7]
6GPIO[1]
7GPIO[8]
8GPIO[2]
9GPIO[9]
10GPIO[3]
11GPIO[10]
12GPIO[4]
13GPIO[11]
14GPIO[5]
TheGTadapterhasatotalof12generalpurposeI/Osignals(GPIO[0]toGPIO[11]).Bydefaultonpower
upallGPIOsignalsareconfiguredasinputs(directioncontrol=0).RefertotheserialAPIdocumentation
fordetailsonconfiguringandusingGPIOsignals.
WARNING:TakecarewhenconnectingtoGPIOsignalstopreventdamagetotheserialcard.Outputs
shouldonlybeconnectedtoinputsandnototheroutputs.Voltagelimitsasshownaboveshouldnotbe
exceeded.
This manual suits for next models
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