National Instruments 6509 Operating and maintenance manual

DAQ
Static DIO Register-Level Programmer Manual for
NI 6509, 651x, 6520, 6521, and 6528 Devices
Static DIO Register-Level Programmer Manual
November 2005
371580A-01

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Important Information
Warranty
The NI 6509, NI 6510, NI 6511, NI 6512, NI 6513, NI 6514, NI 6515, NI 6516, NI 6517, NI 6518, NI 6519, NI 6520, NI 6521, and NI 6528
are warranted against defects in materials and workmanship for a period of one year from the date of shipment, as evidenced by receipts or
other documentation. National Instruments will, at its option, repair or replace equipment that proves to be defective during the warranty period.
This warranty includes parts and labor.
The media on which you receive National Instruments software are warranted not to fail to execute programming instructions, due to defects
in materials and workmanship, for a period of 90 days from date of shipment, as evidenced by receipts or other documentation. National
Instruments will, at its option, repair or replace software media that do not execute programming instructions if National Instruments receives
notice of such defects during the warranty period. National Instruments does not warrant that the operation of the software shall be
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©National Instruments Corporation v Static DIO Register-Level Programmer Manual
Contents
About This Manual
How To Use the Manual Set..........................................................................................viii
Conventions ...................................................................................................................viii
Chapter 1
Getting to Know Your NI 6509/651x/6520/6521/6528 Device
Using Your NI 6509/651x/6520/6521/6528 ..................................................................1-2
PCI Interface....................................................................................................1-2
General Operation Registers............................................................................1-2
Chapter 2
Register Map and Descriptions
IO Port Data ...................................................................................................................2-4
IOPort(N)Data .................................................................................................2-4
IO Select Registers.........................................................................................................2-5
IOSelect(N) .....................................................................................................2-5
Rising Edge Sensitivity Configuration Registers ..........................................................2-6
RiseEdgeEnable(N) .........................................................................................2-6
Falling Edge Sensitivity Configuration Registers .........................................................2-7
FallEdgeEnable(N)..........................................................................................2-7
Filter Enable Registers...................................................................................................2-8
FilterEnable(N)................................................................................................2-8
Watchdog Timers High-Impedance Registers ...............................................................2-9
WatchdogHighImp(N).....................................................................................2-9
Watchdog Timer Enable Registers ................................................................................2-10
WatchdogEnable(N)........................................................................................2-10
Watchdog Timer High or Low Registers.......................................................................2-11
WatchdogHighLow(N)....................................................................................2-11
RTSI Enable Registers...................................................................................................2-12
RTSI_En(N) ....................................................................................................2-12
Non-recurring Registers.................................................................................................2-13
ID Register.......................................................................................................2-13
Clear Register ..................................................................................................2-14
Change Status Register....................................................................................2-15
Master Interrupt Control Register ...................................................................2-16
Revision Register.............................................................................................2-17
Filter Interval 32-Bit Register .........................................................................2-18
Automatic Clock Selection Register (PXI-6528 Only) ...................................2-19

Contents
Static DIO Register-Level Programmer Manual vi ni.com
Watchdog Timer Software Timeout Enable ................................................... 2-20
Watchdog Timer Expire Status ....................................................................... 2-21
Watchdog Timer Timeout Interval ................................................................. 2-22
RTSI Configuration Registers ....................................................................................... 2-23
RTSI Input Route ............................................................................................ 2-23
RTSI Pulse when Edge Detected .................................................................... 2-24
RTSI Pulse when Watchdog Timer Expires ................................................... 2-25
RTSI Trigger for Watchdog Timer ................................................................. 2-26
RTSI Edge Detection Configuration Register ................................................ 2-27
Chapter 3
Programming
Programming Examples ................................................................................................ 3-1
Using Interrupts and Other Advanced Functionality..................................................... 3-1
Programming Your Device without the NI Measurement Hardware DDK .................. 3-1
Initializing the PCI Bus ................................................................................................. 3-2
Example .......................................................................................................... 3-3
Appendix A
Technical Support Resources
Glossary
Index

©National Instruments Corporation ix Static DIO Register-Level Programmer Manual
About This Manual
This manual contains the following information you need to perform
register-level programming for your NI 6509, 651x, 6520, 6521, and 6528
digital I/O (DIO) devices:
• Address and function of each NI 6509/651x/6520/6521/6528 device
register for reading data, writing data, and implementing any standard
function of the industrial DIO feature set (watchdog timer, digital
filtering, change detection, and programmable power-up states) on the
digital lines
• Examples that show the programming steps necessary to execute an
operation
Use the change detection feature only if you are familiar with writing,
installing, and uninstalling interrupt service routines. This manual does not
cover writing, installing, and uninstalling interrupt service routines.
If you are programming using NI-DAQ driver software or application
development software such as LabVIEW, Measurement Studio for Visual
Studio .NET, or LabWindows™/CVI™, you do not need to read this manual.
Note While it is possible to program your DAQ device at the register level, National
Instruments strongly recommends using NI-DAQ driver software and application
development software such as LabVIEW, Measurement Studio for Visual Studio .NET, or
LabWindows/CVI to program your NI 6509/651x/6520/6521/6528 device for improved
productivity. NI-DAQ software provides easier programming with the same flexibility as
register-level programming.
NI-DAQ driver software will not work for your programming needs in some cases,
however. For example, if you are programming your DAQ device in an OS that is
unsupported in NI-DAQ, NI-DAQmx Base software could be used as an alternative. If your
OS is also unsupported in NI-DAQmx Base, you would then need to program your device
using the Static DIO Register-Level Programmer Manual for NI 6509, 651x, 6520, 6521,
and 6528 Devices.

About This Manual
Static DIO Register-Level Programmer Manual x ni.com
How To Use the Manual Set
The Static DIO Register-Level Programmer Manual for NI 6509, 651x,
6520, 6521, and 6528 Devices is one piece of the documentation set for
your data acquisition system. You could have any of several types of
manuals, depending on the hardware and software in your system. Use the
manuals you have as follows:
•Digital I/O Help—This help file describes how to use the National
Instruments 6509, 651x, 6520, 6521, and 6528 data acquisition (DAQ)
devices with NI-DAQ 7.0 or later. This help file also contains
specifications for each device. Programming options other than
register-level programming are also described here.
• Accessory installation guides or manuals—If you are using accessory
products, consult these guides when you are making your connections.
The terminal block and cable assembly installation guides or accessory
board user manuals explain how to physically connect the relevant
pieces of your system.
• DAQ Getting Started Guide
Conventions
The following conventions are used in this manual:
<> Angle brackets that contain numbers separated by an ellipsis represent a
range of values associated with a bit or signal name—for example,
DIG+0.<3..0>.
♦The ♦symbol indicates that the following text applies only to a specific
product, a specific operating system, or a specific software version.
This icon denotes a tip, which alerts you to advisory information.
This icon denotes a note, which alerts you to important information.
This icon denotes a caution, which advises you of precautions to take to
avoid injury, data loss, or a system crash.
bold Bold text denotes items that you must select or click in the software, such
as menu items and dialog box options. Bold text also denotes parameter
names.

About This Manual
©National Instruments Corporation xi Static DIO Register-Level Programmer Manual
italic Italic text denotes variables, emphasis, a cross reference, or an introduction
to a key concept. Italic text also denotes text that is a placeholder for a word
or value that you must supply.
monospace Text in this font denotes sections of code, programming examples, and
syntax examples. This font is also used for the proper names of programs,
subprograms, subroutines, device names, functions, operations, variables,
filenames and extensions, and code excerpts.

©National Instruments Corporation 1-1 Static DIO Register-Level Programmer Manual
1
Getting to Know Your
NI 6509/651x/6520/6521/6528
Device
The NI 6509 is a 96-bit, high-drive digital input/output (DIO) device for PCI, PXI, and
CompactPCI chassis. The NI 6509 features 96 TTL/CMOS-compatible digital I/O lines,
24 mA high-drive output, and the industrial DIO feature set. For more information on the
industrial DIO feature set, refer to the About This Manual section.
The NI 651xdevices are 30 V bank isolated data acquisition (DAQ) devices for PCI, PXI, or
CompactPCI chassis. The NI 651xdevices feature either 64 or 32 channels of various channel
count input/output signaling for sourcing (NI 6510/6512/6514/6516/6518) or sinking
(NI 6511/6513/6515/6517/6519) current. The NI 651xdevices also provide the industrial
DIO feature set. For more information on the industrial DIO feature set, refer to the About
This Manual section. Refer to Table 1-1 for more information on port directions for the
NI 651xdevices.
The NI 6520/6521 devices contain five Form A single-pole single-throw (SPST) non-latching
relay outputs, three Form C single-pole double-throw (SPDT) non-latching relay outputs, and
eight channel-to-channel isolated industrial inputs. The NI 6520/6521 devices provide
16 channels of digital I/O (eight optically isolated digital input channels and eight
non-latching relay output channels), and the industrial DIO feature set. For more information
on the industrial DIO feature set, refer to the About This Manual section.
The NI 6528 device provides 24 isolated input channels, 24 isolated output channels,
real-time system integration (RTSI) capabilities, and the industrial DIO feature set. For more
information on the industrial DIO feature set, refer to the About This Manual section. The
NI 6528 is ideal for 60 V isolation and switching in both industrial and laboratory
environments.
For more information regarding the functions, installation, connections, and safe use of the
NI 6509/651x/6520/6521/6528 devices, refer to the Digital IO Help.

Chapter 1 Getting to Know Your NI 6509/651x/6520/6521/6528 Device
Static DIO Register-Level Programmer Manual 1-2 ni.com
Caution Using your NI 6509/651x/6520/6521/6528 device in a way inconsistent with the
directions in the Digital IO Help can lead to equipment damage or injury. National
Instruments is not liable for damage or injuries resulting from incorrect use.
Using Your NI 6509/651x/6520/6521/6528
• PCI interface
• General operation registers
PCI Interface
The NI 6509/651x/6520/6521/6528 use the PCI MITE Application-Specific Integrated
Circuit (ASIC) to communicate with the PCI or PXI bus. National Instruments designed this
ASIC specifically for data acquisition. Before register-level programming the
NI 6509/651x/6520/6521/6528 device, you must initialize the PCI interface as described in
Chapter 3, Programming.
General Operation Registers
Initialize the PCI interface before using the general operation registers. Read the ID Register,
one of the general operation registers, to verify the PCI interface is initialized properly. For
more information on the ID Register, refer to the ID Register section in Chapter 2, Register
Map and Descriptions.
The general operation registers include the IO Port Data registers and corresponding IO Select
registers for reading and writing data. There are also registers for controlling digital filtering,
change detection, the watchdog timer, RTSI output, and PXI synchronization. With the final
set of registers, you can read and reset the status of your device.
The general operation registers are organized into two groups—recurring and non-recurring
registers. Each port has a sequence of recurring registers for Data, IO Select, and other
port-specific features. This same set of registers is repeated for each port but incremented
0x10 times the port number above the base address. The non-recurring registers affect the
entire board and have set addresses.

Chapter 1 Getting to Know Your NI 6509/651x/6520/6521/6528 Device
©National Instruments Corporation 1-3 Static DIO Register-Level Programmer Manual
Table 1-1. NI 6509/651x/6520/6521/6528 Product Port Directions
Model
Port Direction
012345678910 (xA) 11 (xB)
PCI-6509 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O
PXI-6509 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O
PCI-6510 I I I I — — — — — — — —
PCI-6511 I I I I I I I I — — — —
PXI-6511 I I I I I I I I — — — —
PCI-6512 O O O O O O O O — — — —
PXI-6512 O O O O O O O O — — — —
PCI-6513 O O O O O O O O — — — —
PXI-6513 O O O O O O O O — — — —
PCI-6514 I I I I O O O O — — — —
PXI-6514 I I I I O O O O — — — —
PCI-6515 I I I I O O O O — — — —
PXI-6515 I I I I O O O O — — — —
PCI-6516 O O O O — — — — — — — —
PCI-6517 O O O O — — — — — — — —
PCI-6518 I I O O — — — — — — — —
PCI-6519 I I O O — — — — — — — —
PCI-6520 I O — — — — — — — — — —
PCI-6521 I O — — — — — — — — — —
PXI-6521 I O — — — — — — — — — —
PCI-6528 I I I O O O — — — — — —
PXI-6528 I I I O O O — — — — — —

©National Instruments Corporation 2-1 Static DIO Register-Level Programmer Manual
2
Register Map and Descriptions
Table 2-2 shows the register map for the NI 6509, 651x, 6520, 6521, and 6528 devices. The
table gives the register name, the register address offset from the device base address (Base
Address Register 1), the size of the register in bits, and the type of register (read-only,
write-only, or read and write).
Registers are grouped in the table by function. A bit-by-bit description of each register follows
the table.
The following sections show the register map for the NI 6509/651x/6520/6521/6528 devices
with the registers sorted by function.
All NI 6509/651x/6520/6521/6528 devices have the same addresses for common registers.

Chapter 2 Register Map and Descriptions
Static DIO Register-Level Programmer Manual 2-2 ni.com
Table 2-1. NI 6509/651x/6520/6521/6528 Register Address Map—Recurring Port Registers
Register Name Short Name Offset (Hex) Type Size
IO Port Data IOPort(N)Data 0x40 + 0xN0Read-write 8-bit
IO Select IOSelect(N)0x41 + 0xN0Read-write 8-bit
Rising Edge Sensitivity
Configuration
RiseEdgeEnable(N)0x42 + 0xN0Read-write 8-bit
Falling Edge Sensitivity
Configuration
FallEdgeEnable(N)0x43 + 0xN0Read-write 8-bit
Filter Enable FilterEnable(N)0x44 + 0xN0Read-write 8-bit
Watchdog Timer High
Impedance
WatchdogHighImp(N)0x46 + 0xN0Read-write 8-bit
Watchdog Timer Enable WatchdogEnable(N)0x47 + 0xN0Read-write 8-bit
Watchdog Timer High
or Low
WatchdogHighLow(N)0x48 + 0xN0Read-write 8-bit
RTSI Enable RTSI_En(N)0x49 + 0xN0Read-write 8-bit
Note:N is the port number in hexidecimal. Ports can range from 0 to 11 (0x0 to 0xB), depending on your device. For each
port, you must add an additional offset equal to 0x10 times the port number in hex.
Examples:
1. Offset of Port 6 Data Register (IOPort6Data) = 0x40 + 0x60 = 0xA0
2. Offset of Port 11 Filter Enable Register (FilterEn11) = 0x44 + 0xB0 = 0xF4
Table 2-2. NI 6509/651x/6520/6521/6528 Register Address Map—Non-recurring Registers
Register Name
Offset
(Hex) Type Size
ID Register 0x00 Read 8-bit
Clear Register 0x01 Write strobe 8-bit
Change Status Register 0x02 Read 8-bit
Master Interrupt Control Register 0x03 Read-write 8-bit
Revision Register 0x04 Read 32-bit
Filter Interval 32-bit Register 0x08 Read-write 32-bit
Automatic Clock Selection Register 0x14 Bit 0: Write
Bit 1: Read
8-bit

Chapter 2 Register Map and Descriptions
©National Instruments Corporation 2-3 Static DIO Register-Level Programmer Manual
The following pages provide a description of each register. The register bit map shows a
diagram of the register with the most significant bit (MSB), bit 7, on the left and the least
significant bit (LSB), bit 0, on the right. Each bit is represented by a rectangle with the bit
name inside. The size of the register indicates how many bits you should read or write at a
time. Reading a different size—for example, reading a 32-bit register with four 8-bit
reads—may create invalid data.
Table 2-3. NI 6509/651x/6520/6521/6528 Register Address Map—Watchdog Timer Registers
Register Name
Offset
(Hex) Type Size
Watchdog Timer Software Timeout Enable 0x15 Read-write 8-bit
Watchdog Timer Expire Status 0x17 Read 8-bit
Watchdog Timer Timeout Interval 0x18 Read-write 32-bit
Table 2-4. NI 6509/651x/6520/6521/6528 Register Address Map—RTSI Configuration Registers
Register Name
Offset
(Hex) Type Size
RTSI Input Route 0x0C Read-write 16-bit
RTSI Pulse when Edge Detected 0x0E Read-write 16-bit
RTSI Pulse when Watchdog Timer Expires 0x10 Read-write 16-bit
RTSI Trigger for Watchdog Timer 0x12 Read-write 16-bit
RTSI Edge Detection Configuration Register 0x16 Read-write 8-bit

Chapter 2 Register Map and Descriptions
Static DIO Register-Level Programmer Manual 2-4 ni.com
IO Port Data
IOPort(N)Data
This register is used to read digital data from or write data to port N, where Nis the port
number in hexidecimal.
Note Ports can range from 0 to 11 (0x0 to 0xB), depending on your device. For each port,
you must add an additional offset equal to 0x10 time the port number in hex.
Address Offsets: 0x40 + 0x(N)0
Type: Read-write
Size: 8-bit
Bit Map:
Bit Name Description
7–0 D(<7..0>) Read or write digital data at this address.
76543210
D(7) D(6) D(5) D(4) D(3) D(2) D(1) D(0)

Chapter 2 Register Map and Descriptions
©National Instruments Corporation 2-5 Static DIO Register-Level Programmer Manual
IO Select Registers
IOSelect(N)
This register configures bidirectional port Nas input or output, where Nis the port number in
hexidecimal.
Note Ports can range from 0 to 11 (0x0 to 0xB), depending on your device. For each port,
you must add an additional offset equal to 0x10 time the port number in hex.
Address Offset: 0x41 + 0x(N)0
Type: Read-write
Size: 8-bit
Bit Map:
Bit Name Description
7–1 Reserved Write only zeros to these bits.
0 I(1) / O(0) Write a 0 for input or a 1 for output.
Note It is not necessary to set this register if your device only supports fixed direction
ports.
76543210
Reserved Reserved Reserved Reserved Reserved Reserved Reserved I(1) / O(0)

Chapter 2 Register Map and Descriptions
Static DIO Register-Level Programmer Manual 2-6 ni.com
Rising Edge Sensitivity Configuration Registers
RiseEdgeEnable(N)
This register enables monitoring of input lines of port Nfor rising edges, where Nis the port
number in hexidecimal.
Note Ports can range from 0 to 11 (0x0 to 0xB), depending on your device. For each port,
you must add an additional offset equal to 0x10 time the port number in hex.
Address Offset: 0x42 + 0x(N)0
Type: Read-write
Size: 8-bit
Bit Map:
Bit Name Description
7–0 REE(<7..0>) Write a 1 to a bit to enable monitoring for the
corresponding line.
76543210
REE(7) REE(6) REE(5) REE(4) REE(3) REE(2) REE(1) REE(0)

Chapter 2 Register Map and Descriptions
©National Instruments Corporation 2-7 Static DIO Register-Level Programmer Manual
Falling Edge Sensitivity Configuration Registers
FallEdgeEnable(N)
This register enables monitoring of input lines of port Nfor falling edges, where Nis the port
number in hexidecimal.
Note Ports can range from 0 to 11 (0x0 to 0xB), depending on your device. For each port,
you must add an additional offset equal to 0x10 time the port number in hex.
Address Offset: 0x43 + 0x(N)0
Type: Read-write
Size: 8-bit
Bit Map:
Bit Name Description
7–0 FEE(<7..0>) Write a 1 to a bit to enable monitoring for the
corresponding line.
76543210
FEE(7) FEE(6) FEE(5) FEE(4) FEE(3) FEE(2) FEE(1) FEE(0)

Chapter 2 Register Map and Descriptions
Static DIO Register-Level Programmer Manual 2-8 ni.com
Filter Enable Registers
FilterEnable(N)
This register enables filtering of input lines of port N, where Nis the port number in
hexidecimal. In FilterEnable(N) registers, all lines of all ports share the same interval.
Note Ports can range from 0 to 11 (0x0 to 0xB), depending on your device. For each port,
you must add an additional offset equal to 0x10 time the port number in hex.
Address Offset: 0x44 + 0x(N)0
Type: Read-write
Size: 8-bit
Bit Map:
Bit Name Description
7–0 FLE(<7..0>) Write a 1 to a bit to enable filtering for the corresponding
line.
For more information on digital filtering registers, refer to the Filter Interval 32-Bit Register
section.
76543210
FLE(7) FLE(6) FLE(5) FLE(4) FLE(3) FLE(2) FLE(1) FLE(0)

Chapter 2 Register Map and Descriptions
©National Instruments Corporation 2-9 Static DIO Register-Level Programmer Manual
Watchdog Timers High-Impedance Registers
WatchdogHighImp(N)
This register configures port Nto go to high impedance when the watchdog timer (WDT)
expires, where Nis the port number in hexidecimal. WatchdogHighImp(N) is only valid for
bidirectional ports.
Note Ports can range from 0 to 11 (0x0 to 0xB), depending on your device. For each port,
you must add an additional offset equal to 0x10 time the port number in hex.
Address Offset: 0x46 + 0x(N)0
Type: Read-write
Size: 8-bit
Bit Map:
Bit Name Description
7–1 Reserved Write only zeros to this bit.
0 WDTHImp Write a 1 to this register to make the port go to high
impedance when the watchdog timer expires. Write a 0 to
this register to make the port output high/low values on a
per line basis. The watchdog timer must be enabled for
either option to activate.
7654321 0
Reserved Reserved Reserved Reserved Reserved Reserved Reserved WDTHImp
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