NXP Semiconductors KE15Z User manual

© 2016 NXP B.V.
KE15Z Touch Sensing Interface
1.Introduction
The purpose of this document is to explain the new TSI
(Touch Sensing Interface) measurement and how to
develop the software and hardware board from the
application point of view.
2.TSI Methods
Touch sensing interface (TSI) provides touch sensing
detection on capacitive touch sensors. The external
capacitive touch sensor is typically formed on PCB and
the sensor electrodes are connected to TSI input
channels through the I/O pins in the device.
KE15Z TSI supports 2 kinds of touch sensing methods,
the self-capacitive mode and the mutual-capacitive
mode, as showing in the figure below. Figure 1 shows
the self-capacitive mode, and Figure 2 shows the
mutual-capacitive mode.
NXP Semiconductors
Document Number: KE15ZTSIUG
User's Guide
Rev. 0
,
12/2016
Contents
1. Introduction ........................................................................1
2. TSI Methods.......................................................................1
2.1. Self-capacitive mode ...............................................2
2.2. Mutual-capacitive mode ..........................................5
3. TSI software configurations................................................7
3.1. Self-capacitive mode configurations........................7
3.2. Mutual capacitive mode configurations.................14
3.3. Q&A for software configurations..........................17
4. Hardware design guide .....................................................18
4.1. Electrode shapes....................................................18
4.2. PCB trace routing ..................................................19
4.3. Ground plane.........................................................20
4.4. Electrodes placement.............................................21
4.5. Hardware checklist................................................21
5. References ........................................................................22
6. Revision history................................................................22

TSI Methods
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Self-capacitive mode
Mutual-capacitive mode
2.1. Self-capacitive mode
2.1.1. Basic measurement
The self-capacitive mode requires single pin for each touch sensor and measures the capacitance on an
electrode connected to a single TSI channel. It then converts the capacitance into a digital count by
driving average current on the electrode and measuring the charge/discharge times.

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Self-capacitive mode
The figure describes the touch sensor structure of the self-capacitive mode:
•Cs: Intrinsic self-capacitance. 10pF ~ 50pF as usual.
•ΔCs: Touch generated self-capacitance. 0.3pF ~ 2pF as usual.
•Sensitivity of sensor: ΔCs/Cs. 1% 10% as usual.
Inside the TSI IP module, the charge transfer is operated by non-overlapping clock ph1/ph2 and trans-
conductance amplifier. The averaging current (icx) generates on Analog Front End and charges the
integration cap then the voltage ramp generates on vci as figure shown which is used to trigger the
comparator.
Block diagram of TSI self-capacitive mode
The following figure shows the timing of TSI measurement for the self-capacitive mode.

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Timing of TSI self-capacitive mode
The basic formula of the self-capacitive mode is listed below, NSTEP is the result of TSI single scan:
    󰇛  󰇜
      
The basic formula of the scan time is listed below, Tnstep is the time costed of TSI single scan:
    󰇛  󰇜
           
•Ci: Fixed 90pF, the integrated capacitance inside TSI module.
•Vdd3v: Fixed 3.3V, the analog power supply voltage.
•Vp, Vm: Configurable, dual reference voltage which can be configured by DVOLT<1:0>.
•S_XIN, S_XCH: Configurable, the parameters of analog front end.
•Fsw: Configurable, the switching clock frequency.
2.1.2. Sensitivity boost
The low sensitivity is caused by the big parasitic capacitance, and result in difficulty to recognize the
touch event. For example, when the touch overlay is very thick (like 12mm), it becomes very hard to
detect a touch event correctly, because of the poor sensitivity caused by the huge parasitic capacitance.
Enabling sensitivity-boost feature can increase sensitivity by removing part parasitic capacitance
virtually. So touch works well under the 12mm thick overlay with sensitivity boost enabled. Note that
the capacitance to be removed cannot be configured more than the intrinsic capacitance of the touch key,
else it causes the sensitivity invalid.
Attached below is the definition of the sensitivity:

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  
  
The large sensitivity value means the stronger signal caused by finger touch.
Sensitivity around 10% is recommended.
The TSI self-capacitive mode implements the sensitivity boost by cancelling the external intrinsic
capacitance, and the value of the capacitance to be cancelled ranges from 2.5pF to 20pF, which is
configurable in register TSI_MODE[S_CTRIM]. For example, given the intrinsic capacitance of the
touch electrode is 20pF (it can be calculated by NSTEP formula), setting the S_CTRIM value as 5.0pF
can make the effective intrinsic capacitance become 15pF. As the intrinsic sensitivity of the touch key is
given by ∆Cs/Cs, The less intrinsic capacitance would result in more sensitive touch response. With this
sensitivity boost enabled, sensitivity can be improved to ∆Cs/ (Cs-S_CTRIM*(S_XDN/S_XCH)). So
the formula to calculate the NSTEP under sensitivity boost is listed below:
    󰇛  󰇜
  󰇛    󰇛  󰇜󰇜    
•S_CTRIM: configurable, the capacitance to be removed.
•S_XDN/S_XCH: configurable, the capacitance multiplier.
•The actual capacitance to be removed is  󰇛  󰇜.
2.2. Mutual-capacitive mode
2.2.1. Basic Measurement
Mutual capacitive mode measures the capacitance between two electrodes connected to two TSI
channels. One of the TSI channels is used as transmit (TX) channel and the other one is used as receive
(RX) channel.
Figure 6 shows the connections of TSI channel in mutual-capacitive mode.

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Channel connections in mutual-capacitive mode
The transmit channel outputs pulses which couple through mutual-capacitance and then reach receive
channel. The receiver amplifies the signal and converts to averaging charge current on integration cap Ci
which creates step voltage Vci. The step number of each scanning is accumulated to give final count
TSICNT for each trigger.
Block diagram of TSI mutual-capacitive mode
There is no Cs in the formula below, since for mutual cap the effect of parasitic cap has been already
translated to dV=100mV. TX pulse goes the parasitic cap and mutual cap model and reaches RX
terminal. Signal you get from RX (ex: 100mV) is decided by Cs, Cm.
    󰇛  󰇜
      
•Ci: fixed 90pF, the integrated capacitance inside TSI module.
•Vp, Vm: configurable, dual reference voltage which can be configured by DVOLT<1:0>.
•: signal voltage Rx received, decided by VDD5V×
 , Cm is the mutual-capacitance, Cs is

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the parastic capacitance.
•Rs: Configurable, parameter of analog front end which can be configured by
M_SEN_RES<3:0>.
•
: Configurable, the current multiplier
•T3: Configurable, SSC output low period
The basic formula of the scan time is listed below, Tnstep is the time costed of TSI single scan:
    󰇛  󰇜
        
•Fsw: Configurable, the switching clock frequency.
For example, Ci=90pF, vp-vm=1v, Rs=10k, dV=100mV, M_L/M_R=4, Tsw/T3=4, so it will cost 160us
single scan time for TSI mutual mode.
2.2.2. Sensitivity boost
If the mutual touch sensor intrinsic sensitivity is limited due to parasitic, sensitivity boost feature can be
activated by setting M_SEN_BOOST<4:0>. The basis average charge current will be subtracted by
boost current which enlarge the signal current.
In one typical case, ΔV=100mV, Rs=10k, Vp-Vm=1V, Fsw=1MHz, Ci=90pF,
M_PMIRRORL=16, M_PMIRRORR= M_NMIRROR= 2; Dec=8, Order=2.
NSTEP=72; TSICNT=4608;
Note: Keep M_PMIRRORR and M_NMIRROR the same.
3.TSI software configurations
3.1. Self-capacitive mode configurations
The software configurations for the self-capacitive mode include:
clock generation
scan time
comparator
sensitivity boost
Attached below is an example of the configurations for the self-capacitive mode.

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Example of the configurations for the self-capacitive mode
3.1.1. Clock generation
The clock generation determines the TSI scan speed.
The TSI module is clocked by the main clock, which is generated by TSI module itself without any
other external clock source. The main clock has four ranges of frequency, and can be divided into the
switching clock which is used to control the ph1/ph2 switching speed (SwitchingClock), and finally
determines the whole scan time, as showing in the figure below.
Block Diagram of Clock Generation
When SSC_MODE=10b, then the switching clock is divided from main clock directly, as the basic
clock generation;
When SSC_MODE=00b/01b, then the switching clock is generated from SSC module, as the advanced
clock generation.
3.1.1.1.Basic clock generation
Attached below is the formula of the basic clock generation, when TSI_SSC0[SSC_MODE] = 10b.
  

Main clock setting
Setting: Main Clock
Register
Value
Main Clock(MHz)
TSI_MODE[SETCLK]
00
20.72
01
16.65
10
13.87
11
11.91

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Divider setting
Setting: Divider
Register
Value
Divider
TSI_SSC0.SSC_PRESCALE_NUM[7:0]
0000001
divide 2
0000011
divide 4
…
…
11111111
divide 512
There is an example of the basic clock generation, configure the main clock as 16.65MHz, and the
divider as 16, then the result of switching clock is 1.04Mhz.
Example: Basic Clock Generation
Main Clock(MHz)
Divider
Switching Clock (MHz)
16.65
16
1.04
3.1.1.2.Advanced clock generation, spread spectrum clocking
The spread spectrum clocking (SSC) increases the noise immunity to RF interference and spreads the
emissions. With the SSC enabled (TSI_SSC0[SSC_MODE] = 00/01), the switching clock is generated
by the SSC module, other than the direct divided main clock.
To improve the noise immunity, the Switching Clock can also be generated as a pseudo random clock
using the PRBS (Pseudo-Random Binary Sequence) method by setting TSI_SSC0[SSC_MODE] = 00,
then the SSCHighRandomWidth(t2) is configured as the random width.
Attached below is the formula of the advanced clock generation, with SSC enabled when
TSI_SSC0[SSC_MODE] = 00/01:
  
󰇛󰇜  󰇛󰇜  󰇛󰇜
*When TSI_SSC0[SSC_MODE] = 00, the SSCHighRandomWidth can be random(PRBS).
Figure below shows the timing of the switching clock generation.
Timing of the Advance Clock Generation with SSC enabled

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There’s an example of the advance clock generation attached below.
PRBS is enabled by setting SSC Mode = 00, then the SSC t2 is random. Setting SSCHighRandomWith
as 6 means the t2 ranges from 1×MainClock to 6×MainClock. As a result, the average t2 is
(1+6)/2=3.5×MainClock.
According to the formula of clock generation, the SwitchingClock = MainClock/(t1+t2+t3) =
16.65/(6+3.5+3) = 1.33MHz
3.1.2. Scan time
The scan time determines how long the TSI finishes the scan and get the conversion result. The typical
single scan time of the self-mode is around 200us, when the TSI acquisition time (switching clock) is
configured as 1us. In order to minimize the noise deviation on the single scan, TSI supports multiple
scan per channel, which means TSI performs scan operation for many times. The final scan result will
be accumulated in TSI_DATA[TSICNT] as the NSTEP of the single scan multiples scan number, and
the scan time will be the scan time of the single scan multiples scan number.
Multiple Scan per Channel
The scan number is configured by TSI_SINC[DECIMATION], [ORDER] and [CUTOFF], which allows
the scan number from 1 to. When the decimation is set to 0 (only once), the single scan is engaged.
The 16-bit counter accumulates all scan results until the scan number reaches predefined number, and
users can read TSI_DATA[TSICNT] to get the final scan result.
Variable Register Descriptions
t1 TSI_SSC0[BASE_NOCHARGE_NUM] SSCHighWidth
t2 TSI_SSC0[PRBS_OUTSEL] SSCHighRandomWidth
t3 TSI_SSC0[CHARGE_NUM] SSCLowWidth
Main Clock(MHz) SSC Mode
SSCHighWidth(t1)
SSCHighRandomWidth(t2)
SSCLowWidth(t3) Switching Clock(MHz)
16.65 00 6 6 3 1.33

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Please note there’re 2 kinds of scan number: one is for digital calculation to accumulate the final TSI
scan result, and the other is for TSI IP to execute the scan action practically.
 

   

So the parameters of Decimation, Order and Cutoff affects the final accumulated scan result and total
scan time as well. Setting the Order as 2 is recommended as it can save scan time to achieve the same
digital scan result.
Attached below is the formula of the scan result and the scan time:
         

         

There’re examples for the scan time configurations as attached below. Given the NSTEP is 161 and
Tnstep is 179us by the measurement of single scan.
Example 1, the Decimation, Order, and Cutoff are configured as 1, then the final scan result is 161, as
TSI performs scan operation for one time, and the scan time is 179us.
Example 2, change the Decimation to 2, then the final scan result becomes 321, as TSI performs scan
twice, and the scan time is 333, about twice of the previous 179.
Example 10, is recommended. Change the order to 2, then the final scan result becomes 161*64=10304,
but TSI only performs scan for 8*2=16 times, and the scan time is 2480us, saving a lot of time by
setting order =2.

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Please note that the scan time in this table is measured by the LPTMR module, that is starting LPTMR
on the TSI scan start, and stopping LPTMR on the TSI scan end, then read the LPTMR counter to
estimate the time costed, so there’re some inevitable small errors, i.e. small difference between the
LPTMR measurement and real TSI scan time. Overall, the bigger TSI conversion result means longer
scan time, as showing in the figure below:
Decimation
Order Cutoff
NSTEP
Multiple
Scan
Result
Scan
Number
TSI IP
Performs
Scan Time
(us)
161 179 11 1 1 161 1179
161 179 21 1 2 321 2333
161 179 41 1 4 644 4640
161 179 81 1 8 1288 81253
161 179 16 1 1 16 2576 16 2480
161 179 32 1 1 32 5152 32 4937
161 179 121 1 161 2333
161 179 221 4 644 4644
161 179 42116 2576 81253
161 179 82164 10304 16 2480
161 179 8 2 232 5152 16 2480
Configurations
Tnstep
(us)
Result
NSTEP
179 333 640
1253
2480
4937
0
1000
2000
3000
4000
5000
6000
161 321 644 1288 2576 5152
TSI Scan Time (us)
TSI Conversion Result(Counter)
TSI Scan Time / Conversion Result(Counter)

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3.1.3. Sensitivity boost
The sensitivity boost configurations include: S_SEN Enable, S_CTRIM, and
Multiplier(S_XDN/S_XCH).
The capacitance actually removed is:
    

Attached below is an example for sensitivity boost configurations.
From the example above, we can find out that the Cremoved is the key configuration to the sensitivity
boost feature, as Cremoved increases, the sensitivity becomes better, which means it’s easier to
recognize touch event.
Variable Register Descriptions
S_SEN Enable TSI_MODE[S_SEN] Enable sensitivity boost
S_CTRIM TSI_MODE[S_CTRIM] Remove the parasitic capacitance virtually
TSI_MODE[S_XDN] Sensitivity adjust
TSI_MODE[S_XCH] Charge/discharge multiple
Setting: Sensitivity Boost
Multiplier:
S_XDN/S_XCH
S_XIN S_XCH
Current
Amplifier
(S_XIN*S_XCH)
S_SEN
Enable
S_XDN
S_Ctrim
(pF)
Cremoved
(pF)
1/4 1/2 1/8 OFF 1/2 2.5 0.0 12 10.5%
1/4 1/2 1/8 ON 1/2 2.5 2.5 12 11.9%
1/4 1/2 1/8 ON 1/2 5.0 5.0 12 19.4%
1/4 1/2 1/8 ON 1/2 7.5 7.5 12 30.2%
1/4 1/2 1/8 ON 1/2 10.0 10.0 12 66.9%
1/4 1/2 1/8 ON 1/2 12.5 12.5 12 0.0%
Sensitivity Boost
Intrinsic
Capacitcance
Calculated
Cx
Sensitivity
Calculated
Current Amplifier
10.5% 11.9% 19.4%
30.2%
66.9%
0.0%
20.0%
40.0%
60.0%
80.0%
OFF 2.5 5.0 7.5 10.0
Sensitivity
Key Configuration: Capacitance Removed (pF)
Sensitivity Boost / Key Configuration
TSI Channel 12

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3.1.4. Comparator configuration
The comparator configuration of DeltaVoltage (TSI_GENCS[DVOLT]) controls the internal comparator
which is used to determine when TSI scan stops. Attached below is the detailed configurations, in most
cases, DeltaVoltage=1.0V is recommended.
3.2. Mutual capacitive mode configurations
The configurations for the mutual-capacitive mode include:
clock generation
scan times
sensitivity boost
Attached below is an example of the configurations for mutual mode.
3.2.1. Clock generation
The mutual mode shares the same clock generation of the self-mode, please refer to self-mode clock
generation for detailed configurations. Attached below is the same formula of SwitchingClock
generation:
  
󰇛󰇜  󰇛󰇜  󰇛󰇜
One difference to the self-mode clock, the SSC must be enabled for mutual mode to generate switching
clock, because the TSI Rx signal in the mutual mode depends on the TSI_SSC0[CHARGE_NUM](i.e.
t3) as showing in the figure below.
Variable Register Descriptions
DeltaVoltage TSI_GENCS[DVOLT]
Select comparator Vm, Vp.
00 Vm=0.3V; Vp=1.3V; dvolt=1.0V.
01 Vm=0.3V; Vp=1.6V; dvolt=1.3V.
10 Vm=0.3V; Vp=1.9V; dvolt=1.6V.
11 Vm=0.3V; Vp=2.3V; dvolt=2.0V.

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There’s an example of the clock generation configuration for the mutual mode.
PRBS is enabled by setting SSC Mode = 00, then the SSC t2 is random. Setting SSCHighRandomWith
as 6 means the t2 ranges from 1×MainClock to 6×MainClock. As a result, the average t2 is
(1+6)/2=3.5×MainClock.
According to the formula of clock generation, the SwitchingClock = MainClock/(t1+t2+t3) =
16.65/(6+3.5+3) = 1.33MHz, as the parameter of prescale doesn’t take effect here.
SwitchingClock = 16.65/(6+(6+1)/2+3) = 1.33MHz
3.2.2. Scan time
The scan time determines how long the TSI finishes the scan and get conversion result. The typical
single scan time of the mutual mode is around 100us, when the TSI acquisition time (switching clock) is
configured as 1us. Similar to the self-mode configurations, the mutual mode also support multiple scan
per channel, and the scan number is configured by TSI_SINC [DECIMATION], [ORDER], and
[CUTOFF].
Please refer to the chapter of self-mode scan time for the detailed descriptions.
Untouched
Touched Delta
Main
Clock
(MHz)
Prescale SSC
SSC High Width
ChargeNumber
t1
SSC High
Random
Width
t2
SSC
Low
Width
t3
Switching
Clock
(MHz)
5765 5920 155 16.65 16 ON 66 3 1.33
Counter
Clock Generation

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There’re examples for scan time configurations as attached below. Given the NSTEP is 95 and Tnstep is
90us by the measurement of single scan.
Example 1, the Decimation, Order, and Cutoff are configured as 1, then the final scan result is 95, as TSI
performs scan operation for one time, and the scan time is 90us.
Example 2, change the Decimation to 2, then the final scan result becomes 190, as TSI performs scan
twice, and the scan time is 159us, about twice of the previous 90us.
Example 10, is recommended. Change the order to 2, then the final scan result becomes 95*64=6080,
but TSI only performs scan for 8*2=16 times, and the scan time is 1128us, saving a lot of time by
setting order =2.
3.2.3. Sensitivity boost
Mutual capacitive mode supports sensitivity boost. Different to self-capacitive mode, mutual-capacitive
mode implement sensitivity boost by changing the current, which is configurable in register
TSI_MUL0[M_SEN_BOOST]. The current value ranges from 0uA to 62uA.
From the configuration above, we can find out that the boost current is the key configuration to the
sensitivity boost feature, as the boost current increases, the sensitivity becomes better, which means it’s
easier to recognize touch event, as showing in the figure below.
Decimation
Order Cutoff
NSTEP
Multiple
Scan
Result
Scan
Number
TSI IP
Performs
Scan
Time
(us)
95 90 1 1 1 1 95
190
95 90 2 1 1 2 190
2159
95 90 4 1 1 4 380
4297
95 90 8 1 1 8 760
8574
95 90 16 1 1 16 1520
16 1128
95 90 32 1 1 32 3040
32 2235
95 90 1 2 1 1 95
2159
95 90 2 2 1 4 380
4297
95 90 4 2 1 16 1520
8574
95 90 8 2 1 64 6080
16 1128
95 90 8 2 2 32 3040
16 1128
NSTEP
Tnstep
(us)
Configurations
Result
Variable Register Descriptions
Sensitivity Boost Current TSI_MUL0[M_SEN_BOOST] Choose the sensitivity boost current to change sensitivity

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Configuration: TSI Sensitivity vs. Current Boost
3.2.4. NOTES
If TSI mutual mode is enabled, all 6 Tx channels/pins are supposed to be used as TSI functions, any
unused Tx channel (e.g. PTD1/Channel5) can't be used as other functions(e.g. GPIO). For example, if 4
Tx pins are used by user for mutual touch keys, the left 2 unused Tx pins can't be used as GPIO or other
functions. The root cause is, when scanning one Tx channel, TSI IP pulls down all other Tx channels
(not in scan). All Rx channels don't have such limitation, as Rx channels keep hi-z during scanning.
3.3. Q&A for software configurations
1. Q: What is the purpose of TSI_MUL1[M_MODE]?
A: The bit of M_MODE determines the Rx signal received from Tx channel, as showing in the
figure below.
Setting M_MODE as 0 (i.e. -5V ~ +5V) is recommend as it’s more energy efficient.
Setting M_MODE
0.0%
1.0%
2.0%
3.0%
4.0%
0246810 12
Sensitivity
Current boost configuration (uA)
TSI Sensitivity / Current Boost
Configuration

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2. Q: If I use SSC in the self-mode and change SSC charge time, can I see some difference, is that
changing the result?
A: In the self-mode, changing the SSC charge time won’t affect the final scan result, but changes
the total scan time as it changes the switching clock frequency. While in the mutual mode,
changing the SSC charge time will change the Rx signal coupled from Tx channel, and will
affect the final scan result.
3. Q: How to set the parameters of the decimation, order and cutoff in TSI_SINC register properly?
A: These parameters affect the final accumulated TSI scan result, and the scan time as well. For
cost efficiency, setting decimation 8, order 2, cutoff 0 is recommended.
4.Hardware design guide
4.1. Electrode shapes
4.1.1. Electrode shapes for self mode
To maximize the electrodes area from the capacitor plates, it is recommended that the size of the
electrode be similar to a human finger (10×10mm is considered a good size).
Electrode shapes for self-mode
4.1.2. Electrode shapes for mutual mode
The following figure is the recommended mutual key shape. Please note that the numbers of finger has
much impact on the touch sensitivity. In general, more fingers result in stronger noise immunity but less
touch sensitivity. Customer should select the right finger numbers for the thickness of touch overlay. For
example, if the touch overlay is 3mm in thickness, 4 fingers is the best choice. If the touch overlay is
2mm in thickness, 5 fingers is ok.

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Electrode shapes for mutual mode
4.2. PCB trace routing
The following are recommendations for correctly routing the traces of capacitive electrodes.
•Width —Keep traces width as thin as possible. 5-7mil trace is recommended. A 5mil trace has
half the capacitive coupling with the planes compared to a 10mil trace.
•Length —As short as possible. Trace length must be less than 300mm, minimize trace length
from TSI pins to touch pads in order to optimize signal strength.
•Clearance —To ensure signal integrity, leave a minimum clearance of 10 mils for the lines that
run parallel to each other in the same layer, and route perpendicularly the ones running in
adjacent layers. Good design practice is to keep traces separated by as much as the design allows.
At the sensor's end, where typically the pitch is lower than 10 mils, a bottleneck mode
connection is recommended as shown in Figure 6. The figure below is an example for
maintaining adequate clearance in touch sensing traces.
PCB trace routing
•Avoid crossover with other signal.
•Avoid routing under touch electrode, do not route traces directly under any touch pad.
•For the mutual mode key, keep the Tx trace as far as possible from the Rx trace.

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4.3. Ground plane
A ground plane prevents coupling of external electromagnetic interference to the touch sensing
electrodes, and acts as a shield for undesired electric fields. However, abusing the ground planes or
simply filling open areas with ground planes might affect the sensor's sensitivity.
Following are a few recommendations and best practices for ground planes usage.
Use X-hatch pattern on the top layer, 25% ground fill, 7mil line, 45mil spacing.
Use X-hatch pattern on the bottom layer (e.g. underneath the electrodes area), 17% ground fill,
7mil line, 70mil spacing.
Ground plane
Annular gap size should be equal to the overlay thickness, but no smaller than 0.5 mm, and no larger
than 2 mm. For example, a PCB layout for a system with a 1-mm overlay should have a 1-mm annular
gap, while a 3-mm overlay design should have a 2-mm annular gap.