evertz 7847FS-EAES8-3G User manual

7847FS-EAES8-3G
USER MANUAL
© Copyright 2020
EVERTZ MICROSYSTEMS LTD.
5292 John Lucas Drive
Burlington, Ontario
Canada,
L7L 5Z9
Phone: [phone] Internet: Sales: [e-mail]
Sales Fax: [phone] Tech Support: [e-mail]
Tech Support Phone: [phone] Web Page: http://www.evertz.com
Tech Support Fax: [phone]
Version 1.4, March 2020
The material contained in this manual consists of information that is the property of Evertz Microsystems and is intended solely for
the use of purchasers of the7847FS-EAES8-3G product. Evertz Microsystems expressly prohibits the use of this manual for any
purpose other than the operation of the Servers.
All rights reserved. No part of this publication may be reproduced without the express written permission of Evertz Microsystems
Ltd. Copies of this guide can be ordered from your Evertz products dealer or from Evertz Microsystems.

This page left intentionally blank

IMPORTANT SAFETY INSTRUCTIONS
The lightning flash with arrowhead symbol within an equilateral triangle is
intended to alert the user to the presence
of uninsulated “Dangerous voltage”
within the product’s enclosure that may be of sufficient magnitude to constitute a
risk of electric shock to persons.
The exclamation point within an equilateral triangle is intended to alert the user
to the presence of important operating and maintenance (Servicing) instructions
in the literature accompanying the product.
•Read these instructions
•Keep these instructions.
•Heed all warnings.
•Follow all instructions.
•Do not use this apparatus near water
•Clean only with dry cloth.
•Do not block any ventilation openings. Install in accordance with the manufacturer’s instructions.
•Do not install near any heat sources such as radiators, heat registers, stoves, or other apparatus
(including amplifiers) that produce heat.
•Do not defeat the safety purpose of the polarized or grounding-type plug. A polarized plug has two
blades with one wider than other. A grounding-type plug has two blades and a third grounding prong.
The wide blade or the third prong is provided for your safety. If the provided plug does not fit into your
outlet, consult an electrician for replacement of the obsolete outlet.
•Protect the power cord from being walked on or pinched particularly at plugs, convenience
receptacles and the point where they exit from the apparatus.
•Only use attachments/accessories specified by the manufacturer
•Unplug this apparatus during lightning storms or when unused for long periods of time.
•Refer all servicing to qualified service personnel. Servicing is required when the apparatus has been
damaged in any way, such as power-supply cord or plug is damaged, liquid has been spilled or
objects have fallen into the apparatus, the apparatus has been exposed to rain or moisture, does not
operate normally, or has been dropped.
WARNING
TO REDUCE THE RISK OF FIRE OR ELECTRIC –
SHOCK, DO NOT EXPOSE THIS APPARATUS
TO RAIN OR MOISTURE
WARNING
DO NOT EXPOSE THIS EQUIPMENT TO DRIPPING OR SPLASHING AND ENSURE THAT NO
OBJECTS FILLED WITH LIQUIDS ARE PLACED ON THE EQUIPMENT
WARNING
TO COMPLETE
LY DISCONNECT THIS EQUIPMENT FROM THE AC MAINS, DISCONNECT THE
POWER SUPPLY CORD PLUG FROM THE AC RECEPTACLE
WARNING
THE MAINS PLUG OF THE POWER SUPPLY CORD SHALL REMAIN READILY OPERABLE

INFORMATION TO USERS IN EUROPE
NOTE
CISPR 22 CLASS A DIGITAL DEVICE OR PERIPHERAL
This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant
to the European Union EMC directive. These limits are designed to provide reasonable protection against
harmful interference when the equipment is operated in a commercial environment. This equipment
generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with
the instruction manual, may cause harmful interference to radio communications. Operation of this
equipment in a residential area is likely to cause harmful interference in which case the user will be
required to correct the interference at his own expense.
INFORMATION TO USERS IN THE U.S.A.
NOTE
FCC CLASS A DIGITAL DEVICE OR PERIPHERAL
This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant
to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference when the equipment is operated in a commercial environment. This equipment generates,
uses, and can radiate radio frequency energy and, if not installed and used in accordance with the
instruction manual, may cause harmful interference to radio communications. Operation of this equipment
in a residential area is likely to cause harmful interference in which case the user will be required to correct
the interference at his own expense.
WARNING
Changes or Modifications not expressly approved by Evertz Microsystems Ltd. could void the user’s
authority to operate the equipment.
Use of unshielded plugs or cables may cause radiation interference. Properly shielded interface cables
with the shield connected to the chassis ground of the device must be used.
EN60065
Safety
EN504192 2005
Waste electrical products should not be
disposed of with household waste.
Contact your Local Authority for recycling
advice
EN55103-1: 1996
Emission
EN55103-2: 1996
Immunity

7800/7700 MultiFrame Manual
7847FS-EAES8-3G - 3G Frame Synchronizer with Embedded Audio Processing & 8 AES Support
Revision 1.34Page i
REVISION HISTORY
REVISION
DESCRIPTION
DATE
1.0
First Release
June 2013
1.1 Minor updates to Figure 5-10, 5-11, added Delayed Injection, added
to table 5-6
Aug 2013
1.2
Major update throughout
Feb 2014
1.3
Updated Figure 1-1 and Figure 2-1
Jun 2014
1.4
Updated Section 2.4 AES Inputs
March 2020
Information contained in this manual is believed to be accurate and reliable. However, Evertz assumes no responsibility for the use thereof nor for
the rights of third parties, which may be affected in any way by the use thereof. Any representations in this document concerning performance of
Evertz products are for informational use only and are not warranties of future performance, either expressed or implied. The only warranty offered
by Evertz in relation to this product is the Evertz standard limited warranty, stated in the sales contract or order confirmation form.
Although every attempt has been made to accurately describe the features, installation and operation of this product in this manual, no warranty is
granted nor liability assumed in relation to any errors or omissions unless specifically undertaken in the Evertz sales contract or order confirmation.
Information contained in this manual is periodically updated and changes will be incorporated into subsequent editions. If you encounter an error,
please notify Evertz Customer Service department. Evertz reserves the right, without notice or liability, to make changes in equipment design or
specifications.

7800/7700 MultiFrame Manual
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Page ii Revision 1.34
TABLE OF CONTENTS
1. OVERVIEW .......................................................................................................................................1
2. INSTALLATION ................................................................................................................................3
2.1. INPUT/OUTPUT CONNECTIONS ............................................................................................4
2.2. ETHERNET CONNECTIONS ...................................................................................................5
2.3. GPI CONNECTOR....................................................................................................................6
2.4. AES INPUTS ............................................................................................................................7
2.5. AES OUTPUTS ........................................................................................................................8
3. SPECIFICATIONS...........................................................................................................................11
3.1. SERIAL DIGITAL VIDEO INPUTS..........................................................................................11
3.2. INPUT EQUALIZATION .........................................................................................................11
3.3. RETURN LOSS......................................................................................................................11
3.4. SERIAL DIGTIAL VIDEO OUTPUTS......................................................................................11
3.5. GENLOCK INPUT ..................................................................................................................11
3.6. GENERAL PURPOSE INPUTS..............................................................................................11
3.7. AES AUDIO INPUTS..............................................................................................................12
3.8. AES AUDIO OUTPUTS..........................................................................................................12
3.9. AUDIO....................................................................................................................................12
3.10. ELECTRICAL.........................................................................................................................12
3.11. PHYSICAL..............................................................................................................................12
4. STATUS INDICATORS ...................................................................................................................13
4.1. MODULE STATUS LEDS.......................................................................................................13
5. MODULE CONTROL.......................................................................................................................15
5.1. VIDEO ....................................................................................................................................15
5.1.1. Input Video Standard...................................................................................................15
5.1.2. Reference Select.........................................................................................................16
5.1.3. Loss of Video Mode.....................................................................................................16
5.1.4. Force Freeze Frame....................................................................................................17
5.1.5. Vertical Phase Offset...................................................................................................17
5.1.6. Horizontal Phase Offset...............................................................................................17
5.1.7. Video Delay.................................................................................................................17
5.1.8. PGM IN A Video Standard...........................................................................................18
5.1.9. PGM IN B Video Standard...........................................................................................18
5.1.10. Input Video BNC..........................................................................................................18
5.1.11. Video Payload ID.........................................................................................................18
5.1.12. Video Delay.................................................................................................................18
5.1.13. External Genlock Video Standard................................................................................18
5.1.14. Reference Status.........................................................................................................18

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Revision 1.34Page iii
5.2. VIDEO PROCESSING............................................................................................................19
5.2.1. RGB Clip......................................................................................................................20
5.2.2. Gain Levels..................................................................................................................20
5.2.3. DC Offsets...................................................................................................................20
5.2.4. Hue20
5.2.5. Gamma Adjust Enable.................................................................................................21
5.2.6. Gamma Level ..............................................................................................................21
5.2.7. Red, Green, Blue Gamma Levels ................................................................................21
5.2.8. Reset Video Proc Button..............................................................................................21
5.3. AUDIO ....................................................................................................................................22
5.3.1. SRC Mode...................................................................................................................22
5.3.2. Embedder Group 1-4 Enable.......................................................................................23
5.3.3. C-Bit23
5.3.4. DMX Loss of Video Mode ............................................................................................23
5.3.5. Breakout Audio Mode ..................................................................................................23
5.3.6. Global Audio Delay......................................................................................................23
5.3.7. Audio Delay.................................................................................................................24
5.3.8. Channel Delay.............................................................................................................24
5.3.9. SRC Status..................................................................................................................24
5.3.10. Audio Delay.................................................................................................................24
5.4. AUDIO PROCESSING............................................................................................................25
5.4.1. Source X......................................................................................................................26
5.4.2. Gain Adjust X...............................................................................................................26
5.4.3. Invert Enable X............................................................................................................26
5.4.4. Source Y......................................................................................................................27
5.4.5. Gain Adjust Y...............................................................................................................27
5.4.6. Invert Enable Y............................................................................................................27
5.5. AUDIO PAIR SELECT............................................................................................................28
5.5.1. Audio Source for Input Channel 1 and 2......................................................................28
5.6. AFD CONTROL......................................................................................................................29
5.6.1. AFD Enable.................................................................................................................29
5.6.2. AFD Output Line..........................................................................................................30
5.6.3. AFD Bar Output Enable...............................................................................................30
5.6.4. AFD Output SD Aspect Ratio.......................................................................................30
5.6.5. AFD Stamp..................................................................................................................31
5.6.6. Input AFD Code Status................................................................................................31
5.6.7. Output AFD Code Status.............................................................................................31
5.7. SCTE 104 CONTROL (+SCTE104IP OPTION ONLY)............................................................32
5.7.1. SCTE104 Processing...................................................................................................33
5.7.2. SCTE104 Processing Mode.........................................................................................33
5.7.3. Upstream SCTE104 Message Handling ......................................................................33
5.7.4. SCTE104 Inject Line....................................................................................................33
5.7.5. GPI Trigger Enable......................................................................................................34
5.7.6. Communicate with AS Index........................................................................................34
5.7.7. Delayed Injection.........................................................................................................34
5.7.8. Injector IP Address ......................................................................................................34
5.7.9. Injector Subnet Mask...................................................................................................34

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Page iv Revision 1.34
5.7.10. Injector Gateway..........................................................................................................35
5.7.11. Automation System IP Address ...................................................................................35
5.7.12. Automation System IP Port..........................................................................................35
5.8. SCTE 104 AUTHOR (+SCTE104IP OPTION ONLY)..............................................................35
5.8.1. Multiple Operation........................................................................................................37
5.8.2. Splice Request Data....................................................................................................39
5.8.3. Time Signal Request ...................................................................................................41
5.8.4. Insert Avail Descriptor Request Data...........................................................................42
5.8.5. Insert DTMF Descriptor Request Data.........................................................................42
5.8.6. Insert Segmentation Descriptor Request Data.............................................................43
5.9. SCTE 104 STATUS (+SCTE104IP OPTION ONLY)...............................................................45
5.9.1. AS IP Connection ........................................................................................................47
5.9.2. AS IP Data Activity.......................................................................................................47
5.9.3. GPI Data Activity .........................................................................................................47
5.9.4. Injector In Use .............................................................................................................47
5.9.5. Processing Pre-Roll Cycle...........................................................................................47
5.9.6. Processing Break Duration..........................................................................................47
5.9.7. Video Playout State.....................................................................................................47
5.10. AUDIO/VIDEO TRAPS...........................................................................................................48
5.11. UTILITIES CONTROL ............................................................................................................49
5.11.1. Recall Preset...............................................................................................................49
5.11.2. Store Preset.................................................................................................................50
6. JUMPERS .......................................................................................................................................51
6.1. SELECTING WHETHER LOCAL FAULTS WILL BE MONITORED BY THE GLOBAL FRAME
STATUS .................................................................................................................................51
6.2. CONFIGURING THE MODULE FOR FIRMWARE UPGRADES ............................................52
6.3. SELECTING WHETHER THE GENLOCK REFERENCE INPUT IS TERMINATED...............52
6.4. 7847FS-EAES8-3G “SLOT BLOCKER”................................................................................53
7. VISTALINK® REMOTE MONITORING/CONTROL..........................................................................55
7.1. WHAT IS VISTALINK®?.........................................................................................................55
7.2. VISTALINK®PARAMETERS..................................................................................................55

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Revision 1.34Page v
Figures
Figure 1-1: Block Diagram .................................................................................................................1
Figure 2-1: 7847FS-EAES8-3G Rear Plate Layout ............................................................................3
Figure 2-2: GPI Input Circuitry ...........................................................................................................6
Figure 4-1: Status LEDs...................................................................................................................13
Figure 5-1: Video Tab......................................................................................................................15
Figure 5-2: Video Processing Tab....................................................................................................19
Figure 5-3: Audio Tab......................................................................................................................22
Figure 5-4: Audio Proc Tab..............................................................................................................25
Figure 5-5: Audio Pair Select Tab....................................................................................................28
Figure 5-6: AFD Control Tab............................................................................................................29
Figure 5-7: SCTE 104 Control Tab...................................................................................................32
Figure 5-8: SCTE 104 Author Tab....................................................................................................36
Figure 5-9: STCE 104 Status Tab (SCTE 104 Quick Status Monitor Section)..................................45
Figure 5-10: SCTE 104 Status Tab (Message Section)....................................................................46
Figure 5-11: Audio/Video Traps Tab................................................................................................48
Figure 5-12: Utilities Control Tab......................................................................................................49
Figure 6-1: Location of Jumpers – Top View Main Module...............................................................51
Figure 6-2: Location of Jumpers – Bottom View Main Module..........................................................51
Figure 6-3: Slot Blocker ...................................................................................................................53
Tables
Table 2-1: Colour Code Wiring for the Current RJ 45 Standards........................................................5
Table 2-2: GPI Connector Pin out......................................................................................................6
Table 2-3: AES Input Audio Connector Pin out..................................................................................7
Table 2-4: AES Audio Input Breakout Cable (Evertz Part # WPAES8-BNCM-9W-6F)........................8
Table 2-5: AES Output Audio Connector Pin out................................................................................8
Table 2-6: AES Audio Output Breakout Cable (Evertz Part # WPAES8-BNCM-9W-6F).....................9
Table 5-1: Source X Control Input Values........................................................................................26
Table 5-2: Source Y Input Values ....................................................................................................27
Table 5-3: AFD Stamp Control Values.............................................................................................31
Table 5-4: SCTE 104 Multiple Operation Parameters ......................................................................38
Table 5-5: Splice Data Request Parameters....................................................................................40
Table 5-6: Time Signal Request Parameters ...................................................................................41
Table 5-7: Insert Avail Descriptor Request Data Parameters...........................................................42
Table 5-8: Insert DTMF Descriptor Request Data Parameters.........................................................42
Table 5-9: Insert Segmentation Descriptor Request Data Parameters.............................................44

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Page vi Revision 1.34
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7800/7700 MultiFrame Manual
7847FS-EAES8-3G - 3G Frame Synchronizer with Embedded Audio Processing & 8 AES Support
OVERVIEW Revision 1.3 Page 1
1. OVERVIEW
The 7847FSE-EAES8-3G series 3G/HD/SD-SDI Frame Synchronizers are designed to re-time a SMPTE
424M (3Gb/s), SMPTE 292M (1080i/59.94, 1080i/50, 720p/60, 720p/59.94) or SMPTE259M (625i/50,
525i/59.94) input to a local reference tri-level or composite sync signal. When necessary, frames are
repeated or dropped to maintain synchronization. The 7847FSE-EAES8-3G supports synchronization of
both the video and any embedded audio present including the preservation of all VANC data. When the
input video is
lost, this module will pass the input content, freeze the last good frame or generate black
video.
On the 7846F7-EAES8-3G, the user can choose to have 8 stereo pairs from 4 groups in the upstream
embedded audio and from the 8 AES inputs embedded on the output video and output as AES. When the
input video is lost, it will pass the input AES or mute if embedded audio is selected for synchronizing. The
frame synchronizers also have the ability to set the audio delay independently from the video delay and
have the ability to adjust many video parameters such as brightness, contrast, saturation and hue. The
adjustment of audio parameters such as gain, mixing stereo pairs into monaural and reassignment of
audio channels is fully supported on up to 16 channels of embedded audio.
The +SCTE104IP option allows for advanced SCTE104 processing. The module can author various
SCTE104 messages and trigger them based on GPI’s or SNMP commands, or can parse and pass-through
SCTE104 messages based on an incoming
IP connection, for use with automation systems. The module output
can also be steered by SCTE104 splice request commands, allowing it to be used as the switch point for
commercial insertions.
The 7847FSE-EAES8-3G is VistaLINK®enabled, offering remote monitoring, control and configuration
capabilities via Simple Network Management Protocol (SNMP) giving the flexibility to manage operations,
including signal monitoring and module configuration from SNMP capable control systems (Manager or
NMS).
Figure 1-1: Block Diagram

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Page 2 Revision 1.3 OVERVIEW
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7800/7700 MultiFrame Manual
7847FS-EAES8-3G - 3G Frame Synchronizer with Embedded Audio Processing & 8 AES Support
INSTALLATION Revision 1.3 Page 3
2. INSTALLATION
The 7847FS-EAES8-3G comes with a companion rear plate that occupies two slots in the 7800FR frame
or three slots in the 7700FR-C frame. If a 7847FS-EAES8-3G module is installed in a 7700FR-C frame
without the “slot blocker” installed, the card will not power-up and will show RED on its main status LED.
For information on mounting the rear plate and inserting the module into the frame see section 3 of the
7700FR manual. Refer to section 6.4 of this manual for more information on the 7847FS-EAES8-3G slot
blocker. Refer to Figure 2-1 for the 7847FS-EAES8-3G rear plate layout.

Note: For proper operation in the 7700FR-C, the on-board “slot blocker” must be
installed in order for the card to power-up.
Figure 2-1: 7847FS-EAES8-3G Rear Plate Layout

7800/7700 MultiFrame Manual
7847FS-EAES8-3G - 3G Frame Synchronizer with Embedded Audio Processing & 8 AES Support
Page 4 Revision 1.3 INSTALLATION
2.1. INPUT/OUTPUT CONNECTIONS
PGM IN A: Accepts a 10-bit serial digital video signal. This input is compatible with SMPTE 259M,
SMPTE 292M, SMPTE 372M and SMPTE 425M*. The module can be set to receive a
specific video standard or set to automatically detect supplied input video standard. PGM
A or PGM B can be selected for subsequent video processing.
* References to 3G, SMPTE 424M/SMPTE 425 and single link 1080p59.94/50 refer 10 bit 4:2:2 1080p59.94/50 signals (Level A or B in SMPTE 425M)
References to dual link 1080p59.94/50 refer to SMPTE 372M mapping for 1080p59.94/50 4:2:2 10 bit data format only.
PGM IN B: Accepts a 10-bit serial digital video signal. This input is compatible with SMPTE 259M,
SMPTE 292M, SMPTE 372M and SMPTE 425M*. The module can be set to receive a
specific video standard or set to automatically detect supplied input video standard. PGM
A or PGM B can be selected for subsequent video processing.
* References to 3G, SMPTE 424M/SMPTE 425 and single link 1080p59.94/50 refer 10 bit 4:2:2 1080p59.94/50 signals (Level A or B in SMPTE 425M)
References to dual link 1080p59.94/50 refer to SMPTE 372M mapping for 1080p59.94/50 4:2:2 10 bit data format only.
PGM OUT1-3: These BNC connectors are used to output video as serial component video. These
outputs are compatible with SMPTE 292M or SMPTE 259M or SMPTE 372M or SMPTE
425M*.
* When set it to output SMPTE72M dual link 1920x1080p50/59.94 video, PGM OUT1 and PGM OUT2 provide LINK A and PGM OUT3 provides LINK B.
REF IN: This BNC is for connecting a bi-level or tri-level reference. Reference format is auto-
detected by the module. Output video can be timed with respect to the supplied
reference using the H Phase Offset and V Phase Offset module controls. When no
reference is provided, the output video is timed with respect to the input video.
Reference may also be supplied via the 7700FR-G and 7800FR FRAME REFERENCE
inputs. VLPRO is used to select either the card’s external reference or the FRAME
REFERENCE BNC.

7800/7700 MultiFrame Manual
7847FS-EAES8-3G - 3G Frame Synchronizer with Embedded Audio Processing & 8 AES Support
INSTALLATION Revision 1.3 Page 5
2.2. ETHERNET CONNECTIONS
All 7847FS-EAES8-3G are designed to use either 10Base-T (10 Mbps) or 100Base-TX (100 Mbps), also
known as Fast Ethernet, twisted pair Ethernet cabling systems. When connecting for 10Base-T systems,
category 3, 4, or 5 UTP cable as well as EIA/TIA – 568-100ΩSTP cable may be used. When connecting
for 100Base-TX systems, category 5 UTP cable is required. Make the network connection by plugging
one end of a “straight through” cable into the RJ-45 receptacle of the 7847FS-EAES8-3G and the other
end into a port of the supporting hub. If you are connecting the 7847FS-EAES8-3G directly to an Ethernet
port on a computer, you will have to use a “crossover” cable.
Straight-through RJ-45 cables can be purchased or can be constructed using the pin out information in
Table 2-1. Colour coded-wiring information is also provided for the current RJ-45 standards (AT&T 258A
or EIA/TIA 258B colour coding shown). Refer to the notes following the table for additional wiring guide
information.
Pin
1
Pin #
Signal
EIA/TIA 568A
AT&T 258A or
EIA/TIA 568B
10BaseT
or 100BaseT
1
Transmit +
White/Green
White/Orange
X
2 Transmit – Green/White or White
Orange/White or
Orange
X
3 Receive + White/Orange White/Green X
4 N/A Blue/White or Blue Blue/White or Blue
Not used
(required)
5 N/A White/Blue White/Blue
Not used
(required)
6 Receive –
Orange/White or
Orange
Green/White or Green X
7 N/A White/Brown White/Brown
Not used
(required)
8 N/A Brown/White or Brown Brown/White or Brown
Not used
(required)
Table 2-1: Colour Code Wiring for the Current RJ 45 Standards
Note the following cabling information for this wiring guide:
•Only two pairs of wires are used in the 8-pin RJ 45 connector to carry Ethernet signals.
•Even though pins 4, 5, 7 and 8 are not used, it is mandatory that they be present in the cable.
•10BaseT and 100BaseT use the same pins; a crossover cable made for one will work with the
other.
•Pairs may be solid colours and not have a stripe.
•Category 5 cables must use Category 5 rated connectors.
The maximum cable run between the 7847FS-EAES8-3G and the supporting hub is 300 ft (90 m).

Note that the two LEDs on the Ethernet connector are not used and will not light up
when connected to an Ethernet network. Ethernet functionality is not impacted by the
lack of these LEDs lighting up.

7800/7700 MultiFrame Manual
7847FS-EAES8-3G - 3G Frame Synchronizer with Embedded Audio Processing & 8 AES Support
Page 6 Revision 1.3 INSTALLATION
2.3. GPI CONNECTOR
There are 2 General Purpose Inputs (GPIs) on the 7847FS-EAES8-3G. These GPIs are interfaced using a
15-pin DB connector and an associated breakout cable (cable part # WPAES8-BNCM-9W-6F).

Note: GPI breakout cable is not included with the module when purchased.
Table 2-2 shows the Pin-out of this connector as follows:
Table 2-2: GPI Connector Pin out
Each GPI has the following internal structure as shown in Figure 2-2:
GPI
GND
GPI
Command
to
internal
circuit
3.6 K
+ 5
VDC
Figure 2-2: GPI Input Circuitry
GPI DB CONNECTOR
DB-15
Pin
Name Description Colour
1
GPI1
General Purpose Input #1
Red
2
N/C
Green
3
GPI2
General Purpose Input #2
Blue
4
N/C
Purple
5
N/C
Orange
6
N/C
White
7
GND
Ground
A2 BNC PIN
8
N/C
Yellow
9
GND
Ground
- -
10
GND
Ground
- -
11
N/C
A1 BNC PIN
12
GND
Ground
- -
13
GND
Ground
- -
14
GND
Ground
A4 BNC PIN
15
GND
Ground
A3 BNC PIN
Shell
GND
Ground
- -

7800/7700 MultiFrame Manual
7847FS-EAES8-3G - 3G Frame Synchronizer with Embedded Audio Processing & 8 AES Support
INSTALLATION Revision 1.3 Page 7
2.4. AES INPUTS
The 7847FS-EAES8-3G supports 8 AES inputs and is interfaced using a DB15 connector and a breakout
cable. The part number for the cable is # WPAES8-BNCM-6F. Two cables (one for AES inputs and one for
AES outputs) are included with each 7847FS-EAES8-3G card. The pin-out of the DB15 connector is
shown in Table 2-3. The pin-out of the breakout cable is shown in Table 2-4.

Note: All unused BNCs must be properly terminated using a 75

7800/7700 MultiFrame Manual
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Page 8 Revision 1.3 INSTALLATION
High Density
DB-15 PIN
(male)
Breakout
Cable
Connector
Ground/
Shield Connection Labelled Name
1
Red Wire
None
W1 RED
2
Green Wire
None
W2 GREEN
3
Blue Wire
None
W3 BLUE
4
Purple Wire
None
W6 PUR
5
Orange Wire
None
W7 ORG
6
White Wire
None
W4 WHITE
7
Coax BNC Male
Soldered to Shell
AES A2
8
Yellow
None
W5 YELLOW
9
Coax BNC Male
Soldered to Shell
AES B2
10
Coax BNC Male
Soldered to Shell
AES B1
11
Coax BNC Male
Soldered to Shell
AES A1
12
Coax BNC Male
Soldered to Shell
AES B4
13
Coax BNC Male
Soldered to Shell
AES B3
14
Coax BNC Male
Soldered to Shell
AES A4
15
Coax BNC Male
Soldered to Shell
AES A3
Shell
Brown Wire
Soldered to Shell
GND BR
Shell
Black Wire
Soldered to Shell
GND BK
Table 2-4: AES Audio Input Breakout Cable (Evertz Part # WPAES8-BNCM-9W-6F)
2.5. AES OUTPUTS
The 7847FS-EAES8-3G supports 8 AES outputs and is interfaced using a DB15 connector and a breakout
cable. The part number for the cable is # WPAES8-BNCM-6F. Two cables (one for AES inputs and one for
AES outputs) are included with each 7847FS-EAES8-3G card. The pin-out of DB15 connector is shown in
Table 2-5. The pin-out of the breakout cable is shown in Table 2-6.
Female
PIN #
Name
Description
1
Not used
Reserved for future use
2
TX+ Primary
Primary Dolby Metadata TX+
3
Not used
Reserved for future use
4
Reserved
Reserved for future use
5
Not used
Reserved for future use
6
TX- Primary
Primary Dolby Metadata TX-
7
AES Out 2
AES Output 2 – Unbalanced
8
Reserved
Reserved for future use
9
AES Out 6
AES Output 6 – Unbalanced
10
AES Out 5
AES Output 5 – Unbalanced
11
AES Out 1
AES Output 1 – Unbalanced
12
AES Out 8
AES Output 8 – Unbalanced
13
AES Out 7
AES Output 7 – Unbalanced
14
AES Out 4
AES Output 4 – Unbalanced
15
AES Out 3
AES Output 3 – Unbalanced
Shell
GND
Ground
Table 2-5: AES Output Audio Connector Pin out

7800/7700 MultiFrame Manual
7847FS-EAES8-3G - 3G Frame Synchronizer with Embedded Audio Processing & 8 AES Support
INSTALLATION Revision 1.3 Page 9
High Density
DB-15 PIN
(male)
Breakout
Cable
Connector
Ground/
Shield Connection Labelled Name
1
Red Wire
None
W1 RED
2
Green Wire
None
W2 GREEN
3
Blue Wire
None
W3 BLUE
4
Purple Wire
None
W6 PUR
5
Orange Wire
None
W7 ORG
6
White Wire
None
W4 WHITE
7
Coax BNC Male
Soldered to Shell
AES A2
8
Yellow
None
W5 YELLOW
9
Coax BNC Male
Soldered to Shell
AES B2
10
Coax BNC Male
Soldered to Shell
AES B1
11
Coax BNC Male
Soldered to Shell
AES A1
12
Coax BNC Male
Soldered to Shell
AES B4
13
Coax BNC Male
Soldered to Shell
AES B3
14
Coax BNC Male
Soldered to Shell
AES A4
15
Coax BNC Male
Soldered to Shell
AES A3
Shell
Brown Wire
Soldered to Shell
GND BR
Shell
Black Wire
Soldered to Shell
GND BK
Table 2-6: AES Audio Output Breakout Cable (Evertz Part # WPAES8-BNCM-9W-6F)

7800/7700 MultiFrame Manual
7847FS-EAES8-3G - 3G Frame Synchronizer with Embedded Audio Processing & 8 AES Support
Page 10 Revision 1.34SPECIFICATION
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