ON Semiconductor RSL10 User manual

© SCILLC, 2017
Previous Edition © 2017
“All Rights Reserved”
RSL10 Evaluation and Development Board
Manual
M-20835-005
August 2017

Evaluation and Development Board Manual
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Page
1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1 Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2 Intended Audience . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4 Manual Organization . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.5 Further Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Evaluation and Development Board Features . . . . . . . . . . . . . . . . . . . 6
3. Evaluation and Development Board . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1 Evaluation and Development Board Setup . . . . . . . . . . . . . . . . . . . . 7
3.2 Evaluation and Development Board Design . . . . . . . . . . . . . . . . . . . 7
3.3 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
3.4 Level Translators . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
3.5 LED Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
3.6 Measuring the Current Consumption . . . . . . . . . . . . . . . . . . . . .14
3.6.1 Measuring Current Consumption for WLCSP . . . . . . . . . . . . . . . . 14
3.6.2 Measuring Current Consumption for QFN. . . . . . . . . . . . . . . . . . 14
3.7 SWJ-DP Debug Port . . . . . . . . . . . . . . . . . . . . . . . . . .14
3.8 Digital Input/Output (DIO) . . . . . . . . . . . . . . . . . . . . . . . .15
3.9 Power Supplies and Test Points . . . . . . . . . . . . . . . . . . . . . . .15
3.9.1 WLCSP Power Supply and Test Points. . . . . . . . . . . . . . . . . . . 15
3.9.2 QFN Power Supplies . . . . . . . . . . . . . . . . . . . . . . . . 16
A. WLCSP Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
A.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
A.2 Configuration Header Jumpers . . . . . . . . . . . . . . . . . . . . . . .17
A.3 Headers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
A.4 Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
A.5 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
B. QFN Connectors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
B.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
B.2 Configuration Header Jumpers . . . . . . . . . . . . . . . . . . . . . . .19
B.3 Headers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
B.4 Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
B.5 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
C. WLCSP Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
D. QFN Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
E. WLCSP Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
F. QFN Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Table of Contents

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CHAPTER 1
1.Introduction
1.1 PURPOSE
This manual provides detailed information about the configuration and use of the RSL10 Evaluation and
Development Board, both the wafer level chip scale package (WLCSP) and the quad flat no-leads (QFN) package.
The Evaluation and Development Board is designed to be used with the software development tools to evaluate the
performance and capabilities of the RSL10 radio System-on-Chip (SoC).
1.2 INTENDED AUDIENCE
This manual is for engineers, developers, and anyone else who requires technical information about the
Evaluation and Development Board.
1.3 CONVENTIONS
The following conventions are used in this manual to signify particular types of information:
monospace font Connector and pin names.
1.4 MANUAL ORGANIZATION
The Evaluation and Development Board Manual contains the following chapters and appendices:
•Chapter 1: Introduction describes the purpose of this manual, describes the target reader, explains how the
book is organized, and provides a list of suggested reading for more information.
•Chapter 2: Overview provides an overview of the Evaluation and Development Board described in this
manual.
•Chapter 3: Evaluation and Development Board provides the details of the Evaluation and Development
Board. The chapter is divided into the following topics:
• Development Board Setup
• Development Board Design
• Power Supply
• Level Translators
• LED Circuitry
•RSL10 SoC
• Measuring the Current Consumption
• SWJ-DP Debug Port
• Digital Input/Output (DIO)
• Power Supply and Test Points
•Appendix A: WLCSP Connectors provides a complete list of the connectors and jumpers on the WLCSP
Evaluation and Development Board. The appendix is divided into the following sections:
• Configuration Header Jumpers
• Headers
• Switches
• Connectors
•Appendix B: QFN Connectors provides a complete list of the connectors and jumpers on the QFN
Evaluation and Development Board.
•Appendix C: WLCSP Schematics contains the schematics for the WLCSP Evaluation and Development
Board.

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•Appendix D: QFN Schematics contains the schematics for the QFN Evaluation and Development Board.
•Appendix E: WLCSP Bill of Materials contains a list of the parts that are used to manufacture the WLCSP
Evaluation and Development Board.
•Appendix F: QFN Bill of Materials contains a list of the parts that are used to manufacture the QFN
Evaluation and Development Board.
1.5 FURTHER READING
For more information, refer to the following documents:
•RSL10 Software Development Tools User’s Guide
•Firmware Reference Manual for RSL10
•Hardware Reference Manual for RSL10
• RSL10 Datasheet

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CHAPTER 2
2.Overview
2.1 INTRODUCTION
The RSL10 Evaluation and Development Board is used for evaluating the RSL10 SoC and for application
development. The board provides access to all input and output connections via 0.1" standard headers. The on-board
communication interface circuit provides communication to the board from a host PC. The communication interface
translates RSL10 SWJ-DP debug port signals to the USB of the host PC. There is also an on-board 4-bit level shifter
for debugging; it translates the I/O signal level of RSL10 to the 3.3 V digital logic level. It is not enabled by default;
you enable it when it is needed.
2.2 EVALUATION AND DEVELOPMENT BOARD FEATURES
The Evaluation and Development Board enables developers to evaluate the performance and capabilities of the
RSL10 radio SoC in addition to developing, demonstrating and debugging applications.
Key features of the board include:
• J-Link onboard solution provides a SWJ-DP (serial-wire and/or JTAG) interface that enables you to debug
the board via a USB connection with the PC
• Alternate onboard SWJ-DP (serial-wire and/or JTAG) interface for ARM® Cortex®-M3 processor
debugging
• Access to all RSL10 peripherals via standard 0.1" headers
• Onboard 4-bit level translator to translate the LPDSP32 debug interface at low voltage to a 3.3 V JTAG
debugger
• Antenna matching and filtering network
• Integrated PCB antenna
In addition, the QFN board provides:
• Compliance with the Arduino form factor
• Support for PMOD (i.e., J4 is a standard connector)

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CHAPTER 3
3.Evaluation and Development Board
3.1 EVALUATION AND DEVELOPMENT BOARD SETUP
This section is an overview of how to configure the Evaluation and Development Board. Details of the
development board configuration are discussed later in this manual.
Figure 1 represents an overview of the board setup.
Figure 1. Evaluation and Development Board Setup
If you want to use an external J-Link debugger instead of the onboard one, connect the debugger to the JTAG
port of the WLCSP board, or to connector P2 on the QFN board, as shown in Figure 2. Notice that for this setup, you
also need a power supply.
Figure 2. Evaluation and Development Board Setup with External J-Link Debugger
3.2 EVALUATION AND DEVELOPMENT BOARD DESIGN
The following sections detail the various sub-circuits of the RSL10 Evaluation and Development Board. The
block diagram in Figure 3 shows the locations of the various circuit sections for the WLCSP board. The block
diagrams in Figure 4 and Figure 5 show the locations of the circuit sections for the QFN board. Figure 6 and Figure 7
provide 3-dimensional illustrations of the QFN board.
RSL10
Evaluation and
Development
Board
Micro USB cable
Micro USB cable
J-Link
Debugger
10/9 Pin Connector
RSL10 Evaluation and
Development Board
P2 or JTAG
Port
Power Supply

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Figure 3. Circuit Location Block Diagram for WLCSP Board

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Figure 4. Circuit Location Block Diagram for QFN Board (Top View)

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Figure 5. Circuit Location Block Diagram for QFN Board (Bottom View)

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Figure 6. Three-Dimensional Line Drawing of the QFN Board (Top View)

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Figure 7. Three-Dimensional Line Drawing of the QFN Board (Bottom View)
3.3 POWER SUPPLY
The Evaluation and Development Board can be powered by one of the following:
• Micro USB port with regulator
• External power supply connector (P5 for QFN, P9 for WLCSP) with regulator
• External power supply connector (P5 for QFN, P9 for WLCSP) without regulator
For the WLCSP board, use the jumpers on pin headers P6 and P8 to select a power supply option as shown in
Table 1 on page 12.
Table 1. Power Supply Selection for WLCSP
Power Source Jumper Position on P6 Jumper Position on P8
Micro USB port with regulator 1&2 1&2

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For the QFN board, use the jumpers on pin headers P4, P7 and P10 to select a power supply option as show in
Table 2.
3.4 LEVEL TRANSLATORS
The board has level translators for the DIO signals of RSL10, including the clock signal. The level translators
facilitate interfacing to external devices that operate at a higher voltage than RSL10.
VDDO and 3.3 V are two different power rails. The translator allows a logic signal on the VDDO side to be
translated to either a higher or a lower logic signal voltage on the 3.3 V side, and vice-versa.
The level translation circuitry consists of components U4 and the 2x4 header. Signals are translated from the VDDO
voltage reference to 3.3 V (default) voltage provided by the regulator output or by an external supply. The VDDO
voltage is configured by the pin on header P11 (located on the board edge) to either VBAT_DUT, 3.3 V or other level
within the VDDO voltage range, which is 1.1 to 3.3 V.
The NLSX5014 level translators are bi-directional. They have the following features:
• Wide voltage operating range: 0.9 V to 4.5 V
• VDDO and 3.3 V are independent
• VDDO can be equal to, or less than, 3.3 V when connected to the power rail
To enable the level translators, populate the 0W resistor on positions R31 and R33. By default, the level translators
are disabled.
External Power supply with regulator 1&2 3&4
External Power supply without regulator 2&3 5&6
Table 2. Power Supply Selection for QFN
Power Source Jumper Position on P4 Jumper Position on P7 Jumper Position on P10
Micro USB port with regulator 1&2 2&3 1&2
External Power Supply with regulator 3&4 2&3 1&2
External Power Supply without regulator 1&2, 5&6 2&3 2&3
Table 3. Minimum/Maximum External Regulated Voltages
Power Supply Header
Input Voltage
Minimum Typical Maximum
RSL10 and J-Link
OB MCU
EXT-PSU
Regulated
3.3 V 3.6 V 12.0 V
RSL10 and J-Link
OB MCU
USB 5.0 V
RSL10 EXT-PSU
Unregulated
1.1 V 1.25 V 3.6 V
Table 1. Power Supply Selection for WLCSP (Continued)
Power Source Jumper Position on P6 Jumper Position on P8

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3.5 LED CIRCUITRY
There are two LEDs on the board. One is a dual color LED, called LD1, connected to the J-Link emulator
microcontroller unit (MCU). The other is the green LED, connected to DIO 6 of RSL10. You can use this LED within
your applications as an indication LED by programming DIO 6. If DIO 6 is high, this LED is on.
3.6 MEASURING THE CURRENT CONSUMPTION
This section deals with measuring current consumption for both WLCSP and QFN versions of the Evaluation and
Development Board.
3.6.1 Measuring Current Consumption for WLCSP
The RSL10 VBAT main system supply can be the USB’s 5 V ±5% through the 3.3 V regulator, or the external
regulated 3.3 V supply, or the supply can be an external power source without regulator. For more information, refer to
Section 3.3, “Power Supply” on page 12.
The current measurement header (P7) located on the board is provided to measure the current consumption of
RSL10. For normal operation, short the current measurement header. When using an external supply, ensure that
the recommended voltage level for RSL10 is not exceeded. Refer to Table 3 on page 13 for minimum and maximum
voltages.
Headers are provided for each of the regulated voltages for additional capacitance and/or for measurements. RSL10
has 16 digital I/Os. The VDDO pin in header P11 configures the I/O voltages for power domains to either VBAT or to
some other voltage.
To measure the current consumption of RSL10 only, you must use an unregulated external power supply, and
remove the jumpers that connect nRESET, SWDIO and SWCLK between the MCU and RSL10, preventing leakage
from the JTAG interface. For WLCSP boards, remove the jumpers on header P12.
3.6.2 Measuring Current Consumption for QFN
The current measurement header (P3) located on the board is provided to measure the current consumption of
RSL10. For normal operation, short the current measurement header. When using an external supply, ensure that
the recommended voltage level for RSL10 is not exceeded. Refer to Table 3 on page 13 for minimum and maximum
voltages.
Headers are provided for each of the regulated voltages for additional capacitance and/or for measurements. RSL10
has 16 digital I/Os. The VDDO pin in header P9 configures the I/O voltages for power domains to VBAT.
To measure the current consumption of RSL10 only, you must use an unregulated external power supply, and
remove the jumpers on header SWD. Removing the jumpers between the MCU and RSL10 that connect nRESET,
SWDIO and SWCLK prevents current leakage from the JTAG interface, avoiding inaccurate current measurements.
3.7 SWJ-DP DEBUG PORT
The J-Link adapters are typically used to communicate with RSL10 using the standard Coresight SWJ-DP debug
port in a JTAG/SW communication protocol. The 9-pin 0.05 in Samtec FTSH header (P3 for WLCSP, P1 for QFN),
defined by the ARM Cortex-M3 core on the board, connects RSL10 to external adapters compatible with the
ARM Cortex-M3 processor’s SWJ-DP interface. Alternatively, you can connect the micro USB port on the board to a
PC.

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3.8 DIGITAL INPUT/OUTPUT (DIO)
RSL10 contains 16 digital I/O (DIO) signals. The DIO voltage domain is VDDO, while the input voltage can be
VBAT or external voltage as outlined in Section 3.6, “Measuring the Current Consumption” on page 14.
The DIO signals on RSL10 are multiplexed with several interfaces, including:
•One I
2C interface (on DIO [7:8] for QFN)
• Four external inputs to the low-speed analog to digital converters (on DIO [0:3] for QFN)
• One PCM interface
• Two PWM drivers
• Two SPI interfaces (on DIO [9:12] and DIO [13:15] for QFN)
• One UART interface (on DIO [4:5] for QFN)
• Support interfaces that can be used to monitor control of the RF front-end and Bluetooth® baseband controller
For more information about the DIO multiplexed signals, refer to the Hardware Reference Manual for RSL10.
The WLCSP board provides access to any of the DIOs or their multiplexed signals via the DIO0-15 headers. One
16-pin protected header, organized in a 2x8 configuration, is provided on the board.
The QFN board provides access to any of the DIOs or their multiplexed signals via the Arduino Headers (Power1,
AD1, IOL1, and IOH1).
The LED circuit provides visual monitoring of the DIOs; refer to Section 3.5, “LED Circuitry” on page 14 for
further information.
3.9 POWER SUPPLIES AND TEST POINTS
There are several external power supplies available on your Evaluation and Development Board. Depending on
what type of board you are working with, test points might also be present.
The user can also access signals on various headers on boards, as described throughout this document.
3.9.1 WLCSP Power Supply and Test Points
External power supplies available for WLCSP boards are:
• VBUS, 5 V from USB connection - available only when USB is plugged in
• V3.3, 3.3 V from LDO - available when regulated supply is selected
• VEXT, unregulated external supply - available when unregulated supply is selected
The user can also access signals on various headers on boards, as described throughout this document.
The WLCSP board includes several test points which the user can access to measure the following internal power
supplies:
• VDDA
• VDDC
• VDDM
• VDDPA
•VCC

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• VDDRF
•VPP
3.9.2 QFN Power Supplies
The external power supplies available for QFN boards are:
• VBUS, 5 V from USB connection — available only when USB is plugged in
• V3.3, 3.3 V from LDO — available when regulated supply is selected
•VEXT, (
P5 header) unregulated external supply — available when unregulated supply is selected
• Battery (J5 Battery Holder, 12 mm coin cell battery)

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APPENDIX A
A.WLCSP Connectors
A.1 OVERVIEW
This appendix lists all connectors on the Evaluation and Development Board. The sections that follow provide
descriptions for:
• Jumpers and their possible configurations
• Headers
• Switches and their possible configurations
• Connectors
A.2 CONFIGURATION HEADER JUMPERS
A.3 HEADERS
A.4 SWITCHES
Table 4. Jumper Descriptions
Designator Description
P6 Regulated or Unregulated power supply selection (see Table 1 on page 12)
P8 Power Source Selection (see Table 1 on page 12)
P11 VDDO selection between VBAT_DUT and V3.3
VDD_AT selection between 3.3 V and VEXT, removing R39
Table 5. Header Descriptions
Designator Description
P1 DIO signals
P2 External slow clock input header
P3 JTAG debug connection header
P4 Virtual UART port from PC
P5 Analog test header
P7 Current measurement header
P9 External power supply header
P10 Input and output of level shifter
P11 Power supply on board and supply voltage configuration header
Table 6. Switch Descriptions
Designator Description
RESET Pushbutton switch to reset RSL10
DIO5 Pushbutton switch for DIO5

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A.5 CONNECTORS
Table 7. Connector Descriptions
Designator Description
J1 Micro USB port for power supply, JTAG and UART emulation

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APPENDIX B
B.QFN Connectors
B.1 OVERVIEW
This appendix lists all connectors on the QFN Evaluation and Development Board. The sections that follow
provide descriptions for:
• Jumpers and their possible configurations
• Headers
• Switches and their possible configurations
• Connectors
B.2 CONFIGURATION HEADER JUMPERS
B.3 HEADERS
B.4 SWITCHES
Table 8. Jumper Descriptions
Designator Description
P4 Regulated or Unregulated power supply selection
P10 VBAT Power Source selection (3.3 V, Vext or Battery)
P9 VDDO selection (VBAT_DUT, 3.3 V)
P8 VDD_AT selection (3.3 V, VDDO)
P1 Onboard JTAG debugger connection
Table 9. Header Descriptions
Designator Description
POWER1 Arduino Power header 3.3V, VDDO, nRESET, GND
AD1 Arduino Analog Inputs header A [0:3]
IOL1 Arduino IOL header UART, INT [0:1], SPI2
IOH1 Arduino IOH header I2C, SPI1
P2 External JTAG debug connection header
P3 Current measurement header
P5 External power supply header
P6 Input and output of level shifter
Table 10. Switch Descriptions
Designator Description
SW1 Pushbutton switch to reset RSL10
SW2 Pushbutton switch for DIO5

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B.5 CONNECTORS
Table 11. Connector Descriptions
Designator Description
J1 RF switch connector
J2 Micro USB port for power supply, JTAG and UART emulation
J3 MCU programming connector
J4 Digilent PMOD peripheral connector I2C, SPI1, INT0
J5 Battery Holder (12mm coin cell)