Performance Computer PT-VME151A User manual

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Document Number 126A0180
315 Science Parkway
Performance
A Performance Technologies Company
Rochester, New York USA 14620
Computer
USER’S MANUAL
PT-VME151A/151AE
Extensible Single Board Computer/Controller
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When reviewing this document please note any issues that you may have with the document (errors,
points of confusion, grammar or spelling mistakes, etc.) and contact Technical Publications at (716) 256-
0200 or pccsuppor[email protected]. All comments, suggestions, and criticisms are welcome.
Copyright Notice
© 1993-1994 by Performance Computer, a Performance Technologies Company. -- Printed in USA.
315 Science Parkway, Rochester, New York 14620
Trademarks
Microware and OS-9 are trademarks of Microware Systems Corporation.
PTbug is a trademark of Performance Computer.
All other brands or names are trademarks of their respective holders.
All rights reserved. This document is the sole property of Performance Computer.
Rev ECN Pages Affected Date Approvals
10 - All 11/22/93
11 Minor Rev 60 1/11/94
20 080A000154 Schematic 1,15 (1 of 28) 4/22/94
30 080A000179 Schematic 1,3,14 & 26 12/05/94
REVISION CONTROL
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NOTICE
This document presents information for users of the Performance Computer Models PT-VME151A
Extensible Single Board Computer/Controller.
Although the information contained within this document is considered accurate and characteristic of the
subject product, Performance Computer reserves the right to make changes to this document and any prod-
ucts described herein to improve reliability, function, or design. Performance Computer does not assume
any liability arising out of the application or use of any product or circuit described herein.
No part of this document may be copied or reproduced in any form or by any means without the prior
permission of Performance Computer.
WARNING
THIS EQUIPMENT GENERATES, USES, AND CAN RADIATE RADIO FREQUENCY ENERGY
AND, IF NOT INSTALLED AND USED IN ACCORDANCE WITH THE INSTRUCTION MANUAL,
MAY CAUSE INTERFERENCE TO RADIO COMMUNICATIONS. AS TEMPORARILY
PERMITTED BY REGULATION, IT HAS NOT BEEN TESTED FOR COMPLIANCE WITH THE
LIMITS FOR CLASS A COMPUTING DEVICES PURSUANT TO SUBPART J OF PART 15 OF FCC
RULES, WHICH ARE DESIGNED TO PROVIDE REASONABLE PROTECTION AGAINST SUCH
INTERFERENCE. OPERATION OF THIS EQUIPMENT IN A RESIDENTIAL AREA IS LIKELY TO
CAUSE INTERFERENCE, IN WHICH CASE THE USER, AT HIS OWN EXPENSE, WILL BE
REQUIRED TO TAKE WHATEVER MEASURES MAY BE REQUIRED TO CORRECT THE INTER-
FERENCE.
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Safety Information
This section is provided as a summary of the safety recommendations throughout this manual. Perfor-
mance Computer (PCC) recommends that all safety precautions are followed to prevent harm to yourself
or the equipment. Please follow all warnings marked on the equipment.
Safety Precautions
• Follow all warnings and instructions marked on the equipment.
• Ensure that the voltage and frequency of your power source matches the voltage and frequency
inscribed on the equipments electrical rating label.
• Never push objects of any kind through the openings in the equipment. Dangerous voltages may be
present. Conductive foreign objects could produce a short circuit that could cause fire, electrical
shock, or damage your equipment.
Symbols
The following symbols appear in this document.
CAUTION: There is risk of personal injury or equipment damage. Follow the instructions.
WARNING: Hazardous voltages are present. To reduce the risk of electric shock and danger to personal
heath, follow the instructions.
!
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Table of Contents
Performance Computer
Extensible Single Board Computer/Controller User’s Manual v
Section 1 INTRODUCTION 1
Scope 1
Applicable Documents 2
Model Designations 3
Features 4
Family Members 6
PT-VME131/131E 6
PT-VME141/141E 7
PT-VME151/151E 7
Glossary and Conventions 8
Glossary 8
Conventions 9
Section 2 GETTING STARTED 11
Unpacking and Inspection 11
Hardware Configuration 12
Device Positions 12
“Watchdog” Timer Setup 13
PROM/ROM/SRAM/EEPROM Socket Configuration 14
Location U23 Setup 15
Location U38 Setup 15
SCSI Termination 17
Disabling Termination 17
Termination Power Source 17
TERMPWR Overview 17
DRAM Module Upgrading 19
EPAK Installation 20
Board Installation 21
Power Considerations 21
Slot Considerations 21
Backplane Insertion 21
SCSI Considerations 23
Cabling 23
Example 23
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Table of Contents
vi Extensible Single Board Computer/Controller User’s Manual
Mechanical restraints 24
SCSI device grounds 24
Device addresses 25
Serial Port Cabling 25
Example 25
Mechanical restraints 26
Section 3 FUNCTIONAL DESCRIPTION 27
Microprocessor 28
Memory 28
DRAM 28
DRAM Mapping 29
Sizing 29
Parity 30
Checking 30
Initialization 31
Testing 31
PROM/SRAM Sockets 31
Nonvolatile SRAM and Time of Day/Calendar Clock 31
Serial EEPROM 31
Interval Timer 32
VMEbus Interface 33
DARF64 33
VME
64
Transfers 33
Transfer Modes 33
Decoupled 34
Atomic 34
VMEbus Control Logic 34
VMEbus Slave Accesses 35
EPAK Access from the VMEbus 35
VMEbus Master Accesses 35
68040 Accesses 35
Read-Modify-Write 36
DMAC 36
Location Monitor 37
Registers 37
Test and Diagnostics 37
ACC 38
Reset 38
Local Bus Timer 38
Watchdog Timer 38
Tick Timer 39
Register Block 39
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Performance Compute
r
Extensible Single Board Computer/Controller User’s Manual vii
Interrupt Handler 39
Local Level 7 Sources 39
Abort 40
SCSI Bus Reset 40
AC Fail 40
System Fail 40
General Purpose Local Interrupts 40
Location Monitor FIFO 41
DARF64 VME Event 41
Timer Event 41
Tick 42
Interval 42
I/O Event 42
FAS216 Requests 42
EPAK Requests (-EPIRQ) 42
EPAK Vectored Interrupt Request 43
DUART Interrupt Request (-INTP<5>) 43
VMEbus Interrupts 43
Interrupt Acknowledgment 44
VMEbus Requester 44
System Monitor Functions 44
Reset 44
System Clock Driver 44
VMEbus Arbiter 44
IACK Daisy Chain Driver 45
Bus Timer 45
I/O UTILITIES 45
System Control Registers 45
System Control Register 1 45
VMEbus Page Select 46
User LEDs 46
SCSI DMA Read/Write Direction 46
EPAK Space Cache Enable 46
VMEbus Space Cache Enable 46
System Control Register 2 47
Enable EPAK Access from the VMEbus 47
Enable Parity Error Checking 47
Enable Bad Parity 47
Enable Interval Timer Interrupts 49
Enable Tick Timer Interrupts 49
System Status Registers 50
System Status Register 1 50
Hex Switch 50
System Status Register 2 50
68040 Parity Error 50
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Table of Contents
viii Extensible Single Board Computer/Controller User’s Manual
SCSI DMA Parity Error 50
DARF Parity Error 50
EPAK Parity Error 51
SCSI Present 51
System Status Register 3 51
DRAM Size 51
Parity Installed 51
Interval Timer Interrupt Pending 51
DUART 52
Utility Serial Ports 52
General Purpose Timer/Counter 52
Parallel Input Port 52
Clear-to-Send 52
Data-Terminal-Ready 52
EPAK General Purpose Input 53
Serial EEPROM Data In 53
Parallel Output Port 53
Request-to-Send 53
Data-Set-Ready 53
EPAK General Purpose Output 53
Serial EEPROM Select 53
Serial EEPROM Control 53
Serial EEPROM Data Out 54
SCSI Controller 55
SCSI Bus 55
Register Access 55
DMA Mechanism 56
Interrupts 56
Termination 56
EPAK Interface 58
Section 4 FUNCTIONAL SUMMARY 59
Memory Map 59
Default VMEbus Slave Addressing 60
151A System Registers 61
System Control Register 1 61
System Control Register 2 63
System Status Register 1 64
System Status Register 2 65
System Status Register 3 66
SCSI Memory Address Register 67
Jumper List (Defaults) 67
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Performance Compute
r
Extensible Single Board Computer/Controller User’s Manual ix
Interrupt Control 68
Register Maps 69
ACC 69
DARF64 70
DS1643 Nonvolatile Timekeeping RAM 71
82C54 Interval Timer 71
EMULEX FAS216 SCSI Controller 72
68681 DUART 72
Controls and Indicators 73
Rotary Switch 73
“RUN” Indicator 74
“FAULT” Indicator 74
“VME” Indicator 74
RESET Switch 74
ABORT Switch 74
User Programmable LEDs 74
Section 5 CONNECTOR PINOUTS 75
Utility Serial Port Pin Assignments 75
VMEbus Pin Assignments 76
EPAK Connectors 78
DRAM Module 79
Section 6 MECHANICAL AND ENVIRONMENTAL 81
Power Requirements 81
Ambient Temperature 81
Humidity 81
Vibration 81
Mechanical Shock 82
Physical Dimensions 82
Section 7 APPENDICES 83
Product Warranty 83
Product Return Procedure 84
Installation Notes 85
EEPROM Usage 86
PTbug 86
OS-9 87
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Table of Contents
x Extensible Single Board Computer/Controller User’s Manual
The differences between the PT-VME151A and the VME151 89
Renamed Registers 89
New Devices 89
DRAM Sizing 89
SRAM Access 90
PT-VME151A Differences From VME131/141 91
DARF64 uses 68040 mode 91
SCSI Controller differences 91
Effects of 68040 vs. 68030 91
Cacheability and Serialization 91
68040 Cache Control Registers 92
68040 Cache Clearing 93
68040 Exception Processing 93
PT-VME151A Control Register Differences 93
AVICS Overview 95
Functional Description 95
BI-mode 95
Location Monitor 96
VMEbus Master Memory Map 96
Master VMEbus Accesses 98
Slave VMEbus Accesses 99
AVICS Application Notes 101
Local Interrupts 101
Example: 101
Setting Up the Master Bus Memory Map 102
Example: 102
Setting Up A24/A32 Slave Images on the Bus 102
Example A: 103
Example B: 104
Generating VMEbus Interrupts 105
Example: 105
Receiving VMEbus Interrupts 105
Example: 105
Initiating a DMA Transfer 106
Example: 106
VMEbus Address Modifiers 108
Section 8 INDEX 109
Section 9 SCHEMATICS 115
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List of Figures
Performance Computer
Extensible Single Board Computer/Controller User’s Manual xi
Figure 1: PT-VME151A/151AE Device Positions 12
Figure 2: EPROM/ROM/SRAM/EEPROM Device Orientation 14
Figure 3: K4 and K10Jumpers 15
Figure 4: K3 and K11 Jumpers 15
Figure 5: U23 and U38 Jumper Settings 16
Figure 6: SCSI Components 17
Figure 7: PT-VME151A Front Panel 22
Figure 8: Example SCSI Cable 24
Figure 9: Example Serial port Cable 26
Figure 10: Block Diagram 27
Figure 11: Interval Timer Block Diagram 32
Figure 12: Timer Block Diagram 41
Figure 13: PT-VME151A Front Panel Controls and Indicators 73
Figure 14: DARF Memory Map 97
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List of Figures
xii Extensible Single Board Computer/Controller User’s Manual
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List of Tables
Performance Computer
Extensible Single Board Computer/Controller User’s Manual xiii
Table 1: EPAK Caching Options 46
Table 2: Memory Map 59
Table 3: Default VMEbus A24 Memory Map 60
Table 4: Default VMEbus A32 Memory Map 60
Table 5: Interrupt Request Summary 68
Table 6: ACC Register Map 69
Table 7: DARF64 Registers 70
Table 8: DS1643 Nonvolatile Timekeeping RAM Registers 71
Table 9: 82C54 Interval Timer Registers 71
Table 10: EMULEX FAS216 SCSI Controller Register Map 72
Table 11: Motorola 68681 DUART Register Map 72
Table 12: Utility Serial Port Pin Assignments 75
Table 13: VMEbus “P1” Connections 76
Table 14: VMEbus” P2” Connections 77
Table 15: EPAK Connections 78
Table 16: EPAK mounting standoffs 79
Table 17: DRAM Module Connections 79
Table 18: EPAK mounting standoffs 80
Table 19: Power Requirements 81
Table 20: Ambient Temperature 81
Table 21: Humidity Constraints 81
Table 22: Physical Dimensions 82
Table 23: EEPROM Default Values 87
Table 24: 151 to 151A Register Map DIfferences 89
Table 25: EPAK Caching 93
Table 26: Recommended Interrupt Assignments 101
Table 27: VMEbus Address Modifiers 108
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List of Tables
xiv Extensible Single Board Computer/Controller User’s Manual
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Section
Extensible Single Board Computer/Controller User’s Manual 1
1
INTRODUCTION
Scope
This document provides information for users of the Model PT-VME151A and PT-VME151AE Exten-
sible Single Board Computer/Controllers.
This manual is not intended as a stand-alone document. If you plan on writing software for the board or
developing an Expansion Module the references cited below in the Applicable Documents section are
necessary.
This manual does provide the information necessary to understand the operation and features of the
board. A prime objective was to answer those questions raised by system developers as to whether the
PT-VME151A/151AE will complement their architecture. When combined with the supporting docu-
mentation listed below, a complete description of PT-VME151A/151AE facilities are presented.
Section 1 Provides an introduction and general overview of the PT-VME151A. It is intended as a quick
summary of PT-VME151A/151AE features and provides a framework for the rest of the
document.
Section 2 (Getting Started) describes the physical setup and installation procedures.
Section 3 The Functional Description provides a detailed description of PT-VME151A/151AE architec-
ture and functional blocks.
Section 4 Summarizes the PT-VME151A/151AE memory map, registers, controls, indicators, etc.
Section 5 (Connector Pinouts) summarizes the PT-VME151A/151AE external connections.
Section 6 Describes mechanical and environmental characteristics of the PT-VME151A/151AE.
Section 7 Appendices.
Section 8 Index.
Section 9 Schematics.
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Section 1INTRODUCTION
2 Extensible Single Board Computer/Controller User’s Manual
Applicable Documents
a. VMEbus Specification Manual, Revision ANSI/IEEE STD 1014-1987, VMEbus International
Trade Association (VITA). VITA; 10229 N. Scottsdale Road, Suite B; Scottsdale, AZ 85253.
b. M68000 Family Programmer’s Reference Manual; M68000PM/AD; Motorola Incorporated, 1989.
Motorola Literature Distribution; P.O. Box 20912; Phoenix, AZ 85036.
c. MC68040, MC68EC040, MC68LC040 Microprocessor User’s Manual; M68040UM/AD; Motorola
Incorporated, 1992. Motorola Literature Distribution; P.O. Box 20912; Phoenix, AZ 85036.
d. MC68040 Designers Handbook; MC68040DH/AD; Motorola Incorporated, 1990. Motorola Litera-
ture Distribution; P.O. Box 20912; Phoenix, AZ 85036.
e. MC68681 Multi-Function Peripheral Specification (DUART); September, 1985. Motorola Semi-
conductor Products Incorporated; 3501 Ed Bluestein Boulevard; Austin, TX 78721.
f. PT-VME131/141/151 Expansion Module Design Guide; Document Number 126A0075, Perfor-
mance Technologies, Incorporated.
g. 93C46 Data Sheet; Catalyst Semiconductor, Inc. or International CMOS Technology, Inc.
h. FAS216/226/236 Technical Manual; VLSI51007-00 Rev A, January 4,1991. Emulex Micro
Devices; 3545 Harbor Boulevard; Costa Mesa, CA 92626.
i. Intel Peripherals Handbook; Literature Order Number 296467. Intel Corporation, Literature Sales;
P.O. Box 7641; Mt. Prospect, IL 60056-7641.
j. Openbus Interface Components - VMEbus User Manual; Issue 1; Document: 891014.MD300.02.
Newbridge Microsystems; 603 March Road; Kanata, Ontario, Canada K2K 2M5.
k. Dallas Semiconductor, 1992-1993 Product Data Book. DS1643 Nonvolatile Timekeeping RAM.
Dallas Semiconductor; 4401 South Beltwood Parkway; Dallas, Texas 75244-3292.
l. American National Standard for Information System - Small Computer System Interface (SCSI),
ANSI X3.131-1986. American National Standard for Institute, Inc.; 1430 Broadway; New York,
New York 10018.
Information regarding EPAKs is provided in a separate User’s Manual for the specific EPAK.
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Performance Computer
Extensible Single Board Computer/Controller User’s Manual 3
Model Designations
The PT-VME151A is available with a 25 MHz 68040 microprocessor or a 25 MHz 68EC040 (68040
without MMU or FPU). Additionally, the PT-VME151A has options of 4, 8, 16, 32 or 64 megabytes of
main memory. Model designations are as follows:
Model PT-VME151A-10439 68040-25MHz, 4 Mbyte
Model PT-VME151A-10440 68040-25MHz, 8 Mbytes
Model PT-VME151A-10441 68040-25MHz, 16 Mbytes w/ parity
Model PT-VME151A-10442 68040-25MHz, 32 Mbytes w/ parity
Model PT-VME151A-10443 68040-25MHz, 64 Mbytes w/ parity
Model PT-VME151AE-10444 68EC040-25MHz, 4 Mbyte
Model PT-VME151AE-10445 68EC040-25MHz, 8 Mbytes
Model PT-VME151AE-10446 68EC040-25MHz, 16 Mbytes w/ parity
Model PT-VME151AE-10447 68EC040-25MHz, 32 Mbytes w/ parity
Model PT-VME151AE-10448 68EC040-25MHz, 64 Mbytes w/ parity
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Section 1INTRODUCTION
4 Extensible Single Board Computer/Controller User’s Manual
Features
• MC68040 Thirty-Two Bit Microprocessor With Internal Cache and FPU
PT-VME151 utilizes 25 MHz MC68040 MPU w/Memory Management Unit
PT-VME151E utilizes 25 MHz MC68EC040 MPU w/o MMU or FPU
MC68030-Compatible Integer Execution Unit
MC68881/MC68882-Compatible Floating Point Unit
Independent Instruction and Data Memory Management Units
4KByte Physical Instruction Cache and 4KByte Physical Data Cache Accessible Simultaneously
Low Latency Bus Accesses for Reduced Cache-Miss Penalty
Concurrent Integer Unit, FPU, MMU, and Bus Controller Operation Maximizes Throughput
User Object-Code Compatibility with all Earlier M68000 Microprocessors
• 4, 8, 16, 32 or 64 Megabytes of Shared DRAM
4 Clock Local Access
68040 Cache Burst Read Mode (4-2-2-2 Clock Timing)
• Parity Checking
For 16, 32 or 64 Megabyte configurations
• Two 32 Pin JEDEC Sockets (Bytewide Port)
Both sockets support ROM, PROM, EPROM, and Flash EPROM devices
One socket is additionally capable of supporting SRAM and RTC devices
• Flexible EPAK Interface Extension Capability
Supports Slave, DMA, and Buffered DMA I/O Functions
Options for Ethernet, High Speed SYNC SIO, High Density ASYNC SIO, etc.
Front Panel Interconnect
•VME64™ VMEbus Interface Features
Advanced Control Circuit (ACC) ASIC
Full VMEbus System Controller w/Auto-Program Option
VMEbus Requester, Interrupter, and Interrupt Handler
Tick and Watchdog Timers, General Purpose Clocks
Data/Address Register File (DARF64) ASIC
60 MByte per second D64MBLT (VME64) Data Transfer Rate
VMEbus A64/A32/A24/A16 Address Interface
VMEbus D64MBLT/D32BLT/D16BLT/D32/D16/D8(EO), UAT, RMW Data Interface
Location Monitor w/Message FIFO
Programmable Slave Address Mapping And Protection
Integral A32:D32 Local DMA Controller w/Burst Capabilities
Programmable Burst Sizes on Local Bus DMA Operations
• Fast SCSI-2 Single Ended Interface Based Upon EMULEX FAS216
Supports ANSI X3.131-1986 and X3T9.2/86-109 Rev. 10c Standards
10 MByte per second SCSI Data Transfer Rate
Active SCSI bus termination
DMA Support To Local DRAM
P2 SCSI Interconnect
• 82C54 CHMOS Programmable Interval Timer
Three independent 16-bit counters
Provides Interrupt
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Performance Computer
Extensible Single Board Computer/Controller User’s Manual 5
• General Purpose Local I/O
68681 DUART
Dual RS-232 ASYNC Serial I/O ports w/Front Panel Interconnect
16-bit General Purpose Timer
128 Byte EEPROM
• DS1643 Nonvolatile Timekeeping RAM
8184 Bytes of Nonvolatile SRAM
Real-Time Clock with Integrated Crystal
Power Fail Control Circuit
Lithium Energy Source
• Front Panel User Interface Features
Reset and Abort Switches
General Purpose Hexadecimal Switch
68040 (RUN) and VMEbus (VME) Activity LED indicators
User Programmable FAULT LED
Four User Programmable LEDs
• Software Support
PTbug Debugger/Monitor
OS-9 Real-Time Operating System
VxWorks Real-Time Operating System
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