Peritek VCT-V User manual

VCT-V, VCU-V, VCD-V
GRAPHICS BOARDS
USER'S MANUAL
Copyright (c) 1995 by
Peritek Corporation
5550 Redwood Road
Oakland, CA 94619
[phone]
FAX [phone]
email: [email protected]
Release 2.3
April 19, 1995
Applies to:
VCT-V FAB REV 4 and up
VCU-V FAB REV 4 and up
VCD-V FAB REV 2 and up

Peritek

Peritek

Table of Contents
Introduction......................................................................................................................i-1
The Organization of This Manual ................................................................................................i-1
Getting Help.................................................................................................................................i-2
Manual Revisions.........................................................................................................................i-2
Notices .........................................................................................................................................i-3
Conventions Used In This Manual...............................................................................................i-4
Chapter 1 General Information .......................................................................................1-1
1.1 Introduction...........................................................................................................................1-1
1.2 Functional Description..........................................................................................................1-2
Special Features of the VCU-V......................................................................................1-3
Special Features of the VCT-V......................................................................................1-3
Special Features of the VCD-V......................................................................................1-3
TMS 34020 Graphics Processor ....................................................................................1-3
TMS 34082 Floating Point Coprocessor.......................................................................1-4
Video RAM....................................................................................................................1-4
34020 Processor Memory (DRAM and PROM)............................................................1-5
Display Features.............................................................................................................1-5
VMEbus Interface..........................................................................................................1-6
Peripheral Support .........................................................................................................1-7
1.3 Additional References...........................................................................................................1-8
1.4 General Specifications...........................................................................................................1-9
1.5 Monitor Requirements...........................................................................................................1-16
1.6 Configuration Information.....................................................................................................1-16
Chapter 2 Installing Your Peritek Graphics Board.........................................................2-1
2.1 Introduction...........................................................................................................................2-1
2.2 Unpacking Your Board .........................................................................................................2-2
2.3 VMEbus Installation .............................................................................................................2-3
2.3.1 Default Interrupt Settings on Peritek Video Boards.............................................2-3
2.3.2 Checking Board Addresses..................................................................................2-4
2.3.3 Installing the Graphics Board...............................................................................2-5
Figure 2-1 Example VMEbus Backplane ......................................................2-6
2.3.4 What's Next?........................................................................................................2-7
2.3.5 Connecting the Mouse, Keyboard, and Console..................................................2-8
2.3.6 Checking your Display.........................................................................................2-9
Figure 2-2 Jumper Locations for the VCT-V and VCU-V........................................................2-10
Figure 2-3 Jumper Locations for the VCD-V............................................................................2-11
2.4 Option Selection....................................................................................................................2-12
2.4.1 CSR Addresses.....................................................................................................2-12
2.4.2 Interrupt Grant Receive/Acknowledge.................................................................2-13
2.4.3 Interrupt Priority..................................................................................................2-14

Peritek

Peritek

Peritek
2.4.4 Flash EEPROM....................................................................................................2-15
2.4.5 Autoboot Enable ..................................................................................................2-15
VCD Autoboot Enable.....................................................................................2-15
VCT-V and VCU-V Autoboot Enable.............................................................2-15
2.4.6 DRAM and VRAM Size......................................................................................2-16
2.4.7 Master Pixel Clock Oscillator Frequency ............................................................2-17
2.4.8 Interlaced Operation and VCU-V Slow Mode.....................................................2-18
2.4.9 BT482 Output Level (VCD-V/T - special order only).........................................2-18
2.4.10 Selecting PTERM Options.................................................................................2-19
2.4.11 Selecting Serial I/O Options...............................................................................2-20
2.5 Connections to the VCU-V, VCT-V, and VCD-V................................................................2-22
2.5.1 Console, Mouse, Trackball, and Keyboard Connectors.......................................2-23
2.5.1a Console...............................................................................................................2-23
2.5.1b Mouse and Trackball..........................................................................................2-24
2.5.1c Serial and PC Keyboards....................................................................................2-26
2.5.2 Video Connector..................................................................................................2-27
2.5.3 High Speed Data Port (HSP)................................................................................2-28
2.5.4 8-bit SCSI Port (VCT-V and VCU-V).................................................................2-29
2.5.5 Digital Video Connector (VCD-V only)..............................................................2-30
Chapter 3 Software Summary.........................................................................................3-1
3.1 Introduction...........................................................................................................................3-1
3.2 Software Availability by Platform and OS............................................................................3-2
3.3 Write Posting.........................................................................................................................3-3
3.4 PX Windows Server..............................................................................................................3-4
3.5 Graphics Subroutine Package................................................................................................3-5
3.6 PTERM Terminal Emulator..................................................................................................3-8
3.7 Software Development Package............................................................................................3-9
Features of the 34020 Development Tools ....................................................................3-10
3.8 Ancillary Programs................................................................................................................3-11
3.8.1 Initialization Tables .............................................................................................3-11
3.8.2 Software Installation Examples............................................................................3-11
3.8.3 VCnVINT ............................................................................................................3-12
3.8.4 VCnVTST............................................................................................................3-12
3.8.5 VCnVLD..............................................................................................................3-14
3.8.6 VCnVWT.............................................................................................................3-14
3.8.7 VCnVHLT ...........................................................................................................3-14
3.8.8 VCnVGO.............................................................................................................3-14
3.8.9 VCnVOFF............................................................................................................3-15
3.8.10 VCnVDMP ........................................................................................................3-15
3.8.11 TIDTSK.............................................................................................................3-15
Chapter 4 Theory of Operation.......................................................................................4-1
4.1 Introduction...........................................................................................................................4-1
4.2 System Architecture ..............................................................................................................4-2
VMEbus Interface..........................................................................................................4-2
Control Registers ...........................................................................................................4-2

Peritek
34020/VMEbus Host Interface ......................................................................................4-3
34020 Functional Unit ...................................................................................................4-3
34020 Data and Address Buses......................................................................................4-3
4.3 Graphics Board Clock Sources..............................................................................................4-4
Phase Locked Loop (PLL) Clock...................................................................................4-4
34020 Video and Processor Clock Synchronization......................................................4-5
4.4 VMEbus Interface.................................................................................................................4-5
Address Decoding..........................................................................................................4-5
Data Bus Transceivers and the Byte Swapper................................................................4-6
4.5 VMEbus Interrupt Controller................................................................................................4-7
4.6 System Arbitration ................................................................................................................4-7
Control Register Decoding (CSRREQ)..........................................................................4-8
Line Buffer Decoding (IOREQ).....................................................................................4-8
34020 Host Interface Arbitrator.....................................................................................4-9
VMEbus Block Mode....................................................................................................4-9
4.7 Display Memory....................................................................................................................4-9
VCD-V and VCU-V Pixel Size......................................................................................4-10
VCT-V Pixel Size..........................................................................................................4-10
VCD-V Display Memory Size.......................................................................................4-10
VCU-V Display Memory Size.......................................................................................4-10
VCT-V Display Memory Size........................................................................................4-11
4.8 System Memory.....................................................................................................................4-11
SIMM Sockets ...............................................................................................................4-11
Flash EEPROM..............................................................................................................4-11
4.9 Programmed Logic Devices..................................................................................................4-12
AMD MACH Field Programmable Gate Arrays (FPGA)..............................................4-12
PAL22V10 Field Programmable Gate Array (FPGA)...................................................4-12
Chapter 5 Programming On-board Devices and Memories............................................5-1
5.1 Introduction...........................................................................................................................5-1
5.2 VMEbus and Control Registers.............................................................................................5-3
5.2.1 Control/Status Register (CSR).............................................................................5-4
5.2.2 Line Address Register (LAR) ..............................................................................5-6
5.2.3 A32 Address Map and the XARADR Address Match Register...........................5-8
5.2.4 A16/A24 Address Map and DBRADR Address Match Register.........................5-9
5.2.5 VECADR Interrupt Vector Address Register ......................................................5-10
5.2.7 VMEbus Block Transfers (BLT) .........................................................................5-11
5.2.8 Device Register Access........................................................................................5-11
5.3 TMS 34020 Graphics Systems Processor..............................................................................5-14
5.3.1 34082 Floating Point Coprocessor.......................................................................5-15
5.3.2 Writemask Register..............................................................................................5-15
5.3.3 VRAM Color Register and Block Fill Special Function......................................5-16
5.3.4 Memory Types and Sizes.....................................................................................5-17
5.3.5 Byte Ordering and the Hardware Byte Swapper..................................................5-17
5.3.5a VMEbus and 34020 Byte Order Mapping .........................................................5-18
5.3.5b Example Code for Software Byte Swapping......................................................5-19

Peritek
5.3.5c The Hardware Byte Swapper .............................................................................5-19
5.3.6 Virtual Memory, Page Faults, and Autoincrement Registers...............................5-20
5.3.7 34020 Memory and Device Addresses.................................................................5-20
5.3.8 Sample Address Calculations...............................................................................5-22
5.4 Initialization Tables...............................................................................................................5-27
5.4.1 Application Note: Tweaking 34020 Initialization Parameters .............................5-31
Request for Timing Table................................................................................5-34
5.5 Vertical and Horizontal Zoom...............................................................................................5-35
Vertical Zoom................................................................................................................5-35
Horizontal Zoom............................................................................................................5-35
5.5.1 ICS1562 Type Horizontal Zoom Register ...........................................................5-36
5.5.2 VCD-V/A6 Type ICS1562 Version Horizontal Zoom Register...........................5-37
5.5.3 VCD-V/A6/D8 Type ICS1562 Version Horizontal Zoom Register.....................5-38
5.5.4 Horizontal Zoom Control Register (Non-ICS1562 VCD-V's).............................5-39
5.6 BT463 - Color Map Controller for the VCT-V.....................................................................5-43
5.7 BT468 - Color Map Controller for the VCU-V.....................................................................5-47
5.8 BT459 - Color Map Controller for the VCD-V.....................................................................5-50
5.9 BT482 - Color Map Controller for the VCD-V.....................................................................5-53
5.10 VCD-V Digital Lookup Table (DLUT) ..............................................................................5-57
5.11 Hardware Cursors................................................................................................................5-61
5.12 Serial I/O Ports (DUART)...................................................................................................5-64
5.13 SCSI Port.............................................................................................................................5-66
5.14 PC Keyboard Controller (8242PC) .....................................................................................5-69
5.15 High Speed Data Port (HSP)...............................................................................................5-69
5.16 Graphics Board Interrupts...................................................................................................5-72
5.17 Flash EEPROM and Serial EEPROM.................................................................................5-73
Chapter 6 Troubleshooting .............................................................................................6-1
6.1 Introduction...........................................................................................................................6-1
6.2 Selecting an Address Range for your Board..........................................................................6-2
Memory Map Example ..................................................................................................6-4
6.3 Does this board talk at all?....................................................................................................6-5
6.4 General Procedures ...............................................................................................................6-7
6.6 Maintenance, Warranty, and Service.....................................................................................6-9
Maintenance...................................................................................................................6-9
Warranty ........................................................................................................................6-9
Return Policy .................................................................................................................6-9
Out of Warranty Service ................................................................................................6-9

Peritek