Philips TDA8922 User manual

DATA SHEET
Objective specification 2003 Mar 20
TDA8922
2×25 W class-D power amplifier
INTEGRATED CIRCUITS

2003 Mar 20 2
Philips Semiconductors Objective specification
2×25 W class-D power amplifier TDA8922
CONTENTS
1 FEATURES
2 APPLICATIONS
3 GENERAL DESCRIPTION
4 QUICK REFERENCE DATA
5 ORDERING INFORMATION
6 BLOCK DIAGRAM
7 PINNING
8 FUNCTIONAL DESCRIPTION
8.1 General
8.2 Pulse width modulation frequency
8.3 Protections
8.3.1 Overtemperature
8.3.2 Short-circuit across loudspeaker terminals and
to supply lines
8.3.3 Start-up safety test
8.3.4 Supply voltage alarm
8.4 Differential audio inputs
9 LIMITING VALUES
10 THERMAL CHARACTERISTICS
11 QUALITY SPECIFICATION
12 STATIC CHARACTERISTICS
13 SWITCHING CHARACTERISTICS
14 DYNAMICAC CHARACTERISTICS(STEREO
AND DUAL SE APPLICATION)
15 DYNAMIC AC CHARACTERISTICS (MONO
BTL APPLICATION)
16 APPLICATION INFORMATION
16.1 BTL application
16.2 Pin MODE
16.3 Output power estimation
16.4 External clock
16.5 Heatsink requirements
16.6 Output current limiting
16.7 Pumping effects
16.8 Reference design
16.9 PCB information for HSOP24 package
16.10 Classification
16.11 Bill of materials for reference design
16.12 Curves measured in reference design
16.13 Application schematics
17 PACKAGE OUTLINE
18 SOLDERING
18.1 Introduction
18.2 Through-hole mount packages
18.2.1 Soldering by dipping or by solder wave
18.2.2 Manual soldering
18.3 Surface mount packages
18.3.1 Reflow soldering
18.3.2 Wave soldering
18.3.3 Manual soldering
18.4 Suitability of IC packages for wave, reflow and
dipping soldering methods
19 DATA SHEET STATUS
20 DEFINITIONS
21 DISCLAIMERS

2003 Mar 20 3
Philips Semiconductors Objective specification
2×25 W class-D power amplifier TDA8922
1 FEATURES
•High efficiency (∼90%)
•Operating supply voltage from ±12.5 to ±30 V
•Very low quiescent current
•Low distortion
•Usable as a stereo Single-Ended (SE) amplifier or as a
mono amplifier in Bridge-Tied Load (BTL)
•Fixed gain of 30 dB in Single-Ended (SE) and 36 dB in
Bridge-Tied Load (BTL)
•High output power
•Good ripple rejection
•Internal switching frequency can be overruled by an
external clock
•No switch-on or switch-off plop noise
•Short-circuit proof across load and to supply lines
•Electrostatic discharge protection
•Thermally protected.
2 APPLICATIONS
•Television sets
•Home-sound sets
•Multimedia systems
•All mains fed audio systems
•Car audio (boosters).
3 GENERAL DESCRIPTION
The TDA8922 is a high efficiency class-D audio power
amplifier with very low dissipation. The typical output
power is 2 ×25 W.
The device is available in the HSOP24 power package
with a small internal heatsink and in the DBS23P
through-hole power package. Depending on the supply
voltage and load conditions, a very small or even no
external heatsink is required. The amplifier operates over
a wide supply voltage range from ±12.5 to ±30 V and
consumes a very low quiescent current.
4 QUICK REFERENCE DATA
Note
1. See Section 16.5.
5 ORDERING INFORMATION
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
General; VP=±20 V
VPsupply voltage ±12.5 ±20 ±30 V
Iq(tot) total quiescent supply
current no load connected −55 75 mA
ηefficiency Po= 25 W; SE: RL=2×8Ω; fi= 1 kHz −90 −%
Stereo single-ended configuration
Pooutput power RL=8Ω; THD = 10%; VP=±20 V; note 1 22 25 −W
RL=4Ω; THD = 10%; VP=±15 V; note 1 22 25 −W
Mono bridge-tied load configuration
Pooutput power RL=8Ω; THD = 10%; VP=±15 V; note 1 46 50 −W
TYPE
NUMBER PACKAGE
NAME DESCRIPTION VERSION
TDA8922TH HSOP24 plastic, heatsink small outline package; 24 leads;
low stand-off height SOT566-3
TDA8922J DBS23P plastic DIL-bent-SIL power package; 23 leads
(straight lead length 3.2 mm) SOT411-1

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Philips Semiconductors Objective specification
2×25 W class-D power amplifier TDA8922
6 BLOCK DIAGRAM
handbook, full pagewidth
MGU994
OUT1
VSSP1
VDDP2
DRIVER
HIGH
OUT2
BOOT2
TDA8922TH
(TDA8922J)
BOOT1
DRIVER
LOW
RELEASE1
SWITCH1
ENABLE1
CONTROL
AND
HANDSHAKE
PWM
MODULATOR
MANAGER
OSCILLATOR TEMPERATURE SENSOR
CURRENT PROTECTION
STABI
MODE
INPUT
STAGE
mute
9 (3)
8 (2)
IN1−
IN1+
22 (15)
21 (14)
20 (13)
17 (11)
16 (10)
15 (9)
VSSP2 VSSP1
DRIVER
HIGH
DRIVER
LOW
RELEASE2
SWITCH2
ENABLE2 CONTROL
AND
HANDSHAKE
PWM
MODULATOR
11 (5)
SGND1
7 (1)
OSC
2 (19)
SGND2
6 (23)
MODE
INPUT
STAGE
mute
5 (22)
4 (21)
IN2−
IN2+
19 (-)24 (17)
VSSD HW(1)
1 (18)
VSSA2
12 (6)
VSSA1
3 (20)
VDDA2
10 (4)
VDDA1
23 (16)13 (7)18 (12) 14 (8)
VDDP2
PROTSTABI VDDP1
Fig.1 Block diagram.
(1) Pin HW (TDA8922TH only) should be connected to pin VSSD in the application.
Pin numbers in parenthesis refer to the TDA8922J.

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Philips Semiconductors Objective specification
2×25 W class-D power amplifier TDA8922
7 PINNING
SYMBOL PIN DESCRIPTION
TDA8922TH TDA8922J
VSSA2 1 18 negative analog supply voltage for channel 2
SGND2 2 19 signal ground for channel 2
VDDA2 3 20 positive analog supply voltage for channel 2
IN2−4 21 negative audio input for channel 2
IN2+ 5 22 positive audio input for channel 2
MODE 6 23 mode selection input: standby, mute or operating
OSC 7 1 oscillator frequency adjustment or tracking input
IN1+ 8 2 positive audio input for channel 1
IN1−9 3 negative audio input for channel 1
VDDA1 10 4 positive analog supply voltage for channel 1
SGND1 11 5 signal ground for channel 1
VSSA1 12 6 negative analog supply voltage for channel 1
PROT 13 7 time constant capacitor for protection delay
VDDP1 14 8 positive power supply voltage for channel 1
BOOT1 15 9 bootstrap capacitor for channel 1
OUT1 16 10 PWM output from channel 1
VSSP1 17 11 negative power supply voltage for channel 1
STABI 18 12 decoupling of internal stabilizer for logic supply
HW 19 −handle wafer; must be connected to pin VSSD
VSSP2 20 13 negative power supply voltage for channel 2
OUT2 21 14 PWM output from channel 2
BOOT2 22 15 bootstrap capacitor for channel 2
VDDP2 23 16 positive power supply voltage for channel 2
VSSD 24 17 negative digital supply voltage

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Philips Semiconductors Objective specification
2×25 W class-D power amplifier TDA8922
handbook, halfpage
MGU995
HW
PROT
BOOT1
VDDP1
VSSP1
OUT1
BOOT2
VSSP2
OUT2
VSSD
VDDP2
STABI
MODE
VSSA1
VDDA1
SGND1
IN1+
IN1−
VDDA2
IN2+
IN2−
VSSA2
SGND2
OSC
TDA8922TH
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Fig.2 Pin configuration TDA8922TH.
handbook, halfpage
TDA8922J
MGU996
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
PROT
BOOT1
VDDP1
VSSP1
OUT1
BOOT2
VSSP2
OUT2
VSSD
VDDP2
STABI
MODE
VSSA1
VDDA1
SGND1
IN1+
IN1−
VDDA2
IN2+
IN2−
VSSA2
SGND2
OSC
Fig.3 Pin configuration TDA8922J.

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Philips Semiconductors Objective specification
2×25 W class-D power amplifier TDA8922
8 FUNCTIONAL DESCRIPTION
8.1 General
TheTDA8922isatwochannelaudiopoweramplifierusing
class-D technology. A detailed application reference
design is shown in Fig.10. Typical application schematics
are shown in Figs 37 and 38.
The audio input signal is converted into a digital Pulse
Width Modulated (PWM) signal via an analog input stage
and PWM modulator. To enable the output power
transistors to be driven, this digital PWM signal is applied
to a control and handshake block and driver circuits for
both the high side and low side. In this way a level shift is
performed from the low power digital PWM signal
(at logic levels) to a high power PWM signal which
switches between the main supply lines.
A 2nd-order low-pass filter converts the PWM signal to an
analog audio signal across the loudspeakers.
The TDA8922 one-chip class-D amplifier contains high
power D-MOS switches, drivers, timing and handshaking
between the power switches and some control logic. For
protection a temperature sensor and a maximum current
detector are built-in.
The two audio channels of the TDA8922 contain two
PWMs, two analog feedback loops and two differential
input stages. It also contains circuits common to both
channels such as the oscillator, all reference sources, the
mode functionality and a digital timing manager.
The TDA8922 contains two independent amplifier
channels with high output power, high efficiency (90%),
low distortion and a low quiescent current. The amplifier
channels can be connected in the following configurations:
•Mono Bridge-Tied Load (BTL) amplifier
•Stereo Single-Ended (SE) amplifiers.
The amplifier system can be switched in three operating
modes with pin MODE:
•Standby mode; with a very low supply current
•Mute mode; the amplifiers are operational, but the audio
signal at the output is suppressed
•Operating mode; the amplifiers fully are operational with
output signal.
An example of a switching circuit for driving pin MODE is
illustrated in Fig.4.
For suppressing plop noise, the amplifier will remain
automatically in the mute mode for approximately 150 ms
before switching to the operating mode (see Fig.5).
During this time, the coupling capacitors at the input are
fully charged.
handbook, halfpage
standby/
mute
R
R
mute/on
MODE pin
SGND
MBL463
+5 V
Fig.4 Example of mode selection circuit.

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Philips Semiconductors Objective specification
2×25 W class-D power amplifier TDA8922
handbook, full pagewidth
audio
operating
mute
standby
4 V
2 V
0 V (SGND) time
Vmode
100 ms >50 ms
switching
audio
operating
standby
4 V
0 V (SGND) time
MBL465
Vmode
100 ms 50 ms
switching
Fig.5 Timing on mode selection input.
When switching from standby to mute, there is a delay of 100 ms before the output starts switching. The audio signal is available after Vmode has been
set to operating, but not earlier than 150 ms after switching to mute.
When switching from standby to operating, there is a first delay of 100 ms before the outputs starts switching. The audio signal is available after a
second delay of 50 ms.

2003 Mar 20 9
Philips Semiconductors Objective specification
2×25 W class-D power amplifier TDA8922
8.2 Pulse width modulation frequency
The output signal of the amplifier is a PWM signal with a
carrier frequency of approximately 350 kHz. Using a
2nd-order LC demodulation filter in the application results
in an analog audio signal across the loudspeaker.
This switching frequency is fixed by an external resistor
ROSC connected between pin OSC and VSSA. With the
resistor value given in the schematic diagram of the
reference design, the carrier frequency is typical 350 kHz.
The carrier frequency can be calculated using the
following equation:
If two or more class-D amplifiers are used in the same
audio application, it is advisable to have all devices
operating at the same switching frequency.
This can be realized by connecting all OSC pins together
and feed them from a external central oscillator. Using an
external oscillator it is necessary to force pin OSC to a
DC-level above SGND for switching from the internal to an
external oscillator. In this case the internal oscillator is
disabled and the PWM will be switched on the external
frequency. The frequency range of the external oscillator
must be in the range as specified in the switching
characteristics; see Chapter 13.
In an application circuit:
•Internal oscillator: ROSC connected between pin OSC
and VSSA
•Externaloscillator:connect the oscillatorsignalbetween
pins OSC and SGND; delete ROSC and COSC.
8.3 Protections
Temperature, supply voltage and short-circuit protections
sensors are included on the chip. In the event that the
maximum current or maximum temperature is exceeded
the system will shut down.
8.3.1 OVERTEMPERATURE
If the junction temperature Tj> 150 °C, then the power
stage will shut down immediately. The power stage will
start switching again if the temperature drops to
approximately 130 °C, thus there is a hysteresis of
approximately 20 °C.
8.3.2 SHORT-CIRCUIT ACROSS LOUDSPEAKER TERMINALS
AND TO SUPPLY LINES
When the loudspeaker terminals are short-circuited or if
one of the demodulated outputs of the amplifier is
short-circuited to one of the supply lines, this will be
detected by the current protection. If the output current
exceeds the maximum output current of 4 A, then the
power stage will shut down within less than 1 µs and the
high current will be switched off. In this state the
dissipation is very low. Every 100 ms the system tries to
restart again. If there is still a short-circuit across the
loudspeaker load or to one of the supply lines, the system
is switched off again as soon as the maximum current is
exceeded. The average dissipation will be low because of
this low duty cycle.
8.3.3 START-UP SAFETY TEST
Duringthestart-upsequence,when pin MODE isswitched
from standby to mute, the conditions at the output
terminals of the power stage are checked. In the event of
a short-circuit at one of the output terminals to VDD or VSS
thestart-upprocedureisinterruptedandthesystemswaits
for open-circuit outputs. Because the test is done before
enablingthepowerstages,nolargecurrentswill flow inthe
event of a short-circuit. This system protects for
short-circuitsatboth sides oftheoutputfilter to bothsupply
lines. When there is a short-circuit from the power PWM
outputof thepower stageto one of the supply lines (before
the demodulation filter) it will also be detected by the
start-upsafety test.Practical useof thistest featurecan be
found in detection of short-circuits on the printed-circuit
board.
Remark: This test is only operational prior to or during the
start-up sequence, and not during normal operation.
During normal operation the maximum current protection
is used to detect short-circuits across the load and with
respect to the supply lines.
fosc 910
9
×
R
OSC
------------------- Hz=

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Philips Semiconductors Objective specification
2×25 W class-D power amplifier TDA8922
8.3.4 SUPPLY VOLTAGE ALARM
If the supply voltage drops below ±12.5 V, the
undervoltage protection circuit is activated and the system
will shut down correctly. If the internal clock is used, this
switch-off will be silent and without plop noise. When the
supply voltage rises above the threshold level, the system
is restarted again after 100 ms. If the supply voltage
exceeds ±32 V the overvoltage protection circuit is
activated and the power stages will shut down. They are
re-enabled as soon as the supply voltage drops below the
threshold level.
An additional balance protection circuit compares the
positive (VDD) and the negative (VSS) supply voltages and
is triggered if the voltage difference between them
exceeds a certain level. This level depends on the sum of
both supply voltages. An expression for the unbalanced
threshold level is as follows: Vth(unb) ≈0.15 ×(VDD +V
SS).
Example: With a symmetrical supply of ±30 V, the
protectioncircuit willbetriggered ifthe unbalanceexceeds
approximately 9 V; see Section 16.7.
8.4 Differential audio inputs
For a high common mode rejection ratio and a maximum
of flexibility in the application, the audio inputs are fully
differential. By connecting the inputs anti-parallel the
phase of one of the channels can be inverted, so that a
load can be connected between the two output filters.
In this case the system operates as a mono BTL amplifier
and with the same loudspeaker impedance an
approximately four times higher output power can be
obtained.
The input configuration for a mono BTL application is
illustrated in Fig.6; for more information see Chapter 16.
In the stereo single-ended configuration it is also
recommended to connect the two differential inputs in
anti-phase. This has advantages for the current handling
of the power supply at low signal frequencies.
handbook, full pagewidth
Vin
IN1+OUT1
power stage
MBL466
OUT2
SGND
IN1−
IN2+
IN2−
Fig.6 Input configuration for mono BTL application.

2003 Mar 20 11
Philips Semiconductors Objective specification
2×25 W class-D power amplifier TDA8922
9 LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
Notes
1. See Section 16.6.
10 THERMAL CHARACTERISTICS
Note
1. See Section 16.5.
11 QUALITY SPECIFICATION
In accordance with “General Quality Specification for Integrated Circuits: SNW-FQ-611D” if this device is used as an
audio amplifier.
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VPsupply voltage −±30 V
VMODE input voltage on pin MODE with respect to SGND −5.5 V
Vsc short-circuit voltage on output pins −±30 V
IORM repetitive peak current in output pin note 1 −4A
T
stg storage temperature −55 +150 °C
Tamb ambient temperature −40 +85 °C
Tvj virtual junction temperature −150 °C
SYMBOL PARAMETER CONDITIONS VALUE UNIT
Rth(j-a) thermal resistance from junction to ambient in free air; note 1
TDA8922TH 35 K/W
TDA8922J 35 K/W
Rth(j-c) thermal resistance from junction to case note 1
TDA8922TH 1.3 K/W
TDA8922J 1.3 K/W

2003 Mar 20 12
Philips Semiconductors Objective specification
2×25 W class-D power amplifier TDA8922
12 STATIC CHARACTERISTICS
VP=±25 V; Tamb =25°C; measured in Fig.10; unless otherwise specified.
Notes
1. The circuit is DC adjusted at VP=±12.5 to ±30 V.
2. With respect to SGND (0 V).
3. The transition regions between standby, mute and operating mode contain hysteresis (see Fig.7).
4. With respect to VSSP1.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply
VPsupply voltage note 1 ±12.5 ±20 ±30 V
Iq(tot) total quiescent supply current no load connected −55 75 mA
Istb standby supply current −100 500 µA
Mode select input; pin MODE
VMODE input voltage note 2 0 −5.5 V
IMODE input current VMODE = 5.5 V −−1000 µA
Vstb input voltage for standby mode notes 2 and 3 0 −0.8 V
Vmute input voltage for mute mode notes 2 and 3 2.2 −3.0 V
Von input voltage for operating mode notes 2 and 3 4.2 −5.5 V
Audio inputs; pins IN1−, IN1+, IN2+ and IN2−
VIDC input voltage note 2 −0−V
Amplifier outputs; pins OUT1 and OUT2
VOO(SE)output offset voltage SE; operating and mute −−150 mV
∆VOO(SE)variation of output offset voltage SE; operating ↔mute −−80 mV
VOO(BTL)output offset voltage BTL; operating and mute −−215 mV
∆VOO(BTL)variation of output offset voltage BTL; operating ↔mute −−115 mV
Stabilizer output; pin STABI
Vo(stab) stabilizer output voltage mute and operating; note 4 11 13 15 V
Temperature protection
Tprot temperature protection activation 150 −−°C
T
hys hysteresis on temperature
protection −20 −°C

2003 Mar 20 13
Philips Semiconductors Objective specification
2×25 W class-D power amplifier TDA8922
handbook, full pagewidth
STBY MUTE ON
5.5
MBL467
VMODE (V)
4.23.02.20.80
Fig.7 Behaviour of mode selection pin MODE.
13 SWITCHING CHARACTERISTICS
VDD =±25 V; Tamb =25°C; measured in Fig.10; unless otherwise specified.
Note
1. Frequency set with ROSC according to the formula in Section 8.2.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Internal oscillator
fosc typical internal oscillator
frequency ROSC = 30.0 kΩ290 317 344 kHz
fosc(int) internal oscillator
frequency range note 1 210 −600 kHz
External oscillator or frequency tracking
VOSC voltage on pin OSC SGND + 4.5 SGND + 5 SGND + 6 V
VOSC(trip) trip level for tracking on
pin OSC −SGND + 2.5 −V
ftrack frequency range for
tracking 210 −600 kHz
VP(OSC)(ext) minimum symmetrical
supply voltage for external
oscillator application
15 −−V

2003 Mar 20 14
Philips Semiconductors Objective specification
2×25 W class-D power amplifier TDA8922
14 DYNAMIC AC CHARACTERISTICS (STEREO AND DUAL SE APPLICATION)
VP=±20 V; RL=8Ω; fi= 1 kHz; fosc = 310 kHz; RsL < 0.1 Ω(note 1); Tamb =25°C; measured in Fig.10; unless
otherwise specified.
Notes
1. RsL is the series resistance of inductor of low-pass LC filter in the application.
2. Output power is measured indirectly; based on RDSon measurement.
3. Total harmonic distortion is measured in a bandwidth of 22 Hz to 22 kHz. When distortion is measured using a lower
order low-pass filter a significantly higher value is found, due to the switching frequency outside the audio band.
Maximum limit is guaranteed but may not be 100% tested.
4. Output power measured across the loudspeaker load.
5. Vripple =V
ripple(max) = 2 V (p-p); Rs=0Ω.
6. B = 22 Hz to 22 kHz; Rs=0Ω; maximum limit is guaranteed, but may not be 100% tested.
7. B = 22 Hz to 22 kHz; Rs=10kΩ.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Pooutput power RL=8Ω; VP=±20 V; note 2
THD = 0.5% 18 20 −W
THD = 10% 22 25 −W
RL=8Ω; VP=±25 V; note 2
THD = 0.5% 29 33 −W
THD = 10% 36 40 −W
RL=4Ω; VP=±15 V; note 2
THD = 0.5% 18 20 −W
THD = 10% 22 25 −W
THD total harmonic distortion Po= 1 W; note 3
fi= 1 kHz −0.02 0.05 %
fi= 10 kHz −0.15 −%
Gv(cl) closed loop voltage gain 29 30 31 dB
ηefficiency Po= 25 W; fi= 1 kHz; note 4 85 90 −%
SVRR supply voltage ripple rejection operating; note 5
fi= 100 Hz −55 −dB
fi= 1 kHz 40 50 −dB
mute; fi= 100 Hz; note 5 −55 −dB
standby; fi= 100 Hz; note 5 −80 −dB
Ziinput impedance 45 68 −kΩ
Vn(o) noise output voltage operating
Rs=0Ω; note 6 −200 400 µV
Rs=10kΩ; note 7 −230 −µV
mute; note 8 −220 −µV
α
cs channel separation note 9 −70 −dB
∆Gvchannel unbalance −−1dB
V
o(mute) output signal in mute note 10 −−400 µV
CMRR common mode rejection ratio Vi(CM) = 1 V (RMS) −75 −dB

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Philips Semiconductors Objective specification
2×25 W class-D power amplifier TDA8922
8. B = 22 Hz to 22 kHz; independent of Rs.
9. Po= 1 W; Rs=0Ω; fi= 1 kHz.
10. Vi=V
i(max) = 1 V (RMS); maximum limit is guaranteed, but may not be 100% tested.
15 DYNAMIC AC CHARACTERISTICS (MONO BTL APPLICATION)
VP=±15 V; RL=8Ω; fi= 1 kHz; fosc = 310 kHz; RsL < 0.1 Ω(note 1); Tamb =25°C; measured in Fig.10; unless
otherwise specified.
Notes
1. RsL is the series resistance of inductor of low-pass LC filter in the application.
2. Output power is measured indirectly; based on RDSon measurement.
3. Total harmonic distortion is measured in a bandwidth of 22 Hz to 22 kHz. When distortion is measured using a low
order low-pass filter a significant higher value will be found, due to the switching frequency outside the audio band.
Maximum limit is guaranteed but may not be 100% tested.
4. Output power measured across the loudspeaker load.
5. Vripple =V
ripple(max) = 2 V (p-p); Rs=0Ω.
6. B = 22 Hz to 22 kHz; Rs=0Ω; maximum limit is guaranteed, but may not be 100% tested.
7. B = 22 Hz to 22 kHz; Rs=10kΩ.
8. B = 22 Hz to 22 kHz; independent of Rs.
9. Vi=V
i(max) = 1 V (RMS); fi= 1 kHz; maximum limit is guaranteed, but may not be 100% tested.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Pooutput power RL=8Ω; VP=±15 V; note 2
THD = 0.5% 37 40 −W
THD = 10% 46 50 −W
THD total harmonic distortion Po= 1 W; note 3
fi= 1 kHz −0.015 0.05 %
fi= 10 kHz −0.02 −%
Gv(cl) closed loop voltage gain 35 36 37 dB
ηefficiency Po= 50 W; fi= 1 kHz; note 4 85 90 −%
SVRR supply voltage ripple rejection operating; note 5
fi= 100 Hz −49 −dB
fi= 1 kHz 36 44 −dB
mute; fi= 100 Hz; note 5 −49 −dB
standby; fi= 100 Hz; note 5 −80 −dB
Ziinput impedance 22 34 −kΩ
Vn(o) noise output voltage operating
Rs=0Ω; note 6 −280 560 µV
Rs=10kΩ; note 7 −300 −µV
mute; note 8 −280 −µV
V
o(mute) output signal in mute note 9 −−500 µV
CMRR common mode rejection ratio Vi(CM) = 1 V (RMS) −75 −dB

2003 Mar 20 16
Philips Semiconductors Objective specification
2×25 W class-D power amplifier TDA8922
16 APPLICATION INFORMATION
16.1 BTL application
When using the power amplifier in a mono BTL application
(for more output power), the inputs of both channels must
be connected in parallel and the phase of one of the inputs
must be inverted (see Fig.6). In principle the loudspeaker
can be connected between the outputs of the two
single-ended demodulation filters.
16.2 Pin MODE
For correct operation the switching voltage at pin MODE
should be debounced. If pin MODE is driven by a
mechanical switch an appropriate debouncing low-pass
filter should be used. If pin MODE is driven by an
electroniccircuit or microcontroller then itshould remainat
the mute voltage level for at least 100 ms before switching
back to the standby voltage level.
16.3 Output power estimation
The output power in several applications (SE and BTL)
can be estimated using the following expressions:
SE:
Maximum current:
should not exceed 4 A.
BTL:
Maximum current:
should not exceed 4 A.
Legend:
RL= load impedance
fosc = oscillator frequency
tmin = minimum pulse width (typical 190 ns)
VP= single-sided supply voltage (so, if supply is ±30 V
symmetrical, then VP=30V)
P
o(1%) = output power just at clipping
Po(10%) = output power at THD = 10%
Po(10%) = 1.25 ×Po(1%).
16.4 External clock
The minimum required symmetrical supply voltage for
external clock application is ±15 V (equally, the minimum
asymmetrical supply voltage for applications with an
external clock is 30 V).
Whenusing anexternal clockthe following accuracyof the
duty cycle of the external clock has to be taken into
account: 47.5% < δ< 52.5%.
A possible solution for an external clock oscillator circuit is
illustrated in Fig.8.
Po(1%)
RL
RL0.6+
--------------------- VP1t
min fosc
×–()×× 2
2R
L
×
------------------------------------------------------------------------------------------
=
Io(peak) VP1t
min fosc
×–()×
R
L
0.6+
-----------------------------------------------------
=
Po(1%)
RL
RL1.2+
--------------------- 2VP1t
min fosc
×–()×× 2
2R
L
×
---------------------------------------------------------------------------------------------
=
Io(peak) 2VP1t
min fosc
×–()×
R
L
1.2+
---------------------------------------------------------
=
handbook, full pagewidth
114
7
2
11
13
10 4 5 6
8912
3
CTC
0−0+ASTAB−ASTAB+ −TRIGGER
+TRIGGER RETRIGGERMR
220
nF 5.6 V
4.3 V
HOP
GND
MBL468
HEF4047BT
VDD
360 kHz 320 kHz
VDDA
VSS
9.1 kΩ
2 kΩ
120 pF RTC
CLOCK
RCTC
Fig.8 External oscillator circuit.

2003 Mar 20 17
Philips Semiconductors Objective specification
2×25 W class-D power amplifier TDA8922
16.5 Heatsink requirements
In some applications it may be necessary to connect an
external heatsink to the TDA8922. The determining factor
is the 150 °C maximum junction temperature Tj(max) which
cannot be exceeded. The expression below shows the
relationship between the maximum allowable power
dissipation and the total thermal resistance from junction
to ambient:
Pdiss is determined by the efficiency (η) of the TDA8922.
The efficiency measured in the TDA8922 as a function of
output power is given in Fig.19. The power dissipation can
be derived as function of output power (see Fig.18).
Thederatingcurves (givenforseveral values oftheRth(j-a))
are illustrated in Fig.9. A maximum junction temperature
Tj= 150 °Cistakenintoaccount.FromFig.9 themaximum
allowable power dissipation for a given heatsink size can
bederivedortherequired heatsinksizecanbedetermined
at a required dissipation level.
Example 1:
Po=2×25 W into 8 Ω
Tj(max) = 150 °C
Tamb =60°C
P
diss(tot) = 4.2 W (from Fig.18)
The required Rth(j-a) = 21.4 K/W can be calculated.
The Rth(j-a) of the TDA8922 in free air is 35 K/W; the Rth(j-c)
of the TDA8922 is 1.3 K/W, thus a heatsink of 20.1 K/W is
required for this example.
In actual applications, other factors such as the average
power dissipation with music source (as opposed to a
continuous sine wave) will determine the size of the
heatsink required.
Example 2:
Po=2×25 W into 4 Ω
Tj(max) = 150 °C
Tamb =60°C
P
diss(tot) = 5.5 W (from Fig.18)
The required Rth(j-a) = 16.4 K/W.
The Rth(j-a) of the TDA8922 in free air is 35 K/W; the Rth(j-c)
of the TDA8922 is 1.3 K/W, thus a heatsink of 15.1 K/W is
required for this example.
16.6 Output current limiting
To guarantee the robustness of the class-D amplifier the
maximum output current which can be delivered by the
output stage is limited. An overcurrent protection is
included for each output power switch. When the current
flowing through any of the power switches exceeds a
defined internal threshold (e.g. in case of a short-circuit to
the supply lines or a short-circuit across the load), the
amplifier will shut down immediately and an internal timer
willbe started. Aftera fixedtime(e.g. 100 ms)theamplifier
is switched on again. If the requested output current is still
too high the amplifier will switch-off again. Thus the
amplifier will try to switch to the operating mode every
100 ms. The average dissipation will be low in this
situation because of this low duty cycle. If the overcurrent
condition is removed the amplifier will remain operating.
Becausethe dutycycle islow theamplifier willbe switched
off for a relatively long period of time which will be noticed
as a so-called audio-hole; an audible interruption in the
output signal.
Rth(j-a) Tj(max) Tamb
–
Pdiss
-----------------------------------
=
handbook, halfpage
0
Pdiss
(W)
30
20
10
020 100
Tamb (°C)
40
(1)
(2)
(3)
(4)
(5)
60 80
MBL469
Fig.9 Derating curves for power dissipation as a
function of maximum ambient temperature.
(1) Rth(j-a) = 5 K/W.
(2) Rth(j-a) = 10 K/W.
(3) Rth(j-a) = 15 K/W.
(4) Rth(j-a) = 20 K/W.
(5) Rth(j-a) = 35 K/W.

2003 Mar 20 18
Philips Semiconductors Objective specification
2×25 W class-D power amplifier TDA8922
To trigger the maximum current protection in the
TDA8922, the required output current must exceed 4 A.
This situation occurs in case of:
•Short-circuits from any output terminal to the supply
lines (VDD or VSS)
•Short-circuit across the load or speaker impedances or
a load impedance below the specified values of
4and8Ω.
Even if load impedances are connected to the amplifier
outputs which have an impedance rating of 4 Ω, this
impedance can be lower due to the frequency
characteristic of the loudspeaker; practical loudspeaker
impedances can be modelled as an RLC network which
will have a specific frequency characteristic: the
impedance at the output of the amplifier will vary with the
input frequency. A high supply voltage in combination with
a low impedance will result in large current requirements.
Another factor which must be taken into account is the
ripplecurrent which willalso flow through the outputpower
switches. This ripple current depends on the inductor
values which are used, supply voltage, oscillator
frequency, duty factor and minimum pulse width. The
maximum available output current to drive the load
impedance can be calculated by subtracting the ripple
current from the maximum repetitive peak current in the
output pin, which is 4 A for the TDA8922.
As a rule of thumb the following expressions can be used
to determine the minimum allowed load impedance
without generating audio holes:
for SE application.
for BTL application.
Where:
ZL= load impedance
fosc = oscillator frequency
tmin = minimum pulse width (typical 190 ns)
VP= single-sided supply voltage
(so, if the supply is ±30 V symmetrical, then VP=30V)
I
ORM = maximum repetitive peak current in output pin;
see also Chapter 9
Iripple = ripple current.
See the application notes (tbf) for a more detailed
description of the implications of output current limiting.
16.7 Pumping effects
The TDA8922 class-D amplifier is supplied by a
symmetrical voltage (e.g VDD = +25 V and VSS =−25 V).
When the amplifier is used in a SE configuration, a
so-called ‘pumping effect’ can occur. During one switching
interval, energy is taken from one supply (e.g. VDD), while
a part of that energy is delivered back to the other supply
line (e.g. VSS) and visa versa. When the voltage supply
source cannot sink energy, the voltage across the output
capacitors of that voltage supply source will increase:
the supply voltage is pumped to higher levels. The voltage
increase caused by the pumping effect depends on:
•Speaker impedance
•Supply voltage
•Audio signal frequency
•Capacitor value present on supply lines
•Source and sink currents of other channels.
The pumping effect should not cause a malfunction of
eithertheaudio amplifier and/orthevoltagesupply source.
For instance, this malfunction can be caused by triggering
oftheundervoltageorovervoltage protection orunbalance
protection of the amplifier.
See the application notes (tbf) for a more detailed
description of the implications of output current limiting.
16.8 Reference design
The reference design for a single-chip class-D audio
amplifier using the TDA8922TH is illustrated in Fig.10.
The Printed-CircuitBoard (PCB)layout is shown in Fig.11.
The Bill Of Materials (BOM) is given in Table 1.
16.9 PCB information for HSOP24 package
The size of the PCB is 74.3 ×59.10 mm, dual sided 35 µm
copper with 121 metallized through holes.
The standard configuration has a symmetrical supply
(typical ±20 V) with stereo SE outputs (typical 2 ×8Ω).
The PCB is also suitable for a mono BTL configuration
(1 ×8Ω) with symmetrical and asymmetrical supply.
It is possible to use several different output filter inductors
such as 16RHBP or EP13 types to evaluate the
performance against the price or size.
16.10 Classification
The application shows optimized signal and EMI
performance.
ZLVP1t
min fosc
×–()×
I
ORM Iripple
–
----------------------------------------------------- 0.6–≥
ZL2VP1t
min fosc
×–()×
I
ORM Iripple
–
--------------------------------------------------------- 1.2–≥

2003 Mar 20 19 Philips Semiconductors Objective specification
2×25 W class-D power amplifier TDA8922
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a
gewidth
MGU997
TDA8922TH
C20
330 pF
C10
100 nF C12 100 nF
C11
220 nF
C9
220 nF
C8
220 nF
on
mute
off
R5
30 kΩ
C17
470 nF
R7
5.6 kΩ
C16
470 nF
R6
5.6 kΩ
J4(1)
J3
C21
330 pF
810 12 7 6
1 3 24 18 13 19 23 20
VDDA1 VSSA1 OSC MODE
VDDA VSSA
VSSA
9
11
2
5
15
OUT1
BOOT1
BOOT2
OUT2
16
21
22
4
IN1+
IN1−
IN2+
IN2−
SGND1
SGND
C13
100 nF C14 220 nF C15 100 nF
14 17
VDDP1 VSSP1
VDDP
VDDA
VSSP
R4 39 kΩ
R3
39 kΩ
Z1
5.6 V
S1
C34
100 nF C35
220 nF C36
100 nF
C32
220 nF C33
47 pF
VSSA2 VDDA2 VSSD STABI PROT HW
VSSA VDDA VSSP
C37
100 nF C38
220 nF C39
100 nF
C22
15 nF
C23
15 nF
C30
15 nF
C31
15 nF
C26
470 nF
C27
470 nF
R10
4.7 Ω
C24
560 pF
R11
4.7 Ω
C25
560 pF
R12
22 Ω
R13
22 Ω
C28
220 nF
C29
220 nF
L5
27 µH
L6
27 µH
VDDP2 VSSP2
VDDP
SGND
SE 4 Ω
SE 4 Ω
OUT1−
OUT1+
OUT2−
OUT2+
VSSP
SGND2
J2(4)
J1
in 1
in 2
C18
470 nF
R8
5.6 kΩ
C19
470 nF
R9
5.6 kΩ
(2) BTL 8 Ω
L1
BEAD
L2
BEAD
C1
470 µFC3
47 µF
C2
470 µF
C6
100 nF
C7
100 nF
VDDP
VSSP
R1(3)
10 kΩ
R2(3)
9.1 kΩ
VDDA
VSSA
C4
47 µF
C5
47 µF
GND
VSS
VDD
L3
BEAD
L4
BEAD
+25 V
−25 V
SGND
Fig.10 Single-chip class-D audio amplifier application diagram (reference design for SE and BTL).
(1) BTL: remove In2, R8, R9, C18, C19, C21 and close J3 and J4.
(2) BTL: connect loudspeaker between OUT1+ and OUT2−.
(3) BTL: R1 and R2 are only required when an asymmetrical supply is used (VSS = 0 V).
(4) In case of hum, close J1 and J2.
Every decoupling to ground (plane) must be made as close as possible to the pin.
To handle 20 Hz under all conditions in stereo SE mode, the external power supply
needs to have a capacitance of at least 4700 µF per supply line; VP=±27 V (max).

2003 Mar 20 20
Philips Semiconductors Objective specification
2×25 W class-D power amplifier TDA8922
handbook, full pagewidth
−Out1+VSS
In1 In2
S1
Z1
C19
C18C16C17
C26C27 C4
C1
U1
1-2002PCB version 4
J4 J3
C3 C38
C14
C33
C29
R13R12
C28
R1R2
R5
R11
R10
R6R7
R9R8
R4
R3
J1J2
C6C7
C34 C25
C24
C23
C22
C9
C12
C36 C37
C39
C15
C32
C13
C10
C31C30
C35
C21
C20
C8
C11
C2
C5
L3 L2 L4
L5
L6
L1
On
Off
TDA8920/21/22/23/24TH
state of D art
PHILIPS SEMICONDUCTORS
VDD GND
−Out2+
MBL496
Top copperTop silk screen
Bottom copperBottom silk screen
Fig.11 Printed-circuit board layout for the TDA8922TH.