Pi 2 Embedded 502V2S Quick user guide

PI2Embedded 502V2S Hardware Reference Manual – P2.1 - 6/3/2016
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Pi
Pi Pi
Pi 2
22
2 Embedded
EmbeddedEmbedded
Embedded
502V2S
HDMI to Surround Sound Shield
Hardware Reference Manual
© 2016 PI 2 Design

PI2Embedded 502V2S Hardware Reference Manual – P2.1 - 6/3/2016
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Table of Contents
1 Warranty......................................................................................................................................................................................... 3
2 Operating Specifications ................................................................................................................................................................. 4
2.1 502V2S Operating specifications............................................................................................................................................. 4
3 Overview ........................................................................................................................................................................................ 5
3.1 Introduction ............................................................................................................................................................................. 5
3.2 Block Diagram......................................................................................................................................................................... 5
4 On-Board Devices .......................................................................................................................................................................... 7
4.1 Overview ................................................................................................................................................................................. 7
4.1 502V2S I2C Bus Devices ........................................................................................................................................................ 7
4.1 ADV7623BSTZ 4-Port HDMI Transceiver................................................................................................................................ 7
4.1.1 ADV7623 HDMI Transceiver Notes.................................................................................................................................. 8
4.2 Optical S/PDIF Transmitter...................................................................................................................................................... 9
4.3 PCM5102A DAC’s................................................................................................................................................................... 9
4.3.1 PCM5102A DAC Notes.................................................................................................................................................... 9
4.4 3.5MM Stereo Output Jacks .................................................................................................................................................... 9
4.5 TSOP38238 IrDA Receiver...................................................................................................................................................... 9
4.6 24AA32T ID EEPROM ............................................................................................................................................................ 9
4.6.1 24AA32T EEPROM Notes ............................................................................................................................................. 10
5 RPi GPIO...................................................................................................................................................................................... 11
5.1 Overview ............................................................................................................................................................................... 11
5.1.1 RPi GPIO Notes............................................................................................................................................................. 12
6 502V2S Software.......................................................................................................................................................................... 14
6.1 Overview ............................................................................................................................................................................... 14
7 Top Side Connectors .................................................................................................................................................................... 15
7.1 Overview ............................................................................................................................................................................... 15
7.2 P4 – DC Jack ........................................................................................................................................................................ 15
7.1 P2 – ADV7623 HDMI Input.................................................................................................................................................... 15
7.1 P3 – ADV7623 HDMI Output ................................................................................................................................................. 15
7.2 P5, I2S Header...................................................................................................................................................................... 16
7.3 U4, IrDA Transmitter.............................................................................................................................................................. 16
7.4 J1-J4 3.5MM Stereo Jacks .................................................................................................................................................... 16
8 Bottom Side Connectors ............................................................................................................................................................... 18
8.1 Overview ............................................................................................................................................................................... 18
8.2 P1 – 40-Pin GPIO Header ..................................................................................................................................................... 18
9 Document Revisions..................................................................................................................................................................... 19
10 Errata.......................................................................................................................................................................................... 20
10.1 Overview ............................................................................................................................................................................. 20
List of Tables
Table 1 – 502V2S Operating Specifications....................................................................................................................................... 4
Table 2 – 502V2S I2C Bus Devices................................................................................................................................................... 7
Table 3 – RPi to ADV7623 Connections ............................................................................................................................................ 8
Table 4 – ADV7623 to 3.5mm Jack Connections ............................................................................................................................... 9
Table 5 – RPi to 24AA32T EEPROM Connections .......................................................................................................................... 10
Table 6 – CPU GPIO Pin Assignments............................................................................................................................................ 12
Table 7 – ADV7623 I2S Output Connector Pinout and Assignment ................................................................................................. 16
Table 8 – 3.5mm Jack Connections................................................................................................................................................. 17
Table 9 – Document Revisions ........................................................................................................................................................ 19
Table 9 – Currently Known Errata.................................................................................................................................................... 20
List of Figures
Figure 1 – 502V2S Block Diagram..................................................................................................................................................... 6
Figure 2 – 502V2S Top Side Connector Designators....................................................................................................................... 15
Figure 3 – 502V2S Bottom Side Connector Designators.................................................................................................................. 18

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1
11
1WARRANTY
WARRANTYWARRANTY
WARRANTY
The enclosed product ("the Product"), a part of the PI2MEDIA Shield/Hat series, is
warranted by Pi 2 Design for a period of one year for reasonable development, testing
and use, all as further described and defined below. This warranty runs solely to the
individual or entity purchasing the Product and is not transferable or assignable in any
respect. This warranty is valid only for so long as the product is used intact as shipped
from PI 2 Design. Any attempt or effort to alter the Product, including but not limited to
any attempt to solder, de-solder, unplug, replace, add or affix any part or component of
or onto the Product, other than components specifically intended for the user to plug
and unplug into appropriate sockets and/or Connectors to facilitate user programming,
development and deployment, all as specifically described and authorized in this
Product Hardware Reference Manual, shall void this warranty in all respects. Coverage
under this warranty requires that the Product be used and stored at all times in
conditions with proper electrostatic protection necessary and appropriate for a complex
electronic device. These conditions include proper temperature, humidity, radiation,
atmosphere and voltage (standard commercial environment, 0C to +70C, <60%RH).
Any Product that has been modified without the express, prior written consent of Pi 2
Design is not covered by this warranty. The use or connection of any test or bus
Connector, adapter or component with any device other than a Pi 2 Design Connector
or adapter shall void this warranty and the warranty of all other components, parts and
modules connected to the rest of the system. Pi 2 Design shall not be responsible for
any damage to the Product as a result of a customer's use or application of circuitry not
developed or approved by Pi 2 Design for use on or in connection with the Product.
This warranty does not cover defects caused by electrical or temperature fluctuations or
from stress resulting from or caused by abuse, misuse or misapplication of the Product.
Any evidence of tampering with the serial number on the Product shall immediately void
this warranty. This Product is not intended to be used on or embedded in or otherwise
used in connection with any life-sustaining or life-saving product and this warranty is not
applicable nor is Pi 2 Design liable in any respect if the Product is so used.
Notwithstanding anything to the contrary herein, Pi 2 Design expressly disclaims any
implied warranty of merchantability or implied warranty of fitness for a particular purpose
in connection with the manufacture or use of the Product.

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22
2OPERATING
OPERATING OPERATING
OPERATING S
SS
SPECIFICATIONS
PECIFICATIONSPECIFICATIONS
PECIFICATIONS
2.1 502V2S OPERATING SPECIFICATIONS
The 502V2S conforms to the following specifications:
Specification
Value
Dimensions 85mm x 56mm – Full Size Shield
Weight ~10g3
Storage Temperature -20C to +85C
Operating Temperature 0C to +70C
Humidity 0% to 95% RH, Non-Condensing
Input Voltage (VIN) +8V to +24V, Nominal +12V, 500ma Peak
Power Consumption 1W Typical, 2W Maximum
Table 1 – 502V2S Operating Specifications

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33
3OVERVIEW
OVERVIEWOVERVIEW
OVERVIEW
3.1 INTRODUCTION
Designed and manufactured by PI 2 Design, the PI2MEDIA 502V2S is a professional
I/O Shield designed for the low cost Raspberry PI ® (RPi) Single Board Computer
family. This shield extracts the 192Khz 7.1 surround sound audio data stream from the
RPi HDMI output, while passing the original HDMI and audio to your Hi-Definition
monitor or TV.
Using the high performance Raspberry Pi ® 3 with Quad Core Cortex-A53 64-Bit CPU,
the 502V2S creates a low cost, ultra-high performance 7.1 Surround Sound Media
Center. Add the PI2EMBEDDED 502SSD shield with up to 1TB SSD for the ultimate
low-power, compact Media Serving Platform.
The major features of the 502V2S are as follows:
FORM FACTOR – Full Size RPi I/O Shield with 40-Pin mating connector compatible with
Raspberry Pi A+, B+, Pi 2 or Pi 3, even Pi-Zero!
DIGITAL PASS THROUGH –24-bit, 48Khz to 192Khz 5.1 Compressed Digital Stream (Dolby
Digital AC3 and DTS 5.1) or Uncompressed Stereo over a TX179 TOSLINK Optical Jack.
ANALOG AUDIO OUT –24-Bit, 48Khz - 192Khz Analog Audio Out using Four 112db THD
PCM5102A DACs via 3.5mm Jack. Each DAC has its own ultra-low noise power supply.
I2S EXPANSION – 10-Pin Header routes the I2S Bus for downstream DAC’s.
INFRARED REMOTE –A TSOP38238 IR Receiver is provided for remote control.
25W PSU – Wide-Input 5V@5A on-board supply powers all peripherals and the RPi.
3.2 BLOCK DIAGRAM
Refer to the following figure for a block diagram of the 502V2S SOM.

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40-Pin Expansion Header
Extended Height 40-Pin Socket
10-PIN
HEADER
Figure 1 – 502V2S Block Diagram

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44
4ON
ONON
ON-
--
-BOARD DEVICES
BOARD DEVICESBOARD DEVICES
BOARD DEVICES
4.1 OVERVIEW
The 502V2S interfaces to the RPi via the 40-Pin GPIO Connector as well as RPi HDMI
Output port (using a Slim HDMI to HDMI cable). This section describes in detail the
devices located on the 502V2S.
4.1 502V2S I2C BUS DEVICES
The following table describes the CPU I2C Bus usage of the 502V2S. Most of these
addresses are set by the startup script supplied by Pi2Design. Refer to the respective
device documentation for more detail.
I2C
Bus
7
-
Bit I2C
Address
Description
I2C 0x58 ADV7623 IO Remap Address
I2C 0x5B ADV7623 Main Remap Address
I2C 0x24 ADV7623 OSD Map Address
I2C 0x38 ADV7623 TX Packet Map Address
I2C 0x3F ADV7623 TX EDID Map Address
I2C 0x40 ADV7623 CEC Map Address
I2C 0x3E ADV7623 HDMI RX Info-frame Map Address
I2C 0x26 ADV7623 DPLL Map Address
I2C 0x32 ADV7623 HDMI RX Repeater Map Address
I2C 0x36 ADV7623 HDMI RX EDID Map Address
I2C 0x34 ADV7623 HDMI RX Map Address
I2C 0x22 ADV7623 HDMI CP Map Address
ID_I2C 0x24 32Kbit EEPROM for ID usage
Table 2 – 502V2S I2C Bus Devices
4.1 ADV7623BSTZ 4-PORT HDMI TRANSCEIVER
At the core of the 502V2S is the Analog Devices ADV7623 HDMI Transceiver. This
device has four input ports (only one is used), one HDMI output port, and an 8-Channel

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I2S Bus for 7.1 Surround Sound. An S/PDIF output port is also included for un-encoded
Stereo or 5.1 DTS Encoded Digital Audio Pass-through. Control of the ADV7623 is via
the I2C bus. The ADV7623 occupies several I2C address blocks as defined in Section
4.1. The signals used to interface with the PCA9554 are shown in the following table.
ADV7623
Signal
RPi
Signal
Description
SCL SCL I2C Bus Clock
SDA SDA I2C Bus Data
*RST GPIO21 ADV7623 Reset, Low True
*INT GPIO26 ADV7623 Interrupt, Low True
HDMI IN A HDMI Out Via P3 and HDMI Male-Male Cable
HDMI IN B-D - Unused Input Ports
HDMI OUT - HDMI Out via P2
AP0 OUT - S/PDIF Stereo or 5.2 DTS Digital Audio
AP1 OUT - I2S Bus Channels 0/1
AP2 OUT - I2S Bus Channels 2/3
AP3 OUT - I2S Bus Channels 4/5
AP4 OUT - I2S Bus Channels 6/7
AP5 OUT - I2S Bus Left/Right Clock
SCLK OUT - I2S Bus Bit Clock
MCLK OUT - I2S Bus Master Clock
Table 3 – RPi to ADV7623 Connections
4.1.1 ADV7623 HDMI TRANSCEIVER NOTES
1. The ADV7623 is controlled using the I2C port. The IO Map Address
(0x58) and the Main Map Address (0x5C). Software then must program
the address for the programmable register maps to the values shown in
Table 2 – 502V2S I2C Bus Devices. These values are what the default
driver code sets.
2. The ADV7623 Input Ports A-D are not used and should be disabled in
software.
3. Software must program the APx pins to match the I2S mapping as shown
in Table 3 – RPi to ADV7623 Connections

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4. An M25P32 SPI EEPROM is attached to the ADV7623 SPI port. It can be
used to store EDID information as well as setup data for the ADV7623.
Refer to the ADV7623 documentation for more information. This device is
not currently used.
4.2 OPTICAL S/PDIF TRANSMITTER
A TOTX179P is connected to AP0 of the ADV7623. This device transmits the S/PDIF
data from AP0 to an optical link.
4.3 PCM5102A DAC’S
Four TI PCM5102A DAC’s are used to convert the digital audio data from the ADV7623
to Line Level (2.1Vrms) analog outputs suitable for standard stereo inputs.
4.3.1 PCM5102A DAC NOTES
1. Each DAC has three hardware controlled signals. These are Mute, Filter and
De-Emphasis. These are controlled by the Raspberry Pi using GPIO5, GPIO6
and GPIO13 respectively.
4.4 3.5MM STEREO OUTPUT JACKS
Four 3.5MM Stereo Jacks carry the 8-Channel Surround sound audio from the
PCM5102A DAC’s. They are assigned as follows:
ADV7623
Port
3.5mm
Jack
Description
AP1 J1 Left = Front Left, Right = Front Right
AP2 J3 Left = Center, Right = Subwoofer/LFE
AP3 J2 Left = Rear Left, Right = Rear Right
AP4 J4 Left = Side Left, Right = Side Right
Table 4 – ADV7623 to 3.5mm Jack Connections
4.5 TSOP38238 IRDA RECEIVER
A TSOP3828 is connected to Raspberry Pi GPIO18 to allow for external Infrared remote
control.
4.6 24AA32T ID EEPROM
A Microchip 24AA32T EEPROM provides user programmable EEPROM. It is on the

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RPi ID I2C Bus at I2C address 0x50. The signals used to interface with the 24AA32T
are shown in the following table.
24AA
32
T
Signal
CPU
Signal
Description
SCL ID_SCL I2C Bus Clock
SDA ID_SDA I2C Bus Data
Table 5 – RPi to 24AA32T EEPROM Connections
4.6.1 24AA32T EEPROM NOTES
1. By default the ID EEPROM delivered with the 502V2S is blank.

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5
55
5RPI
RPI RPI
RPI GPIO
GPIOGPIO
GPIO
5.1 OVERVIEW
The 502V2S uses a number of signals from the RPi GPIO header for control and status
purposes. This usage is defined in the following table.
RPi
2
PIN
DIR
AF
PUP/
PDN
502V2S
Name
Description/Notes
1 - - - - RPi +3.3V - Unused
2 - - - +5V +5V Power to the RPi
3 I/O Y PUP I2C_SDA I2C Bus Data
4 - - - +5V +5V Power to the RPi
5 OUT Y PUP I2C_SCL I2C Bus Clock
6 - - - GND
7 OUT - - *SPI_RST GPIO4/GCLK - SPI Reset to PMOD
8 OUT Y - U_TXD GPIO14/TXD – Transmit to Grove UART
9 - - - GND
10 IN Y - U_RXD GPIO15/RXD – Receive from Grove UART
11 OUT - - *Y_LED GPIO17 – Low True Yellow Enable for
Green/Yellow LED
12 OUT Y - I2S_BCLK GPIO18/GEN1 - to PCM5102A Bit Clock
13 OUT - - *G_LED GPIO17 – Low True Green Enable for
Green/Yellow LED
14 - - - GND
15 I/O - - SPI_IO0 GPIO22/GEN3 – SPI I/O Signal to PMOD
16 - - - - GPIO23/GEN4 - Unused
17 - - - - RPi +3.3V - Unused
18 IN - PUP *SPI_INT GPIO24/GEN5 – SPI Interrupt from PMOD
19 OUT Y - SPI_MOSI GPIO10/SPI_MOSI – to PMOD
20 - - - GND

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RPi
2
PIN
DIR
AF
PUP/
PDN
502V2S
Name
Description/Notes
21 IN - - MISO GPIO9/SPI_MISO – from PMOD
22 OUT - - WI_TXEN GPIO25 – WiFi Transmit Enable
23 OUT Y - SPI_CLK GPIO11/SPI_CLK - to PMOD
24 OUT Y - *SPI_CS0 GPIO8/*SPI_CS0 - to PMOD
25 - - - GND
26 OUT Y - *SPI_CS1 GPIO1/*SPI_CS1 - to PMOD
27 I/O Y - ID_SDA ID I2C Bus Data to/from 24AA32
28 OUT Y - ID_SCL ID I2C Bus Clock to 24AA32
29 OUT - - MUTE GPIO5 - to PCM5102A Soft Mute Enable
30 - - - GND
31 OUT - - DEMP GPIO6 - to PCM5102A De-emphasis Enable
32 IN - PUP VG_PG GPIO12 - Power Supply Good
33 OUT - - FILT GPIO13 - to PCM5102A Filter Enable
34 - - - GND
35 OUT Y - I2S_LRCLK GPIO19 – to PCM5102 Left/Right Clock
36 OUT - - WI_WPS GPIO16 – WiFi WPS Enable
37 - - - - GPIO26 - Unused
38 IN - PUP *RTC_INT GPIO20 - DS1339 RTC Interrupt
39 - - - GND
40 - - - - GPIO21 - Unused
Table 6 – CPU GPIO Pin Assignments
5.1.1 RPI GPIO NOTES
1. DIR is from the point of view of the RPi.
2. Y in the Alternate Function (AF) column indicates that the use of this pin
requires the pin to be assigned to the function as defined by the RPi
specifications.
3. PUP/PDN indicates if the GPIO should have its associated Pullup (PUP)
or Pulldown (PDN) resistor enabled.

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4. An asterisk ‘*’ at the beginning of the name indicates a low true signal.

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6502V2S
502V2S502V2S
502V2S SOFTWARE
SOFTWARESOFTWARE
SOFTWARE
6.1 OVERVIEW
Due to the various resources interfaced on the 502V2S, both internal and external to the
RPi, it is necessary to initialize a large number of CPU registers and external devices
before correct operation can begin. These values and their proper sequencing are
beyond the scope of this document. See our web site at http://www.pi2design.com or
email us at [email protected] for example operating and initialization code.

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TOP SIDE CONNECTORS
TOP SIDE CONNECTORSTOP SIDE CONNECTORS
TOP SIDE CONNECTORS
7.1 OVERVIEW
This section provides the type, location and pinout for the various Connectors on the
502V2S Top Side. These are shown in the 3D rendering below.
Figure 2 – 502V2S Top Side Connector Designators
7.2 P4 – DC JACK
This jack is designed to accept a 5.5mm x 2.5mm center positive plug for power in.
7.1 P2 – ADV7623 HDMI INPUT
P2 is a standard HDMI Type A Connector. It connects the RPi HDMI Output to the
ADV7623 Input Port via standard HDMI Type-A cable.
7.1 P3 – ADV7623 HDMI OUTPUT
P2
P4
P3
P
5
J1
J3
J2
J4
U4
IR1
REAR SIDE

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P3 is a standard HDMI Type A Connector. It connects the ADV7623 HDMI Output to
the downstream HDMI device via standard HDMI Type-A cable.
7.2 P5, I2S HEADER
This Connector is a standard 10-pin .1” Dual Row Header. It carries the I2S bus from
the ADV7623 to allow connections to downstream DAC’s. The pinout and assignment
for this Connector is shown in the following table.
Pin
PMOD
SIGNAL
RPi Assignm
e
nt
1 MCLK I2S Master Clock
2 GND Ground
3 BCLK I2S Bit Clock
4 GND Ground
5 LRCLK I2S Left/Right Clock
6 GND Ground
7 SDOUT3 I2S Serial Data Channels 6 & 7
8 SDOUT2 I2S Serial Data Channels 4 & 5
9 SDOUT1 I2S Serial Data Channels 2 & 3
10 SDOUT0 I2S Serial Data Channels 0 & 1
Table 7 – ADV7623 I2S Output Connector Pinout and Assignment
7.3 U4, IRDA TRANSMITTER
This device is a standard IrDA Optical Transmitter. It carries the ADV7623 AP0 signal
which can be assigned as Stereo Left/Right or Compressed Dolby 5.1.
7.4 J1-J4 3.5MM STEREO JACKS
These are standard 3.5MM TSR style jacks. They carry the line level (~2Vrms) output
from the PCM5102A DAC’s. These Jacks are assigned to the 8-Channel Surround
Sound as follows:
3.5mm
Jack
Description
J1 Left = Front Left, Right = Front Right

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J2 Left = Rear Left, Right = Rear Right
J3 Left = Center, Right = Subwoofer/LFE
J4 Left = Side Left, Right = Side Right
Table 8 – 3.5mm Jack Connections

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88
8BOTTOM SIDE
BOTTOM SIDE BOTTOM SIDE
BOTTOM SIDE CONNECTOR
CONNECTORCONNECTOR
CONNECTORS
SS
S
8.1 OVERVIEW
This section provides the type, location and pinout for the various Connectors on the
502V2S Bottom Side. These are shown in the 3D rendering below.
Figure 3 – 502V2S Bottom Side Connector Designators
8.2 P1 – 40-PIN GPIO HEADER
This is a standard 40-Pin .1” Dual Row Female Header. It is designed to accept an RPi
single board and conforms to the standard RPi pinout.
P1

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9DOCUMENT REVISIONS
DOCUMENT REVISIONSDOCUMENT REVISIONS
DOCUMENT REVISIONS
Date Revision Change
06/03/2016 P2.1 Preliminary Release
Table 9 – Document Revisions

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1010
10 ERRATA
ERRATAERRATA
ERRATA
10.1 OVERVIEW
The following table lists the currently known errata for the 502V2S Rev. P2.
Errata # Change
1 The DC Jack, P4 was wired backwards in the revision.
To correct this, it is extended past the edge of the board
and a wire is connected to the ground tab.
2 SIDE and REAR Jack Labels are swapped on the PCB
Silkscreen. A correction paper Label is placed over
each.
Table 10 – Currently Known Errata