PICOLAS LDP-QCW 150 User manual

User Manual
LDP-QCW 150
PicoLAS GmbH
Burgstrasse 2
52146 Würselen
Phone: [phone]
Fax: [phone]
E-Mail: [e-mail]
Web: www.picolas.de
Before powering on your unit, read this manual thoroughly and make sure
you understood everything.
Please pay attention to all safety warnings.
If you have any doubt or suggestion, please do not hesitate to contact us!

2
Table of Contents
Please pay attention to all safety warnings!
Pulse current
Please pay attention to all safety warnings!
Valuable information, remark
Do not
Please pay special attention
Risk of electrical hazard

3
How to use the Manual
Remark: The LDP-QCW 150 described in this manual is a primarily baseplate cooled
laser diode driver. Improper cooling may cause an internal overtemperature shutdown.
Heat sink cooling with fans: Depending on the final application and operation regime a
sufficient airflow created by the fans through the heat sink must be possible.
Please refer to section “Cooling” for more details about the thermal power losses during
operation.
You may use a passive or an active air/water cooler.
Before powering on your unit, read this manual thoroughly and make sure you understood
everything.
Please pay attention to all safety warnings.
If you have any doubt or suggestion, please do not hesitate to contact us!

4
Overview
The LDP-QCW 150 (LDP-QCW for short) is a high power linear regulated laser diode driver.
It supports the following features:
o Supports up to 30 V compliance voltage
o Linear output driver for rectangular current pulses with ripple < 1 %
o Multiple trigger modes for external and internal triggering
o Interlock input for safety
Technical Specifications
*1: The compliance voltage strongly correlates to the pulse current and pulse duration.
Output current 1 .. 150 A
Compliance voltage 0 .. 30 V *1
Min. pulse duration < 10 µs
Max. pulse duration 1 ms
Max. repetition rate 1 kHz
Max. duty cycle 10 %
Max. rise time TBD
Current overshoot < 5 % (depending on
regulator settings)
Pulse trigger input Analog Interface: TTL
Connectivity Analog interface,
RS-232
Supply voltage 24 .. 48 V DC
Max. power dissipation TBD
Dimensions in mm 120 x 76 x 40
Weight 0.3 Kg
Operating temperature 0 to +55 °C

5
Functional Description
The driver uses a DC-DC converter to load a capacitor bank to a defined voltage. It can
provide a maximum voltage of 34 V to load the storage capacitor bank Cb.
A P-I regulator using T1 and T2 are controlling the current flow through the laser diode. These
regulators are triggered by an internal timing generator that is triggered by either an external
trigger signal or via software through the RS-232 interface.
Several security features protect the laser diode and the driver from damage. D1 protects the
laser diode from reverse currents. The switch S1 is automatically opened when an internal
failure or an interlock condition is detected.
Operation Principle of LDP-QCW Driver
Element Function
C1 Input buffer capacitor
Cb Capacitor bank
S1 Security switch
D1 Laser diode protection diode
T1, T2 Current regulation MosFET
Shunt LD current monitor

6
Current Regulator
The LDP-QCW implements a proportional integral (PI) regulator to control the current flow
through the connected load. The following diagram shows a simplified layout:
Depending on the chosen operating mode the user has the possibility to modify all relevant
parameters to a specific need. This is done through the digital interface (RS-232). See below
for more information.
PicoLAS implemented an active nonlinearity compensation of the output stage. This speeds
up the device, prevents excessive current overshoots and yields a better accuracy with high
impedance loads.
The influence of this part of the regulator can be user defined and is called FFwd.
However, the interconnection between the voltage and the current flow on the output is
calibrated during fabrication. This is used in operating mode 1. So, it is not necessary to
change this value if only these operating modes are used. If needed, it can be adjusted
between the values 0 to 7.5 by the customer.
Be careful if changes are performed with the FFwd value. The effect is high and may
cause damage to the connected load if not adjusted properly. Wrong settings are not
covered by warranty.

7
Description of available Connectors

8
Mechanical Dimension

9
Analogue Interface Specifications
The following figure shows the input and output signals of the external analogue BOB
connector.
The LDP-C BOB (Breakout board) is recommended for easy testing of the driver. It will
be replaced in the application by your machine interface.
Functional Description of BOB Connector Interface

10
Pin Description (numerical assorted)
Pin 1: Pulser OK
The state of this signal indicates weather the driver is ready (5 V) or it has an error pending
(0 V).
Pin 2: 5 V
This pin provides 5 Volts for external usage. Please note that the load should not exceed 10
mA, otherwise the voltage will drop.
Pin 3: GND
This pin is connected to ground.
Pin 4: Udiode
This signal provides near real time measurement of the laser diodes compliance voltage. The
scaling is 10 Volts per Volt measured into 1 MOhm.
Pin 5: GND
This pin is connected to ground.
Pin 6: Pulse
This signal is used in the external end external controlled trigger mode. Connect your external
trigger source to this pin. The signal amplitude should be within 3 to 6 Volts.
Pin 7: Enable
This signal is used to enable / disable the current output of the driver during operation.
It must be pulled low to reset an error condition or to re-enable the driver after Master Enable
was pulled low.
Pin 8: Master Enable
This signal is used as an interlock safety feature that disables the complete driver if set to 0 V
during operation. In order to re-enable the driver after this emergency shutdown the enable
signal must first set to 0 V.
If this feature is not required this pin can be connected to pin 2 (5 V).
Pin 9: Idiode
This signal provides near real time measurement of the laser diodes current flow. The scaling
is 200 Amperes per Volt measured into 1MOhm.
Pin 10: Isetpoint
This pin is not used in this driver.

11
The interface is a standard RS-232 interface connection. It can be used to connect the PC to
the driver.

12
How to get started
Step What to do Check
1 Unpack your device and place it in front
of you as shown on the next page.
2 Connect a load (for example your laser
diode) to the output.
3 Connect the RS-232 cable / PLB-21 See section “Controlling the LDP-
QCW via RS-232” for more
information.
4 Connect the input power supply. Make
sure that polarity is correct. The supply
voltage is 24 V .. 48 V.
Make sure that your
power supply does not
have any voltage overshoots when
switching on or off. Do not exceed
the maximum operating voltage of
52 V.
5 Switch the power supply on.
6 Set all required parameters using the
RS-232 interface. Make sure that the
capacitor voltage is set to a safe value.
See section “Controlling the LDP-
QCW via RS-232” for more
information.
7 Apply +5 V to the interlock pin of the
BOB connector. This will enable
internal power conditioner.
See section “Interface
Specifications” for more
information.
8 Apply +5 V to the Enable pin of the
BOB connector. This will enable the
output.
See section “Interface
Specifications” for more
information.
9 Monitor the current pulses using an
oscilloscope connected to the current
monitor output.
See section “Interface
Specifications” for more
information.

13
Cooling
The maximum thermal dissipation of the LDP-QCW depends on the configured pulse length,
repetition rate and capacitor bank voltage. The driver is cooled by a heat sink and two fans for
continuous high-power operation. The maximal thermal dissipation can be estimated by:
SLDLDLDcapL PdIdIVVP








1.0))((
where
L
P
Thermal dissipation loss in W
capV Capacitor voltage in V
LDV Compliance voltage of the LD in V
d Duty cycle in percent
LD
I
Laser diode current
SP Static operation losses ~ 7 W
This is only an approximation and achieved values can differ. Carefully monitor the
temperature of the driver and the heat sink for new operational conditions.
Test Load
A common method to test the driver is to connect a regular silicon rectifier diode to the driver
output. Please pay attention to the junction capacitance of the diode. Only fast recovery
diodes (or similar) have a low parasitic capacitance comparable to laser diodes. To achieve
reasonable test results, the parasitic elements of the test diode and the connection must be
very similar to a laser diode approach. Regular silicon rectifier diodes have a junction
capacitance of several microfarads and are not a suitable test load! The use of these diodes
will yield in incorrect current measurement at the pulse edges!
It is also possible to test the driver using a shortcut. This will not damage it, but result in an
incorrect measurement for the rise and fall time of the current pulse.

14
Digital Interface Specifications
The interface provides the following connections:
o RS-232 interface
o Interlock input
o Enable input
o Trigger input
The RS-232 interface gives access to all internal settings and registers. It uses a
communication speed of 115200 baud with 8 data bits, 1 stop bit and even parity. In order to
test the interface connection, the PING or init command may be used, depending on which
protocol should be used. It does not change any settings of the driver.
The interlock input signal controls the internal power conditioner as well as the pulse
output stage. It must be enabled before the enable signal. Otherwise, the driver enters an
error condition and will not produce any output current. If the interlock drops during
normal operation, the power conditioner as well as the current output is disabled and the
capacitor bank is discharged. The enable signal must be disabled before the interlock can
be re-enabled.
The storage discharge slowly. Be careful when powering off the driver as they
may still hold a high voltage. Touching them might result to an electrical shock.
The enable input controls the current regulator and the internal trigger generator. When it
is enabled, the driver will generate output pulses according to the configured settings.
The trigger input is used in the external trigger mode. When configured, it will control
the output current generation.
The trigger output signal provides a signal with the same pulse width and repetition rate
as the current output.
Power Supply
To obtain a good pulsing performance with the driver, it requires an appropriate power supply
unit (PSU). The PSU has to supply not only the power that is delivered to the laser diode but
also the power to compensate for the losses in the driver itself. The device is equipped with a
buck-boost DC-DC converter which allows it to generate a capacitor voltage that is higher
than the input voltage.

15
PC Interface
As described in the interface specifications the PC interface uses the RS-232 standard with the
connection settings of 115200 baud, 8 data bits, 1 stop bit and even parity.
In order to initialise the PicoLAS protocol, the PING command is used. To initialise the text
protocol, use the init command. The acknowledgement of this command indicates a
successful communication.
PLB-21
To use the PLB-21 to control the driver, simply connect it using the cable supplied with the
PLB-21. No further actions are required as the driver supplies all required signals
(communication and power) to the PLB-21. The menu structure is described in chapter
XXXX

16
Pulse current
The LDP-QCW is capable of generating a single rectangular shaped current pulse. The pulse
current, pulse width and repetition rate can be configured via RS-232 / PLB-21 or via the
BOB interface connector.
In the current hardware revision, the pulse current can only be set via digital interface.
Regulator Operation Modes
T the driver’s current regulator offers two different operation modes, which applies to both
pulse shape modes.
Mode 0: manual
In this operation mode all parameters can be modified.
This mode is recommended only for experienced users as any wrong setting may
lead to a significant current overshoot at the output.
Mode 1: semi-auto
In this operation mode the feed forward (FFwd) value is automatically chosen in dependence
of the current setpoint. This is recommended for normal operation as it guarantees minimal
current overshoot at the output.

17
Capacitor Voltage
The capacitor bank is charged by an internal DC-DC converter. It transforms the supply
voltage into a configurable capacitor voltage.
The power conversion is controlled by the interlock input. Setting the interlock to “1” while
the enable signal is “0” will start the capacitor loading procedure. If the enable signal is given
before the interlock, the driver will enter an error condition and no power is transferred into
the capacitors.
The capacitor voltage is controlled by the SETVCAP / svcap command. It must be set by the
operator to a value that depends on the chosen pulse width, repetition rate and compliance
voltage. If his value is too low the current will drop during the pulse or not even reach the
setpoint, if it is too high the output stage will heat up fast and lead to an overtemperature
shutdown.
The following equation can be used to calculate the capacitor voltage Vcap in dependence of
the output current, compliance voltage and pulse width:
))
046
.
0
011.0((5 pulse LDLDcap T IUV 
where
LDU Compliance voltage in V
LD
I
Current setpoint in A
pulseT Pulse width in s
This equation does not use the repetition rate. Hence, this value must be increased if a current
drop is measured during operation.
If the capacitor voltage is way too high, the output stage can get damaged. It is
safe to start with a lower than required voltage and raise it slowly during operation
until the pulse shape is rectangular.
The storage capacitors provide a high amount of energy. Creating a short cut over the
output clamps is not recommended and might result in an electrical spark and / or fire.
The capacitors are charged up to 34 V. Touching the clamps may result in an electrical
shock and serious injury.

18
Trigger Modes
The LDP-QCW supports four different trigger modes as explained below. In order to change
the trigger mode, the driver must be disabled (enable = 0) and the TRG_MODE and
TRG_EDGE bits in the LSTAT register must be set accordingly.
Internal (trgmode = 0)
The pulse generation is performed by an internal pulse generator. The pulse width and
repetition rate are user configurable via the serial interface. In addition, the number of pulses
that will be generated when the driver is enabled can be set from a single pulse to a
continuous pulse generation while the driver is enabled.
The following diagram shows an example of generated pulses. The lower graph shows the
internal pulse generator, the upper two graphs the trigger pulses generated out of it.
Symbol Meaning
T1 Enabling of the output.
T1-T2 Delay between output enable and the first generated pulse depends on
the configured repetition rate. It nearly equals the pulse pause time.
T2-T3 Pulse rise time. It depends on the load inductance.
T4-T5 Pulse fall time. It depends on the load inductance.
T6 Disabling of the output.
T7 Re-enabling of the output.

19
External (trgmode = 1)
The pulse generation is performed by an external pulse generator connected to the pulse
input on the BOB connector. The pulse width and repetition rate is defined by the trigger
signal. The pulses can be inverted by setting the TRG_EDGE bit in the LSTAT register to
“0” or “1”.
The following diagram shows an example of generated pulses. The lower graph shows the
external pulse input, the upper two graphs the trigger pulses generated out of it.
Symbol Meaning
T1 Enabling of the output.
T2-T3 Pulse rise time. It depends on the load inductance.
T4-T5 Pulse fall time. It depends on the load inductance.
T6 Disabling of the output.
T7 Re-enabling of the output.

20
External controlled (trg mode = 2)
This trigger mode uses the external trigger input to control the internal pulse generator. It is
used to generate a number of pulses per rising or falling edge of the external trigger input.
The pulse width and repetition rate are defined by the internal pulse generator and can be set
using the serial interface. Hence, only the edge of the trigger signal is utilized. Setting the
TRG_EDGE bit in the LSTAT register to “1” uses the rising edge, setting it to “0” uses the
falling edge.
The number of pulses and the repetition rate can be set via software.
The following diagram shows an example of generated pulses. The lower graph shows the
external pulse input, the upper two graphs the trigger pulses generated out of it.
Symbol Meaning
T1 Enabling of the output.
T2-T3 Pulse rise time. It depends on the load inductance.
T4-T5 Pulse fall time. It depends on the load inductance.
T6 Disabling of the output.
T7 Re-enabling of the output.
Software (trgmode = 3)
This trigger mode works exactly like the external controlled mode. The only difference is
that the trigger is given using a software command.