Pioneer CLD-D503 User manual

®) PIONEER’
The Art of Entertainment
Service
ORDER NO.
RRV1065
.
The chapter 1 of this Service Manual will not be reprinted. On your additional orders, we may supply only the
chapter 2. For the chapter 1, please make copies and attach to the chapter 2 at your side if necessary.
CD CDV LD PLAYER
CLD-D503 —
CLD-D570
THIS
MANUAL
IS
APPLICABLE
TO
THE
FOLLOWING
MODEL(S)
AND
TYPE(S).
Poder Recuiroment The voltage can be converted by the
Nip, following method.
CLD-D503 AC120V
CLD-D570 AC110—127V/220—240V With the voltage selector.
©
For
the
circuit
and
mechanism
descriptions,
refer
to
the
service
guide
RRV1066
for
CLD-D503.
CONTENTS
CHAPTER 1
1.1 SAFETY INFORMATION ss++sessee+s09+++ 1-2
1 2 SPECIFICATIONS Pere e ere eS ECE eR Cer eer ies 1 3
1.3 PANEL FACILITIES ere ee eee ee erererreereer ey) 1-4
{ 4 IC INFORMATION bee rceccccencesesevesveres 1 -6
1.5 ERROR CODE TABLE *++s-rsssseses00+5 1-20
1 6 ADJU STMENTS Seca rercccsccccccccesecsereees 1 -22
7 ed PCB PARTS LIST pe eeerrcccrecesccseneesoees 4-33
1.8 PARTS LIST FOR EXPLODED VIEWS
AND PACKING POeeeVeCee eee eer eer ee ree resis cs 1-37
CHAPTER 2
2.1 PACKING AND EXPLODED VIEWS --- 2-2
2.2 SCHEMATIC AND PCB CONNECTION
DIAGRAMS Poereereereree eter erate rr errr seers 2-11
PIONEER ELECTRONIC CORPORATION 4-1, Meguro 1-Chome, Meguro-ku, Tokyo 153, Japan
PIONEER ELECTRONICS SERVICE.INC. P.O. Box 1760, Long Beach, California 90801 U.S.A.
PIONEER ELECTRONICS OF CANADA, INC. 300 Allstate Parkway Markham, Ontario LR OP2 Canada
PIONEER ELECTRONIC [EUROPE] N.V. Haven 1087 Keetberglaan 1, 9120 Melsele, Belgium
PIONEER
ELECTRONICS
AUSTRALIA
PTY.
LTD.
178-184
Boundary
Road,
Braeside,
Victoria
3195,
Australia
TEL:
[03]
580-9911
Y
POA
©
PIONEER
ELECTRONIC
CORPORATION
1994
mires
Goednaaaninieett

~LD-D503, CLD-D570
CHAPTER 1
1.1 SAFETY INFORMATION
This service manual is intended for qualified service technicians; it is not meant for the casual
do-it-yourselfer. Qualified technicians have the necessary test equipment and tools, and have been
trained to properly and safely repair complex products such as those covered by this manual.
Improperly performed repairs can adversely affect the safety and reliability of the product and may void
the warranty. If you are not qualified to perform the repair of this product properly and safely, you should
not risk trying to do so and refer the repair to a qualified service technician.
WARNING :
Lead in solder used in this peedueet is listed by the California Health and Welfare agency as‘a known reproductive toxicant which
may cause birth defects or other reproductive harm (California Health & Safety Code, Section 25249.5).
When servicing or handling circuit boards and other components which contain lead in solder, avoid unprotected skin contact with
the solder. Also, when soldering do not inhale any smoke or fumes produced.
NOTICE
(FOR CANADIAN MODEL ONLY)
Fuse symbols -W&—H (fast operating fuse) and/or -§&— (slow operating fuse) on PCB indicate that replacement parts
must be of identical designation.
REMARQUE
(POUR MODELE CANADIEN SEULEMENT)
Les symboles de fusible -§&—- (fusible de type rapide) et/ou -§&— (fusible de type lent) sur CCl indiquent que les
piéces de remplacement doivent avoir la méme désignation.
(FOR USA MODEL ONLY)
1.SAFETY PRECAUTIONS
The following check should be performed for the
continued protection of the customer and service
technician.
LEAKAGE CURRENT CHECK
Measure leakage current to a known earth ground
(water pipe, conduit, etc.) by connecting a leakage
ANY MEASUREMENTS NOT WITHIN THE LIMITS
OUTLINED ABOVE ARE INDICATIVE OF A PO-
TENTIAL SHOCK HAZARD AND MUST BE COR-.
RECTED BEFORE RETURNING THE APPLIANCE TO
THE CUSTOMER.
2.PRODUCT SAFETY NOTICE
current tester such as Simpson Model 229-2 or
metal parts of the appliance (input/output terminals,
screwheads, metal overlays, contro} shaft, etc.). Plug
the AC line cord of the appliance directly into a 120V
AC 60Hz outlet and turn the AC power switch on. Any
current measured must not exceed 0.5mA.
Reading should
Leakage | Not be above
0.5mA
Test all
exposed metal
surfaces
Also test with
plug reversed
(Using AC adapter
plug as required}
Earth
ground
AC Leakage Test
equivalent between the earth ground and all exposed |
Many electrical and mechanical parts in the appli-
ance have special safety related characteristics. These
are often not evident from visual inspection nor the
protection afforded by them necessarily can be ob-
tained by using replacement components rated for vol-
tage, wattage, etc. Replacement parts which have
these special safety characteristics are identified in
this Service Manual.
Electrical components having such features are
identified by marking with a A\ on the schematics and
on the parts list in this Service Manual.
The use of a substitute replacement component which
dose not have the same safety characteristics as the
PIONEER recommended replacement one, shown in
the parts list in this Service Manual, may create shock,
fire, or other hazards.
Product Safety is continuously under review and
new instructions are issued from time to time. For
the latest information, always consult the current
PIONEER Service Manual. A subscription to, or ad-
ditional copies of, PIONEER Service Manual may be
obtained at a nominal charge from PIONEER.

1.2 SPECIFICATIONS
1. Generali
SVSTOM i Secs susttids kt headset sebecnaes LaserVision Disc system and
Compact Disc digital audio system
LASEP ooo. .eeceeeeeeeeees Semiconductor laser wavelength 780 nm
Power requirements
U.S. and Canadian models ...............e AC 120 V, 60 Hz
Other models ........:cccceeeeee AC 110 - 127 V/220 - 240 V,
(switchable) 50/60 Hz
POWEF CONSUMPTION .....ccccescscssseseeecseeeeseeesees Sesssecseeeev’ 40 W
Weight ........:cc sapatasisteagtonsstevestcaveays 8.0 kg (17 Ibs 10 oz)
DIMENSIONS ..........eeeeeeeeteeeee 420 (W) x 434 (D) x 140 (H) mm
16-9/16 (W) x 17-1/16 (D) x 5-1/2 (FR) in
Operating temperature Deke adees we taacseeleeariays +5°C ~ +35°C
(41°F - 95°F)
peri DUMIGIY sccccssienmisceneccsecesueat ines eis site. 5% ~ 85%
(There should be no condensation of moisture.)
2. Disc
LaserVision Discs
*Maximum playing times
12-inch standard play disc ...............00 1 hour/both sides
12-inch extended play dise oe 2 hours/both sides
8-inch standard play disc... eee 28 min/both sides
14 min/one side
8-inch extended play disc ........... ee 40 min/both sides
20 min/one side
Spindle motor speed
Standard play diSC ........csssseeseseeeteteeteeeeeneenees 1,800 rom
Extended play disc ........ 1,800 rpm (inner circumference)
to 600 rpm (outer circumference)
(For a 12-inch disc)
Compact Discs
DISC. ccessteieese Diameter: 5-inch, 3-inch, Thickness: 1.2 mm
Rotation direction (pickup side)................ Counterclockwise
Linear SP@Od 0.0... eceeeeesseereecseeseeeeeeseeeceenees 1.2 ~ 1.4m/sec
*Maximum playing time oo... eee 74 min. 5-inch discs
20 min. 3-inch discs
{For stereo playback)
Compact Discs with Video
DISC. Siaci.itvicleemiekh dees Diameter: 5-inch, Thickness: 1.2 mm
Rotation direction (pickup side)................ Counterclockwise
Linear speed oo... eee ences Audio portion: 1.2 ~ 1.4m/sec
Video portion: 11 ~ 12m/sec
*Maximum playing time............. Video portion: 5 min. (CLV)
Audio portion: 20 min. (Digital)
* Actual playback time differs for each disc.
CLD-D503, CLD-D570
3. Video characteristics (two pairs)
FOMMAL
svideccseciidiestoetes
vibtsaseatinnteeveveesss
NTSC
specifications
Video
output
Level.............
1
Vp-p
nominal,
sync.
negative,
terminated
IMPOCANCE
1...
ceeeceseeseeeeseneseenenereeenene
75Q
unbalanced
DaCK
aeetsccessis
sede
ecsavs
cvecasseesciaaectoecedb
cueae
cachet
va
doves
RCA
jack
4.
S-Video
output
(CLD-D570
:
two
pairs)
Y
(luminance)
-
Output
level
........
eee
eeeeeeees
1
Vp-p
(75
Q)
C
(color)
-
Output
level
.....
eee
ceeteeeeeees
286
mVp-p
(75
Q)
JACKS.
case
vcecdceastesicteidbessucasdenedgeinsdvsaseinteastle
aeetases
SVIDEO
jack
5. Audio characteristics (two pairs)
Output level
During analog aUdIO OUTPUT ........ ce eeeereeeeeeeeee 200 mVrms
(1 kHz, 40%)
During digital audio OUTPUT... eee seeeeeees 200 mVrms
(1 kHz, -20 dB)
JACKS ini cicises Wastes vero keedeeee evento Both RCA jacks
Digital Audio Characteristics
Frequency response 4 Hz-20 kHz (EIAJ)
SN ratio 115 dB (EIAJ)
Dynamic range 98 dB (EIAJ)
Total harmonic distortion } 0.0025% (EIAJ)
Limit of measurement (ElAJ)
Wow and flutter
6. Other Terminals
Control input/output ..... cee eee Both miniature jacks
CD-DECK SYNCHIO .0.....ceeeecceseeesteeeeseeeseeeaees Miniature jacks
Optical digital output....... ceuccdvsvevtapnesainidees Optical digital jack
(except for U.S. and Canadian models}
7. Accessories
Remote: control Unitas iccccicidet stash eetacststeeoran tees 1
Size “AAA" (IEC RO3) dry cell batterieS ........ cc cceeeenerees 2
VIdEO COP! dec fection clecita maine eeieaeg mean teres 1
AUGIO CORK. 3255.2) .ccscscdecteksaabed eeteec eka ebs seed Saas nee eetenseseeyes 1
Operating INStrUCtiONS 0... eect cceseeeceeereeseseteeeeesseerseeees 1
Warranty Card's. soscsteicscascavsscecacpecndacegadaneirs ctatogevachots teesesansess 2 1
1-3

CLD-D503, CLD-D570
1.3 PANEL FACILITIES
A detailed description is provided on the indicated page(s). Disc table CD Disc table
PHONES LEVEL control
Turn this control in the "MAX" direction to increase
the output level from the PHONES jack. Turn this
control in the "MIN" direction to decrease the
output level from the PHONES jack.
ees
PHONES jack
| a
DIRECT CD OPERATION
STANDBY indicator =
This indicator lights when the power is set to ———
standby and goes out when the power is turned en ee
on, POWER PHQNES LEVEL fil
POWER STANDBY/ON switch ——) } = @
Press
to
turn
the
power
on
and
off.
©
q
)
Fe
Remote sensor eer ae ee
Display window
. Play indicator (>) 1/L, 2/R indicator
Lights during play. Blinks — Indicates the audio output channel.
during search. tag indicator RANDOM indicator
a? ights during repeat play. ahtscea d
PROGRAM indicator Oi GUNG FaneOnr Pay:
Lights during program play. TRACK/CHP indicator HILITE/INTRO indicator
Indicates
the
TRACK
Lights
during
Hilite
scan
or
PGM EDIT indicator number or CHP Intro Scan mode.
Lights when program (chapter) number. ;
editing is performed. DISC SIDE B indicator
HIMITE
INTRO
RANDOM
DIGITAL SOUND indicator LD/CD/CDV visual calendar
Lights when the disc being When a disc is loaded, all of the chapter/track numbers
played has a digital sound recorded on the disc light up on the display. If the disc
signal. contains more than 19 chapters/tracks, the — indicator
With LD discs, this indicator lights.
lights when the digital sound During program play, only the programmed chapter/track
signal is selected. numbers light. When a disc without a TOC section is
played, only the selection number being played lights.
When a CDV disc is loaded, the track numbers of the
video part light followed by the track numbers of the
DISC SIDE A indicator
Pause indicator (1)
:
nor
audio
part.
Lights
when
the
player
is
in
pause
mode.
After
a chapter/track
is
finished
playing,
the
TOTAL/REMAIN
indicator
corresponding
number
goes
out.
Indicates
the
TOTAL
TIME
(total
play
time)
or
REMAIN
TIME
(remaining
FRAME/TIME
indicator
play
time).
Indicates
the
FRAME
number
or
TIME.
1-4

BOTH
I neater
meerr Vt.
fa
‘ “ °
THEATER DISPLAY
Cc
G) C)
St Skip (|<<, >>) buttons
eee ae]
CLD-D503, CLD-D57(
DIRECT CD button
DISC SIDE A/B buttons
DIREGT CD
© © o
Open/Close (4) button
Play/Pause (>/i) button
Stop (m) button
REPEAT A/B button
RANDOM PLAY button
——==sx
S
=|
SCAN
control
(REV/—,
FWD/+)
Digital level contro! button (D-LEVEL CTRL)
HILITE/INTRO
button
|
AUDIO button
DISPLAY button
FILM MODE button/indicator
Set
to
ON
in
accordance
with
your
tastes,
particularly
when
viewing
movie
discs.
FL
OFF
button/indicator
Pressing
this
button
turns
off
the
display
in
the
front
panel
display
window
and
causes
the
FL
OFF
indicator
to
light.
Press
the
button
again
to
cause
the
display
to
return.
Turning
off
the
display
prevents
low
levels
of
noise
from
adversely
affecting
sound
quality.
1-5

>LD-D703, CLD-D770
1.4 IC INFORMATION
Wi PD3260C (FLKY ASS’Y 1IC100)
@ Mode control IC
® Pin function
PN. [_Pinname [vO | Funeion
2 |G-CS
Graphics sub microcomputer
(PDC014A) communication request
Pa [savor |__| seit communication daa input
S—FTOM | O | Seal communication data ouput
Ser (OUT | 0 [Mote bard eset opt
mee
communication request
Ti Yeo deck ayn input
T [0 [co decksynsiro ouput
| |
Ea
eel
i
7 .|XCS
4214 3 |3 8/8 lon Ke} ols
a|4
AVCC
JOG2 Jog dial data input
JOGI | 1 [Jog dial data input
Key data input
or [pew
Pian.
rr feo
Fo [Newe
2 ee ee
ale
Erie
=
el
ae id
Qo
_
[5
ia Zz
Oo
13
i
|
Vss
no
fil
4
an
24 sc
1
2 SC2
26 | XRESET (IN)
request
SHAKE (ACK) yo
(Mode control acknowledge output)
Baal
swiching output
(L:PIONNER, H:MARANTZ)
LEDS LEDOUT : FL OFF
Laps +O [LEDOUT: Dieaco__—_—=|
LED3 | 0 | LED OUT : Graphics
S— SCAN | 0 | Shuttle scan output
Display segment output
Oscillator (8 MHz)
CPU Reset (L:reset)
Mechanism control communication
Wr ()
28
29 |P.ON
ED1
w N
:
31 |(OEMNO1)
w
Sp
ti
oO 6
w
35
36
WEw
® The information shown in the list is basic information and
may not correspond exactly to that shown in the schematic
diagrams.
Display segment output
Display segment output
Display segment output/
Key scan output
x (Ks0)
Display segment output/
Key scan output
41 Q
(Ks1)
Display segment output/
42
Key scan output
(Ks2)
Display segment output/
Key scan output
Display segment output
Display segment output
43
“=~
a
Ww
~
Display segment output
| o | Display segment output
disp |_1- [FL Power supply (—27V)
Not used (N. C)
Not used (N. C)
WwW] w
G10
G9
G8
G7
G6
WM
wm Mpni~ nr
iv
3
GS Display grid output
7 {G4
58 |G3
59
ml uni wm
n
LED OUT : Standby
Destination select power
(L: Japan H : north America)
63 | W.D.F Pulse output for watchdog timer
Graphics sub microcomputer
communication enable
?
tt Zz

CLD-D703, CLD-D770
li PD0185B (VSOP ASSY 1C101)
@® Mechanism control IC
® Pin function
Function
&
Zz ral
218 >
Power connection pin Impresses 5V+10%.
Focus balance control. 1: TEMAX 0: RFMAX
Digital/analog audio switch signal output pin “H” = digital, “L” = analog
RF CORR
RF collection switch signal output pin H = gain up, CAV inner circuit gain up
Not used
SLD POS
LD ERR
ILT ERR
Pick up position detection switch input pin (A/D input port)
7 Slider error signal input pin (A/D input port)
Tilt sensor output signal input pin (A/D input port)
Sisla >
es}
rm
m
Tracking balance error signal input pin (A/D input port)
el
fs
QO
is
ib— code sync conformity detection signal input pin Conformity: H Other: L
b—code Q reading OK signal input pin OK: H NG:L
racking Off—set control signal output pin
2
AL DRV
SP reading/writing command signal output pin READ: L WRITE: H
D/CD switching signal output pin LD: H CD: L
SP reading command data input pin. SUBQ is read out.
:
Pa Q i)
i
8 |8 Z|
“J
SP writing command data output pin
DSP reading/writing command clock output pin. Start—up reading.
Slider control signal output pin A—side 5V—FWD, 0V—REV (B-side is opposite), 2.5V — STOP
SLD DRV
mete be fete te uije de
WlLOIFyr~RA[uryprpwolwjrej| o
Z qq
2} Q = Q
Q
Aw
Input pin for data from mode control IC
Serial data output to mode control IC
Clock for serial communication with mode control IC
Tracking error zero cross signal input pin
Handshake signal pin for data communication with mode control IC
Audio line sound mute control signal output pin MUTE: H MUTE CANCEL: L
HAKE
w
w
PVCLATCH
Latch output of serial control for digital filter IC PDO116A. Latches at falling edge.
LD/CDV play vertical synchronous signal input pin vertical synchronous: L
GND grounding for A/D conversion
a |o|4)2|8 |g
m1) e
iit
Reset signal input pin “L” = reset “H” = reset cancel
Ma o Zz
9MHz clock oscillation input pin
OUT
9MHz clock oscillation output pin
i
io)
Not used. Since it is for only > output, it cannot be used for anything else.
Q
Zz 0
GND grounding
ETAMP
Spindle overcurrent detection signal input pin overcurrent: L normal: H ©
Focus servo lock signal input pin lock: L unlock: H
emory yes/no determination input pin memory yes: H memory no: L
5
put pin for reference H—SYNC signal from DVP ;
Spindle motor FG signal input pin 24 outputs per rotation. Used after dividing by 3 in microcomputer.
zla]z|s| alg >| |aIS|R
rm
Input pin for Phillips code decoder with built in mechanism controller
wo x
ac)
pf a i, Z a
3
&
|
|
for Phillips code decoder
Play V—SYNC input for Phillips code decoder
Not used
a8
42
43
IRECT CD direct video line power off signal output pin Video PWOFF: H_ normal: L
WEWI I WEWSlTWliWiwW iW l/l Wl Wi iNin NI NIN YIN IN) dN [wv
F<
=] ie = 0
Track jump accelerating/decelerating signal input pin accelerating/decelerating: H other: L

CLD-D503, CLD-D570
@ PAO0O23AD (MAIN ASSY 1IC401)
@ FM Detector
@ Pin Function
[Pinname | Function Ne| Pinname | ___—‘Function ———SSS—*d
Zz QO w
vec__| +5V powerpin
BIAS BIAS pin
° c
5
;
REG Constant voltage pin
RF input pin (positive)
Z
+
3
RF
input
pin
(negative)
Delay
time
setting
pin
VEE -5V power pin Delay time setting pin
[Nes Nc mba
mm fe ~ Wir o
6
b
NC2 14| Nes
i PAO058A (MAIN ASSY IC400)
® Video demodulator
@ Pinname
Pin name
Power pin
<
Ar 218 to
2 Drop-out pulse output pin Noise reduction 2 input pin
Outputs drop-out pulse if drop out is detected. NRR2 Adjusts noise reduction level using value
H level (during drop-out) > 4.3V Sf cicbaianmnceried bianca iaand
L level (when normal) > 0.2V B NRR1 OND. Soa a Eee
Composite sink pulse output pin -
H
level
Vcc
Input
pin
L level 0.2V GND2
DATA Phillips code pulse output pin 21| DEEM De-emphasis amplifier output pin
H level — 4.3V
ee
3 3
Appropriate feedback circuit is inserted
L level — 0.2V
between this pin and de-emphasis amplifier
CSIN Input pin for synchronization separation input pin.
Diode clamp input Output level > 1.1 V p-p
Clamp level > about 1.9V 22! DEEMIN
De-emphasis amplifier input pin
Input level + 200 mV p-p
PEDIN Input pin for synchronization separation
Hard-clamped at pedestal level 23| RDOS
Clamp level — about 2.7V
GND1
LPF output pin for synchronization separation
ame GND3
Output level — 1V p-p (GAIN 0dB) :
F : 25} CINH
OTTOM = | Low side reference voltage pin for A/D
conversions
10 | RE20K Resistance pin for internal constant current
supply. Connected to 20K 2 resistance. 26| DINH
TOP ;
12 | VOUT
DOS frequency sensitivity adjustment pin
Adjusts frequency sensitivity of DOS using
resistance inserted between this pin and GND.
Recommended resistance > 20 KQ.
{ay fas] *T
Clamp inhibit pin
Controls clamp operation of 5, 6, 13 pins
OV > clamp
5V — clamp inhibit
Phillips code pulse output control pin
OV — output inhibit
5V > output
HIGH side reference voltage pin for A/D
conversion
Outputs video signal that is clamped by
synchronization chip for A/D conversion.
Output level + 2V p-p (GAIN 6dB)
Synchronization signal level — about 1.67V
27} NRINI Noise reduction 1
Control pin
; 0V + ON
5V — OFF
Synchronization signal clamp input pin
Input level + 1V p-p
13 | SCLPIN 28] DOSIN DOS input pin
‘| Input level — 500 mV p-p
14 | NROUT Noise reduction circuit output pin 30] NC2 ;
Ouiput level) LV pp a

CLD-D503, CLD-D57(
Mi PDO146A (MAIN ASSY IC500)
®@ Digital video processor
@ Pin Function
1 Power pin for reference system
Connected to +5V.
XSGCSY
Reference composite synchronization output
2
Reference composite synchronization is output at negative logic.
Delay can be controlled by serial command.
3 | WFM MMEMSYS:1! Field monitor output for write system
Outputs “H” when in odd field.
XCHA MEMSYS:0 } Character input pin for write system
Inputs “L” during character insertion.
SYS:1 | TBC H synchronization output
Outputs time base-corrected H synchronization at negative logic.
MEM
= SSG phase detection signal output
Outputs “H” when phase difference of H, V synchronization between Playback system
(after TBC) and SSG system is small enough.
MEMSYS:1 | TBC V synchronization output
Outputs time base-corrected V synchronization at negative logic.
MEMSYS:0_ | Clock output for character generation
Outputs 2Fsc.
FCH - MEMSYS:1 | Field change input .
Switches field of SSG when “H”.
MEMSYS:0 | Character frame input pin
Inputs “L” when character frame is inserted.
CK Reference inverted CLK output
Reference CLK is reversed and output.
Reference CLK output
: Data output 2
fis [DOO | Data ouput
17 | DCOREF | D/Aconverter reference for DCO ~
Normally connected to DAGND via 0.1 WF of laminated ceramic capacitor.
18 | INSSY Synchronization output for insertion
Synchronization insert pin.
OPEN DRAIN output.
DAREF D/A converter reference for video
Normally connected to DAGND via 0.1 uF of laminated ceramic capacitor.
20 | VOUT TBC (time base-corrected) video output pin
Synchronization must be inserted by pin 18 (INSSY).
Note) Pin functions of pins 3- 6 differ depending on the mode (MEMSYS) of interface.
:
a ae
Q
A ol &
re <
Aw
x
”™
<
n
)
eI bs
es
Outputs TBC (time base-corrected) video signal to support memory. Serial interface
performs this setting. D07 is MSB, DOO is LSB.
alelels[elsfel@] =|
1) iw] 9|2
PRR

CLD-D503, CLD-D570
DAVDD Power pin for D/A converter
Connected
to
+5V.
IBIAS Bias circuit current control pin for A/D, D/A converter Normally connected to DAGND via external
resistance.
DAGND _| Ground pin for D/A converter
Connect to GND.
DCOGND | Ground pin for DCO
Connect to GND.
DCOVDD | Power pin for DCO
Connect to +5V.
DCO output pin
ADCK is generated by multiplying this signal by 4.
Ol Waveform shaping input pin 1
Inputs DCO0 signal via band pass filter of fsc. (self-biased)
02 Waveform shaping output pin 2
Outputs signal of waveform of DCO] signal that is shaped.
03 Waveform shaping input pin 3
Inputs signal of DCO2 output signal that is delayed 70 ns (self-biased).
Waveform shaping output pin 4 | :
Outputs signal multiplied by 2.
DCOS Waveform shaping input pin 5
Inputs signal of DCO4 output signal that is delayed 35 ns (self-biased).
Waveform shaping output pin 6
Outputs signal multiplied by 4. This signal is filtered through 4 fsc of the ceramic filter, and is used as a
write
system
CLK.
.
WGND
Ground
pin
for
write
system
Connect
to
GND.
34
|
ADCK
CLK
input
pin
for
write
system
Inputs
signal
of
DCO6
output
signal
that
is
filtered
through
4
fsc
ceramic
filter.
(self-biased)
35 | ACOM Jitter correction control output for audio
Outputs signal that has a duty in accord with error amount generated at internal phase comparator. Used
to correct audio jitter.
| 36 | XPBV V synchronization output for playback system
Outputs signal that has V synchronization separated from pin 50 (XPBCSY) signal at negative logic.
37 | XPBH H synchronization output for playback system
Outputs signal that has H synchronization separated from pin 50 (XPBCSY) signal at negative logic.
38 | TBCLOCK | PLL LOCK detection signal
Outputs “H” when SPDL servo loop and TBC servo loop are locked.
39 | SLATCH | Serial interface latch signal
Generates timing to latch data that was input to serial interface (latched at fall edge).
[40 | SCLK Serial interface CLK input
Inputs CLK for serial interface. SDATA value is read at rise edge.
41 | SDATA Serial interface data input
Inputs data to serial interface.
2 | XRST System reset
Initializes internal registers of IC at negative logic. (Schmitt trigger input)
43 A/D converter top reference input
Inputs top reference voltage of A/D converter.
2 —
to N
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NM
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CLD-D503, CLD-D570
No[Pinname [Function
44 | ADVDD Power pin for A/D converter
Connect to +5V.
45 | ADGND Ground pin for A/D converter
Connect to GND.
46 | RBT A/D converter bottom reference input
Inputs bottom reference voltage of A/D converter.
47 | VIN A/D converter input pin
Inputs composite video signal.
48 | WGND Ground pin for write system
Connect to GND.
49 | WVDD Power pin for write system
Connect to +5V.
50 | XPBCSY Composite synchronization input for playback system
Input composite synchronization at negative logic. (Schmitt trigger input)
DOSP Drop out detection pulse input (Schmitt trigger input)
52 | RF RF signal input
; Inputs RF signal for spindle servo-circuit.
z |
54
Tracking open pulse input (Schmitt trigger input)
Spindle error PFD error output pin
GCONT
ACCNT
Outputs result after performing PFD on PBH and RefH at tri-state.
Gain control output
Outputs PWM signal according to set value (GD0-DG3), using serial instructions.
Accelerated control output
Outputs acceleration/deceleration signal by forced acceleration/deceleration, by error detection by RF,
and by error detection by H synchronization with tri-state.
PWMI
58 | FR
Inputs signals that have voltage compared between spindle errors that passed through a loop filter and
target voltage. (Schmitt trigger input)
59 | TEST Input pin for IC test.
Fixed to “L”.
60 | DRVA Transistor control signal output pin for spindle motor drive
This setting is performed by the interface corresponding to the brush motor and brushless motor.
61 | DRVB Transistor control signal output pin for spindle motor drive
62 | RGND
Spindle error direction component input
Spindle error PWM input
Inputs signals that have voltage compared between spindle errors that passed through a loop filter and
This setting is performed by the interface corresponding to the brush motor and brushless motor.
Ground pin for reference system
chopping waves. (Schmitt trigger input)
Connect to GND.
63 | XO Oscillation output
Connects X’tal (4 fsc) for oscillation.
XI Oscillation input
Connects X’tal (4 fsc) for oscillation.

CLD-D503, CLD-D570
i PD0154A (MAIN ASSY IC603)
@ On screen display
@ Block Diagram
DISPLAY ROM
BLOCK 12* 18° 160
RAM
10* 24°8
Pin Function
Function
TESTIN1 | Test input 1
Input pin for IC test. Normally set to OPEN (with pull-up resistance).
C-SYNC Composite synchronization input
Inputs composite synchronization signal at negative logic (Schmitt tigger input).
3 | TESTIN2 | Test input 2
Input pin for IC test. Normally set to OPEN (with pull-up resistance).
_4 | 2fse Master Clock
Inputs clock that is 2 times the color sub-carrier frequency (Schmitt trigger input).
CHA
CHB
ee |
Output pin to IC test. Normally set to OPEN.
Channel A output
Outputs character timing at negative logic.
Channel B output
Outputs
logical
sum
of
character
timing
and
blanking
timing
at
negative
logic
when
blanking
function
is ON.
SS Ground pin
Grounded to GND.
SCK Serial clock input
Inputs clock for serial communication.
SIN value is read at rise edge (with pull-up resistance, Schmitt trigger input).
10 | SIN Serial data input
Inputs data for serial communication (with pull-up resistance). :
a
Chip select input
Set to “L” when serial communication is performed (with pull-up resistance),
Auto Clear input
Initializes
internal
IC
when
“L”
content
of
RAM,
that
stores
character
code,
does
not
change
(with
pull-up resistance, Schmitt trigger input).
13 | TESTOUT2) Test output 2
Output pin for IC test. Normally set to OPEN.
14 | 2fsc/256 Master clock 256 division
Outputs clock of master clock (2fsc) that is divided by 256.
VSYNC V synchronization output
Outputs
signal
of
V
synchronization
that
is
separated
from
pin
2
signal
(C-SYNC).
VDD Power pin
Connected to +5V.
A
—
ws
—_ _ —
On i) _
st
'
—_
Ls)

CLD-D503, CLD-D57(
i CXD2023Q (MAIN ASSY 1C701)
@ 3Line digital comb filter
Digital input (MSB) (connected to DVss or DVpp when not used)
@ Pin Function
-/5
Digital input (connected to DVss or DVpp when not used)
<|<|<|<|<|<|<
Dla] EIA] aloo
Digital
input
(LSB)
(connected
to
DVss
or
DVpp)
H:
AD
converter,
outputs
video
signal
fetched
from
(input
pin
ADIN)
from
Y
output
pins
(YA-Y3)
as
8-bit
digital
data.
L:
normal
mode
>| < Q)x fe) Se)
Input switching, switches input of comb filter.
H: digital input
L: analog input —
Clock amplifier input
(Inputs clock that has a DC cut at capacitor by 0.8Vp-p or more)
Digital ground
Digital power supply (SV)
Clock amplifier output
Clock
input
(inputs
4
fsc
clock,
that
is
locked
to
color
burst).
Normally
connected
to
pin
14
clock
amplifier
output
a
alyly
alisieabs
Al Ale (8
.e) Q
Cc A
ell atl an
Ul & [Ww
Clock input for A/D converter (inputs same clock as MCK).
Normally connected to pin 14 clock amplifier output.
Clamp pulse input for A/D converter.
Clamps signal voltage between low blocks of clamp pulse
(connected to DVpp when clamp function is “OFF”).
H: clamp function becomes “OFF”, has normal A/D converter function only.
L: clamp function operates
CPON
3
>| x Ql > b ‘a aE
aw A
9
Digital ground for A/D converter
Voltage integration pin for clamp control, connected to.about a 0.01 WF capacitor
(connected to ground if clamp is not used).
Clamp reference voltage input. Equalizes reference voltage and input voltage of
clamp block (connected to ground if clamp is not used).
Reference voltage (bottom) standard value (0.5V)
Guard
ring
(connected
to
analog
ground)
,
id Nl — —
N
8
Q) Q A
BG
Nl wn
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BG
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1-13

CLD-D503, CLD-D570
Function
Power supply for Y/DA converter (SV)
AYO inverted current output pin (connected to analog ground YVss)
REEEESHE
Y
Ww i)
Analog luminance signal output (outputs by connecting resistance)
Connected to about a 0.1 uF capacitor
:
I | Sets full scale value of analog luminance signal
:
Connected to resistance “16R”, which is 16 times output resistance “R” of AYO pin.
Analog ground for Y/DA converter
Connected to about a 0.1 uF capacitor
Analog power supply (5V) for C/DA converter
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ACO inverted current output pin (connected to analog ground CVss)
Analog chroma signal output (outputs by connecting resistance)
Connected to about a 0.1 LF capacitor
pb
QO
<
Sets full scale value of analog chroma signal -
Connected to resistance ““16R”, which is 16 times output resistance “R” of ACO pin
Ground for C/DA converter
Digital luminance signal output (MSB)
Digital luminance output
Digital ground
=
| oO |
| = |
.
=
| 53 |DVm | — | Digital power supply (5V)
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aes)
Digital luminance signal output
Digital luminance signal output (LSB)
Digital luminance signal output control H: high impedance L: enable
Digital chroma signal output (MSB)
Digital chroma signal output
Digital chroma signal output (LSB)
Digital chroma signal output control H: high impedance L: enable
66 jcr | |
Aperture correction H: corrects function deterioration by aperture effect Aperture
xcon «| |
correction is on Y output, performed by through mode (TST ON) as well.
APCN
L: standard mode
fe [rest [1 [ Testpin(ixeao "D9
1-14

CLD-D503, CLD-D570
Test pin (fixed to “L”)
Y output through mode
H:
Y
output
outputs
input
composite
video
signal.
1H
+
18
clocks
of
delay
occurs
to
input
at
this
time
(during
digital
input).
C
signal,
in
which
Y/C
are
separated,
is
output
as
C
output.
L:
Y/C
separation
mode
Digital ground
Digital power supply (5V)
Test pin (fixed to “L”)
H: fixed to BPF separation L: standard mode
Test pin (fixed to “L”’)

CLD-D503, CLD-D570
i _C78681E (MAIN ASSY IC802)
@ Servo-control & EFM demodulation
@ Outline of Functions
1) If HF signal is input, slices HF signal at accurate level, and
converts it to EFM signal. After this compares the phase
with VCO, and regenerates an average 4.3218 MHz PLL
clock.
2) Controls rotation of spindle motor by the frame phase
difference signal generated from the playback clock and
reference clock.
3) Demodulates and converts EFM signal to 8-bit symbol
data.
@ Block Diagram
a q 9
v
5 3 5 2 6 &
{6 14-82-18 -
|
H
:
Slice
level
VCO
clock
Sein
control
oscillation
i clock control
|
|
a Synchronization
FSEQ [19 detection EFM
demodulation
ie
CLV + {10} CLV
civ—[l] digital servo
V/P 112)
I
PW.SBCK |46) Sub-code sepa-
ration Q CRC
SBSY.SFSY [47
|
cc
wRQ.SQOuT 50—f com
C1, C2 error detection
correction flag process
4) Separates subcode from EFM demodulation signal, and
outputs to external microprocessor.
5) Buffers EFM demodulation signal at internal ROM, and
performs jitter-absorption by disc rotation fluctuation of
+4 frames.
6) Performs unscramble and deinterleaving to rearrange EFM
demodulation signals in a specified order.
7) Detects and corrects error signals, and performs a flag
process (C1, double; C2, double correction system).
ammamm is
Saaeaa 8 8
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(91 23)
28
61)
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RAM
address
H
RAM
generator
|
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41]
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|
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CQCK {54}
COIN 153)
Servo-
: fede I commander
DEMO/27
Digital
OUT DOUT
DAC OUT
interface
XTAL system
timing generator
!
|
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CLD-D503, CLD-D57C
@ Pin function
[io | PinName [VO] —~—~S*urction ——SSSCSC—~S~S
A TESTI EG LSI test pin (normally incoanecicd)
| 2 [AO |__| Pinto input the output from PACO03A internal VCO (8.6436 MHz)
| start
PDO Phase output with EFM signal. Set so that frequency is increased with +.
EFMIN is input pin of 1-2Vp-p of HF signal. EFM signals having reverse phase, that
went through the amplitude limiter, are output from EFMO, EFMO pins. These EFM
signals are input to the EFMIN pin via the low pass filter in PACOO3A. These signals
control slice level.
Output for disc motor control
CLV* is a signal to accelerate the disc in a positive direction,
and CLV is a signal to decelerate a disc.
One mode is selected from accelerate, decelerate, CLV and
stop modes by a command from the microcomputer. The
CLV* and CLV: output in each mode are shown in the table
to the right.
The TOFF terminal is Low only when the CLV servo control command is in the CLV
mode. In other modes, the TOFF terminal is High. Command-driven control of the TOFF
terminal is enabled in the CLV mode.
}iz{vep — fo Outputs “H” during CLV rough servo : Outputs “L” during phase control
| 13 |FocS | © | Focusservo becomes OFF when FOCS pin is “H”. Lens lowers by FST pin output, and
fia [rst | | gradually rises when FOCS pinis“H”. If FZD is output, FOCS is reset. These pins are
== for focus retraction.
ris fro |
in a
17 | TES I
fig [PCcK —ss fs 0 | 4.3218 MHz. PCK monitor pin
19 | FSEQ Becomes 1 when SYNC (true FS) adecied from EFM signal and SYNC (inserted FS) of
ace match. (1 frame latch output)
| O | Generates a kick pulse, JP+, and JP- according to the track jump command. Jumps the
21 GE. Os | specified number of tracks (1, 4, 16, 64).
| 22 |THLD | 0 | |
23 |TEST3. ss {sd LSI test pin (normally not connected)
Used as a pair with TOFF, TGL, THLD, JP+ and JP- output pins.
Generates a kick pulse, JP+, and JP- according to the track jump command. Jumps the
specified number of tracks (1,4, 16, 64).
24 | VDD
Nera ce ee ee ae ce ee ea
ras tro | pent gig cgreeteem ernt ene
| 26) | CO zeae lsad number of tracks (1, 4, 16, 64).
[27 [DEMO | _1_| For seadjusting process. Input pin for sound function, SS
as [Tests | 1 | Lstiestpin (normally novomecied) ————SSCSC~C~S~*~*
[29 [EMPH | 0 | Deemphassis necessary when EMP SSCSC~“S~S~*~*~*
P30 [NC | = [Notcomesed
31 [WCLK | © | Outpus signal io D/A converter. Signal forsamplehold, ———SSCC*d
32 [TesT7 __|_0 | Lstuestpin (normally notcomected) ———SSCSCSC~“~*~“~“~*~*~*
[33 [ERCLK | 0 | Ouipus signal io D/A convener. LRswitching signal —————SSCC*SY
1-17

CLD-D503, CLD-D570
DFOUT
DACLK
LRSY
ROMOUT
4} | C2FCLK
[_Fretion
SSS
For
CD
ROM
corresponding
signal
output
:
hi WwiWiw
%
Q
a
Q Ss) ws)
Output for DIGITAL OUT
Outputs synchronous signal of subcode block
For C1, C2, signal, double correction monitor
SFSY
is
synchronous
signal
of
subcode
frame,
reads
subcode
of
P,Q,
R,
S,
T,
U,
Vand
W
by
sending
clock
to
SBCK
8
times.
Outputs.7.35 kHz synchronous signal
WRQ
becomes
“H”
if
data
of
sub-code
Q
passed
CRC
check.
By
detecting
“H”
externally,
and
sending
CQCK,
data
is
read
from
SQOUT.
After
RWC
is
set
to
““H”
by
microcom-
.
puter,
acommand
is
sent
synchronizing
with
CQCK
command
data.
SBSY
LPpHL|H|_ ap SL bi w
Aiur] & [wip O}o y
=
DOUT
EFLG
SFSY
SBCK
OUT
IN
z
|
MmiMm{~nlinain hPL
ALWYN] 1 Oo coo;r~
g
io)
Reset input. Set to “L” when power is tumed ON.
If
data
of
SQOUT
pin
is
needed
with
LSB
first,
set
this
M/L
pin
to
“L”,
16.9344 MHz. output pin
4.2336 MHz. utput pin
Output pin to control using serial control from microcomputer.
LSI test pin (normally not connected).
Chip
select
pin.
If
this
pin
is
“L”,
LC78681R
becomes
active
(with
pull-down
resistance)
16.9344 MHz. crystal oscillator connection pin.
Output pin to control using serial control from microcomputer
hme
biiitiait |
Bese ee sie elle elelaPielaeleee ie
es §
1-18

CLD-D503, CLD-D570
1.5 ERROR CODE TABLE
1) RAM DSP Functions
The interior RAM contents of the Mode Control Microcomputer
(hereafter: mode con) and the Mechacontrol Microcomputer
(hereafter: mecha con) can be output on a TV screen and error
content can be determined. (RAM DSP function)
Contents of mode con are displayed in 4byte units and contents
of mecha con are displayed in byte units. In this condition, 1
is added to the display address if the TV/LDP key is pressed
and 1 is subtracted if the CX key is pressed. Also, the mode
con/mecha con address control switching is toggle displayed
2) Starting RAM DSP Function with the| DISPLAY key.
The screen shown below appears if the and
keys
on
the
test
mode
remote
control
(GGF1067)
are
pressed
in
Initial
setting
is
set
to
14C
by
pressing
3—digit
display
of
order. mecha con address with | TV/LDP { key (or | CX | key). By
doing so, error code appears as 2~—digit mecha con data.
000-xxX XX XX XX
Mode con address Mecha con address
Mecha con data
(error display)
Explanation of information when analyzing the causes of CLD player errors.
asarg Pacecner
| noerror | This is normal condition
pais J ee
Error
ad
undefined
a litle
E_| wndetned |
spindle
overcurrent
detection error
When overcurrent to spindle motor is detected in play. When monitor starts and
overcurrent port is “L” for 4 seconds after spindle of play or special play is slower
than play for 5 seconds.
Spindle stops in free run. Play cannot be done. No
recovery as long as set is not unplugged.
FG abnormality
error
@
When
frequency
(5
seconds
from
spindle
run)
measured
from
FG
is
below
Spindle
stops
in
free
run.
Free
run
is
90
sec.
for
LD
15
rpm
when
LD is
started. @)
When there is
no
1/8
revolution
even
after
5
|
and
15
sec. for
CD/CDV.
Play
cannot be done after
seconds
have
passed
from
acceleration
finish
when
CD is
started.
@ When |
that. No
recovery
as
long
as
set
is
not
unplugged.
frequency
measured
from FG
is
below
15
rpm
even
though CD:
subcode/LD:
Phillips
code is
readable or
spindle
is
locked
during
play/search.
In other cases,
it
is
assumed
that
the above
conditions
appear
in
the
FG sensor
and
an
accurate
frequency
cannot
be
measured.
R
aCe
partial
short
error
|
G)
When
1200
rpm
cannot
be
reached
even
after
a
specific
time
(8
sec.)
passes
|
Spindle
stops
in
free
run.
Normal
operation
resumes
from
spindle
run when
LD
is started.
@ When
a
specific
frequency
(416 rpm) |
after
that.
cannot
be
reached
even after
6
seconds
pass from
spindle
acceleration
finish
when
CD is started.
undefined
1 (a Sa (SS
7
E9
A
D
E
A aN eA
Ec
(ae
ane
erk
5
Ata
OE:
Soe
SS
Ree
Rage
E
eee
ee
ee
ee
1-20