inverter Q49 (10-9), andthen appliedviaD26 to
the AS terminal of TC9L24AP as a positive
pulse (detected when Q51 is turned off). The
auto scan mode is thus brought to a stop.
If the AUTO/MANUAL selector is set to the
MANUAL position, the AS terminal isswitched
to high level via D29, thereby preventing com-
mencementof the auto scanoperation.
AutoMemory
When switching back and foth between FM and
AM bands, the reception frequency data (in the
main register) is automatically transferred to the
sub register, and the contents of the sub register
automatically transferred to the main register
(i.e. exchange of data). This operation is progr€rm
controlled. Consequently, whenever the FUNC-
TION (FM or AM) key is switched over, the for-
merly tuned frequency is retuned automatically,
thereby eliminating the need to repeat tuning
procedures againfor that station.
MemoryHolding
When the synthesizer control IC (TC9724AP)
INH terminal is switched to low level, an inhibit
function is activated. The complete supply of
operation clock signals within the IC is con-
sequently stopped, thereby putting the IC into a
complete static condition, and this condition is
maintained as long as the inhibition is applied-
there being no inputs or outputs handled whats-
oever, even when any of the operation keys is
pressed.
Since this is a CMOS IC, the power con-
sumption during inhibition mode is extremely
small(measured
in microamps).
The TC9124AP power supply is backed by the
subsidiary power supply circuit, and this main-
tains the TC9124AP power supply even after the
power switch has been turned off (STAND BY
position). In this case,if the AM+B suppliesare
stopped, the memories will be maintained under
inhibit mode. Furthermore, if the AC line supply
is disconnected altogether, the memories will
still be maintained (about 3 days) by means of a
largecapacitance
capacitor(C2).
4.6
DISPLAYCIRCUITOF THE TUNER
SECTION
FrequencyDisplay
The SX-D5000 displaysthe selectedstation fre-
quency on a 5-digit digital display using a fluores-
cent indicator tube (FL tube) as a source. As
noted in Fig. 4-13, the FL tube display grids are
divided into five independent units.
Drive is by the dynamic time division method;
a time cycle is divided into five divisions, and each
digit pulsates in a recurring sequence.The flicker
inherent in this method is not detectable by the
humaneye.
o Time-shareConverter Logic
The SX-D5000 synthesizersystem
dividesatime
cycle into four parts (T1-T4) and usespulse
trains to transfer data. The synthesizer control
IC (TC9124AP) outputs the BCD codedselected
station frequency from terminals A, B, C and D
astime-sharedreception data, and transfers it on
the clock pulsesof T1 thru T4. (SeeTable 2)
In order for this 4-paft time-shared reception
data to appear on a 5-digit display, the time-
share converter logic must convert the 4-part
pulse signal (T1-T4) to a 5-part pulse signal
Ti1-Ti5).
NOTE:
The selected station ftequency in the FM mode moues up
or down the spectrum in l0ohHz steps in the SX-
D5000/KU model, and thus could be displayed using a
4-digit display, however the step change in the SX-
D5000/S/G model is 50hHz, necessitatinga S-digit display.
The same circuit is used in both models, consequently
the Sth digit on the SX-D5000/KU model isalways "0". In
the AM mode, the selected station frequency changes in
thHz steps and is displayed with four digits; the 5th digit
being extinguished during this mode.
Ftg. 4-L4 illustrates the configuration of the
time-share converter logic. The terminals 1G
thru 6G noted on the right side of the figure
are connected to the FL tube grids (See Fig.
4-13). When no time division pulses(T1-T4)
are present, the NAND gates 1 thru 4 (q47)
and the NOT gate (Q49) output P, Q, R, S,and
U respectively at a high level. Thus, Q5 thru Q9
are off; the FL tube grids are reverse-biased,
and no light is emitted.
Fig. 4-15 shows the time division pulse time
chart. The time division pulses U, S, R, Q,
and P shown in Fig. 4-75 arc applied to the
basesof Q5 thru Q9. One by one they become
active, providing dynamic time division drive
to the 5-digit display.
Fig.4-12 MemoryBackup
Power
SupplyCircuit