RCA RDR9000 User manual

RDR9000U/V Service
Manual

Foreword
This manual describes information relating to product repair.
To service the product properly, please read this manual carefully.
This manual covers the following model:
RDR9000
RDR9000 Service Manual

Disclaimer
The information in this manual is carefully examined and is believed to be entirely reliable.
However, no responsibility is assumed for inaccuracies. All the specifications and designs are
subject to change without notice due to continuous technology development. No part of this
manual may be copied, modified, translated, or distributed in any manner without the prior
written permission of the Company.
RDR9000 Service Manual

i
Contents
Document Information............................................................................................................ 1
1.Introduction......................................................................................................................... 2
2.Product Controls................................................................................................................. 3
3.Baseband Section............................................................................................................... 5
3.1 Power Section........................................................................................................... 5
3.1.1 Power Block Diagram...................................................................................... 5
3.1.2 Working Principle ............................................................................................ 6
3.2 Control Section.......................................................................................................... 7
3.2.1 Major Features................................................................................................ 7
3.2.2 Baseband Block Diagram................................................................................ 8
3.2.3 OMAPL-138 Reset.......................................................................................... 9
3.2.4 External Memory............................................................................................. 9
3.2.5 Interface Distribution ..................................................................................... 10
3.2.5.1 PLL Interface....................................................................................... 10
3.2.5.2 IF Processor Interface......................................................................... 10
3.2.5.3 DAC Interface...................................................................................... 10
3.2.5.4 RTC Interface...................................................................................... 10
3.2.5.5 MAC Interface......................................................................................11
3.2.5.6 USB Interface.......................................................................................11
3.2.5.7 Control Head Interface.........................................................................11
3.2.5.8 GPIO Interface.....................................................................................11
3.2.5.9 JTAG Interface .....................................................................................11
3.2.5.10 Rear Board Interface..........................................................................11
3.2.6 Clock............................................................................................................. 12
3.3 Audio Section .......................................................................................................... 13
3.3.1 Audio Scheme............................................................................................... 13
3.3.2 Audio Codec.................................................................................................. 14
3.3.3 Audio PA........................................................................................................ 16
RDR9000 Service Manual

ii
3.4 Control Head........................................................................................................... 17
3.4.1 Block Diagram............................................................................................... 17
3.4.2 Working Principle .......................................................................................... 17
3.4.3 MCU Reset.................................................................................................... 17
3.4.4 Key and Display Management ...................................................................... 17
3.5 Rear Board.............................................................................................................. 18
3.5.1 Block Diagram............................................................................................... 18
3.5.2 Working Principle .......................................................................................... 18
3.6 Troubleshooting Flow Chart..................................................................................... 19
4.Tuning Description............................................................................................................ 20
5.Interface Description......................................................................................................... 21
5.1 Internal Interface ..................................................................................................... 21
5.2 External Interface.................................................................................................... 27
6.UHF1 (400–470 MHz) Information.................................................................................... 29
6.1 Transmitter Circuit................................................................................................... 29
6.1.1 RF Power Amplifier Circuit ............................................................................ 29
6.1.2 Low-Pass Filter Circuit .................................................................................. 30
6.1.3 Auto Power Control Circuit............................................................................ 30
6.2 Receiver Circuit....................................................................................................... 31
6.2.1 Receiver Front-End....................................................................................... 31
6.2.2 Receiver Back-End........................................................................................ 32
6.3 FGU......................................................................................................................... 33
6.3.1 Working Principle of PLL............................................................................... 33
6.3.2 Working Principle of VCO.............................................................................. 34
6.3.3 Two-Point Modulation.................................................................................... 34
6.4 PCB View................................................................................................................ 35
6.5 Block Diagram......................................................................................................... 40
6.6 Schematic Diagram................................................................................................. 45
6.7 Parts List ................................................................................................................. 68
6.8 Troubleshooting Flow Chart................................................................................... 124
6.8.1 Receiver Circuit........................................................................................... 124
RDR9000 Service Manual

iii
6.8.2 Transmitter Circuit....................................................................................... 126
6.8.3 FGU............................................................................................................. 128
7.UHF3 (350-400 MHz) Information................................................................................... 130
7.1 Transmitter Circuit................................................................................................. 130
7.1.1 RF Power Amplifier Circuit .......................................................................... 130
7.1.2 Low-Pass Filter Circuit ................................................................................ 131
7.1.3 Auto Power Control Circuit.......................................................................... 131
7.2 Receiver Circuit..................................................................................................... 132
7.2.1 Receiver Front-End..................................................................................... 132
7.2.2 Receiver Back-End...................................................................................... 133
7.3 FGU....................................................................................................................... 134
7.3.1 Working Principle of PLL............................................................................. 134
7.3.2 Working Principle of VCO............................................................................ 135
7.3.3 Two-Point Modulation.................................................................................. 135
7.4 PCB View.............................................................................................................. 136
7.5 Block Diagram....................................................................................................... 141
7.6 Schematic Diagram............................................................................................... 146
7.7 Parts List ............................................................................................................... 169
7.8 Troubleshooting Flow Chart................................................................................... 226
7.8.1 Receiver Circuit........................................................................................... 226
7.8.2 Transmitter Circuit....................................................................................... 228
7.8.3 FGU............................................................................................................. 230
8.VHF (136-174 MHz) Information..................................................................................... 232
8.1 Transmitter Circuit................................................................................................. 232
8.1.1 RF Power Amplifier Circuit .......................................................................... 232
8.1.2 Low-Pass Filter Circuit ................................................................................ 233
8.1.3 Auto Power Control Circuit.......................................................................... 233
8.2 Receiver Circuit..................................................................................................... 234
8.2.1 Receiver Front-End..................................................................................... 234
8.2.2 Receiver Back-End...................................................................................... 235
8.3 FGU....................................................................................................................... 236
RDR9000 Service Manual

iv
8.3.1 Working Principle of PLL............................................................................. 236
8.3.2 Working Principle of VCO............................................................................ 237
8.3.3 Two-Point Modulation.................................................................................. 237
8.4 PCB View.............................................................................................................. 238
8.5 Block Diagram....................................................................................................... 243
8.6 Schematic Diagram............................................................................................... 248
8.7 Parts List ............................................................................................................... 271
8.8 Troubleshooting Flow Chart................................................................................... 323
8.8.1 Receiver Circuit........................................................................................... 323
8.8.2 Transmitter Circuit....................................................................................... 325
8.8.3 FGU............................................................................................................. 327
9.Disassembly and Assembly ............................................................................................ 329
9.1 Disassembly.......................................................................................................... 329
9.2 Assembly............................................................................................................... 332
10.Exploded View .............................................................................................................. 333
11.Packing Guide............................................................................................................... 336
12.Specifications................................................................................................................ 337
13.Appendix....................................................................................................................... 341
RDR9000 Service Manual

i
List of Figures
Figure 3-1 Power Block Diagram..................................................................................... 5
Figure 3-2 Baseband Block Diagram............................................................................... 8
Figure 3-3 Diagram of OMAP-L138................................................................................. 9
Figure 3-4 SPI Timing of SKY72310.............................................................................. 10
Figure 3- 5 Diagram of Clock Distribution...................................................................... 12
Figure 3-6 Diagram of Audio Section............................................................................. 13
Figure 3-7 Diagram of TLV320AIC29 ............................................................................ 14
Figure 3-8 SPI Timing between OMAPL-138 and TLV320AIC29 .................................. 15
Figure 3-9 Diagram of Audio PA Circuit......................................................................... 16
Figure 3-10 Diagram of Control Head ........................................................................... 17
Figure 3-11 Diagram of Rear Board .............................................................................. 18
Figure 6-1 Diagram of Transmitter Circuit ..................................................................... 29
Figure 6-2 Diagram of Receiver Circuit ......................................................................... 31
Figure 6-3 Diagram of IF Processor.............................................................................. 32
Figure 6-4 Diagram of FGU........................................................................................... 33
Figure 6-5 PCB View..................................................................................................... 39
Figure 6-6 Block Diagram.............................................................................................. 44
Figure 6-7 Schematic Diagram...................................................................................... 67
Figure 7-1 Diagram of Transmitter Circuit ................................................................... 130
Figure 7-2 Diagram of Receiver Circuit ....................................................................... 132
Figure 7-3 Diagram of IF Processor............................................................................ 133
Figure 7-4 Diagram of FGU......................................................................................... 134
Figure 7-5 PCB View................................................................................................... 140
Figure 7-6 Block Diagram............................................................................................ 145
Figure 7-7 Schematic Diagram.................................................................................... 168
Figure 8-1 Diagram of Transmitter Circuit ................................................................... 232
Figure 8-2 Diagram of Receiver Circuit ....................................................................... 234
Figure 8-3 Diagram of IF Processor............................................................................ 235
RDR9000 Service Manual

ii
Figure 8-4 Diagram of FGU......................................................................................... 236
Figure 8-5 PCB View................................................................................................... 242
Figure 8-6 Block Diagram............................................................................................ 247
Figure 8-7 Schematic Diagram.................................................................................... 270
Figure 10-1 Exploded View ......................................................................................... 333
Figure 11-1Packing Guide........................................................................................... 336
RDR9000 Service Manual

i
List of Tables
Table 5-1 TX&RX Board 8-Pin Connector (J2001)........................................................ 21
Table 5-2 TX Board J5001: to Control Head 20-Pin Connector (J101).......................... 22
Table 5-3 TX Board J5000: to Rear Board 26-Pin Connector (J1)................................. 23
Table 5-4 RX Board J5000: to Rear Board 26-Pin Connector (J2)................................ 24
Table 5-5 Control Head J3: to Rear Board 12-Pin Connector (J3)................................. 25
Table 5-6 Control Head J102: to LCD Display Connector ............................................. 26
Table 5-7 DB9 Rear Board Connector of the Repeater................................................. 27
Table 5- 8 DB15 Rear Board Connector of the Repeater .............................................. 27
Table 5-9 DB26 Rear Board Connector of the Repeater............................................... 28
Table 6-RDR9000arts List of ER9000 TX Board........................................................... 96
Table 6-RDR9000arts List of ER9000 RX Board ........................................................... 123
Table 7-RDR9000arts List of ER9000 TX Board............................................................ 198
Table 7-RDR9000arts List of ER9000 RX Board ........................................................... 225
Table 8-RDR9000arts List of ER9000 TX Board.............................................................297
Table 8-RDR9000arts List of ER9000 RX Board ........................................................... 322
Table 10-1 Repeater Parts List....................................................................................... 335
RDR9000 Service Manual

1
Document Information
This section describes notations used in manual and revision history of this document.
Instructional Notations
Notation
Description
Tip
Indicates information that can help you make better use of your
product.
Note
Indicates references that can further describe the related topics.
Caution
Indicates a potentially hazardous situation which, if not avoided,
might result in equipment damage or data loss.
Revision History
Version
Release Date
Description
R1.0
November 21, 2016
Initial release
R2.0
Aug 09, 2017
Modified receiver sensitivity parameters in
the Specifications section.
RDR9000 Service Manual

2
1. Introduction
Intended User
This manual is intended for use by qualified technicians only.
Warranty and Service Support
RCA offers long term support for its products. This support includes full exchange and/or
repair of the product during the warranty period, and service/repair or spare parts support out
of warranty.
Warranty Period and Return Instructions
RCA Communication Systems warrants the RCA manufactured products listed below
against defects in material and workmanship under normal use and service for a period of
time from the date of purchase as scheduled below:
Digital Repeaters
Two (2) Years
Accessories
One (1) Year
In instances where the product is covered under a “return for replacement” or “return for
repair” warranty, a check of the product should be performed prior to shipping the unit back
to RCA. This is to ensure that the product has been correctly programmed or has not been
subjected to damage outside the terms of the warranty.
Products should be shipped back in the original packaging, or correctly packaged to ensure
no damage occurs in transit.
After Warranty Period
After the warranty period, RCA continues to support its products in two ways.
1. RCA offers a repair service to both end users and dealers at competitive prices.
2. RCA supplies individual parts and modules that can be purchased by dealers who are
technically capable of performing fault analysis and repair.
RDR9000 Service Manual

Service Manual 2.Product Controls
3
2. Product Controls
Front Panel
No.
Part Name
No.
Part Name
1
Power Indicator
5
LCD Display
2
Alarm Indicator
6
Navigation Keys
3
RX Indicator
7
SET/EXIT Key
4
TX Indicator
8
Speaker
Rear Panel
No.
Part Name
No.
Part Name
1
RX Connector (BNC)
7
DB9 Connector
2
Ground Screw
8
DB26 Connector
3
AC Power Inlet and Switch
9
SMA Connector
4
LED Indicators
Green LED: Indicates
power supply is normal
when lit.
Blue LED: Indicates
overload or short circuit
occurs for the power
10
RJ45 Ethernet Connector

Service Manual 2.Product Controls
4
supply when lit.
Red LED: Indicates
reverse battery polarity
when lit.
5
DC Power Inlet/12V
Lead-acid Battery
11
TX or Duplexer Connector
(Type-N)
6
DB15 Connector

Service Manual 3. Baseband Section
5
3. Baseband Section
3.1 Power Section
3.1.1 Power Block Diagram
TX
FGU
Audio
Memory
CVDD
RVDD
DVDD3318
DDR_DVDD18
DVDD18
OMAP
-L138
9V3A
1V8D
1V8D
3V3D
1V2D
1V2D
5VFGU
EXT_VCC
Q1003\Q1004\U1007
Bettery
V+
LDO: 5V 300mA
LDO: 5V 300mA
LDO: 3.3V
300mA
LDO: 5V 300mA
LDO: 3.3V
300mA 3V3ARF
LDO: 3.3V
300mA
9V3A
5VA
3V3A
1V8D
3V3D
3V3DRF DAC
DCDC: 5V 3A
V+
Level Converter
5VD
DCDC: 1.2V
above 800mA
LDO: 3.3V
300mA
LDO: 1.8V
300mA 1V8D
3V3D
VDDCR
VDD/VDDIO
1.2V internal
3V3E PHY
Switch
LDO: 3.3V
300mA LDO: 1.2V 300mA RTC_CVDD
VRTC_3V
LDO: 3.3V
300mA
Active Regulator 5V
9V3A
1V2_RTC
5VA_RX
SN74AHCT594PWR
3V3D IO Expand
3V3DRF
1V2_RTC
3V3D
1V2D
1V8D
3V3E
5VD
Switch
Power
Control
Board
AC-DC
Converter 13.6V
13.6VDC
220VAC
FGU
RX
Memory
CVDD
RVDD
DVDD3318
DDR_DVDD18
DVDD18
OMAP
-L138
9V3A
1V8D
1V8D
3V3D
1V2D
1V2D
5VFGU
Q1003\Q1004\U1007
LDO: 5V 300mA
LDO: 5V 300mA
Switch 9V1_RX
5VA_RX
5VFGU
LDO: 3.3V
300mA 3V3DRF
LDO: 5V 300mA
LDO: 3.3V
300mA 3V3ARF
3V3ARF
5VA
3V3DRF DAC
DCDC: 5V 3A Level Converter
5VD
DCDC: 1.2V
above 800mA
LDO: 3.3V
300mA
LDO: 1.8V
300mA 1V8D
3V3D
Front Panel
LDO: 3.3V
300mA LDO: 1.2V 300mA RTC_CVDD
VRTC_3V
Active Regulator 5V
9V3A
1V2_RTC
5VD
SN74AHCT594PWR
3V3D IO Expand
3V3DRF
1V2_RTC
3V3D
1V2D
1V8D
5VD
Switch
Figure 3-1 Power Block Diagram

Service Manual 3. Baseband Section
6
3.1.2 Working Principle
100-240VAC power, after being converted to 13.6VDC in the AC-DC converter, passes
through the power control board and then feeds to the repeater. When AC power is
interrupted, an external lead-acid battery takes over supplying power to the radio. When AC
power recovers normal, the power control board feeds AC power to the repeater and charges
the backup battery at the same time. One line of power through the linear regulator circuit
outputs 9.3V, which is then tuned by LDO regulators, generates 3.3V and 5V to analog
circuits in the RF section. One line of power adjusted by the DCDC provides 5V to the DCDC
and various LDOs. The 1.2V DCDC outputs 1.2V to some modules in the digital circuit and
LDO regulators supply 3.3 V to various modules in the digital circuit. Another line of 5V power
feeds to the front panel via the external interface.

Service Manual 3. Baseband Section
7
3.2 Control Section
The control platform is composed of two OMAP-L138 processors for the repeater unit and the
MCU for the control head. The OMAP-L138 processor has a dual-core architecture which
incorporates an ARM926EJ-S core and a TMS320C674x DSP core.ARM926EJ-S is the main
controller, while TMS320C674xDSP is used for modulation/demodulation and voice
encoding/decoding. OMAP-L138 has powerful processing capacity at the maximum of 375
MHz operating frequency. Multiple interfaces are available on the processor for connecting to
various peripherals. Two OMAP-L138 processors allows parallel processing of TX/RX control
and data processing, provides powerful data processing and relay capacity, which ensures
high-speed service replay.
The MCU for the front panel is an ARM Cortex-M3 core and it works with a SDRAM memory
and a flash memory to control key operation, external data interface, and LCD display.
DC-DC and LDO regulators are adopted to generate appropriate power supply to the
hardware platform. The Class AB BTL amplifier is used to amplify the output audio signal.
3.2.1 Major Features
Sleep and system clocks
NOR flash and mobile DDRAM interface
LCM interface
PLL interface
IF processor interface
DAC interface
RTC interface
GPS interface
Bluetooth interface
Keypad interface
Tuning interface
GPIO interface
MAC interface
Audio input and output interface
Option board interface
Front panel interface

Service Manual 3. Baseband Section
8
3.2.2 Baseband Block Diagram
BR261
OMAP-L138B
ZWTA3 EMA
CLK
NOR Flash
512 Mbit
DAC
PLL
MCASP
(ACLKX)
UART0
USB0
GPIO
LCD
Backlight
JTAG
JTAG
RF Unit
Audio
PA
UART1
RTC 32768 Hz
Crystal
32768 Hz
AXR8/15
DDR MDDR
/RESETOUT RST OUT
SPI1 McBSP1
LPC1774FBD208
UARTA
TFT2.4
240*320 SDRAM NOR
Flash
Key
Encoder Switch
Backlight Control EMC
GPIO
Control Head INT SPK
MAC
RMII
GPIO
Audio Filter,
Amp, Switch
RST
19.2 MHz
Handset_audio
RX_audio
PA_audio
USB
USB
Switch
MAX803
Ext_mic
NOR Flash
IO Expand
RESET
/RESET WD_RST
TX/RX
CTRL VC-TCXO
Amp Filter
MOD_XO
To FGU
McBSP0
UART2
UART1 PTT
Ethernet
PHY
Ext_Mic Handset_Audio
RX_Audio
PA_Audio
DB26
Control IO
Switch
USB Switch
NX3DV42GU
EPWM0B
GPIO
IO Expand
(74AHC594)
INT_SPK
SPK1
SPK2
CODEC
IIS
Headset
Driver
ADC
CP_IN
GPIO
SPI1/2
SPI1 (CS0)
McBSP1 RX
OMAPL138BZWTA3
EMA
CLK
NOR Flash
512 Mbit
DAC
TLV5614
PLL
SKY72310
IF processor
AD9864
McBSP1 TX
MCASP
(ACLKX)
SPI
SSI
IO CTRL
GPIO
JTAG JTAG
RF Unit
SSI
RTC
32768 Hz
Crystal 32768 Hz
SPI1 (CS1)
DDR
MDDR
/RESETOUT
RST OUT
SPI1McBSP1
19.2 MHz
NOR Flash
IO Expand
RESET /RESET
RX
CTRL
VC-TCXO
Amp Filter
MOD_XO
To AD9864
To FGU
McBSP0
GPIO OMAP_SYNC
DB9
For GPS
PTT1
PTT2
RJ45
Transformer
Ext_Mic1 Slot1_Audio
Slot2/RX_Audio
PA_Audio
DB26
IO Expand
(Programmable IN/OUT)
DB26
Rear Board
LED Indicator
SPDT
Fan
Driver
EXT
PWR
EXT
PWR
FAN
USB
RS232
TS5A3159
SMA
CODEC
IIS
ADC
Ext_Mic2
Ext_Mic
BR261
Switch
AXR8/15
19.2 MHz CLK
From GPS Board
USB0
USB0
UART2
RS232
DB15
For BS Application
GPIOs To Rear
DB15, DB9
SPI
Expand
3GPIO
From Control Head MCU
IDC26
IDC10
IDC10
EXT
PWR
IDC10
Figure 3-2 Baseband Block Diagram
The overall control scheme for the repeater unit is described as follows:
ARM Processor: The ARM processor, being the core of the system control, controls
power supply and paths for various modules in the repeater unit, configures data for
some chips, parses and inserts software protocol stacks, and encodes/decodes channels.
In addition, this processor controls TCP/IP PHY modules and MCU for the control head.
DSP Processor: The DSP processor handles baseband signals, encodes/decodes voices,
and modulates/demodulates digital/analog signals.

Service Manual 3. Baseband Section
9
OMAP-L138 Dual-Core Processor
Figure 3-3 Diagram of OMAP-L138
3.2.3 OMAPL-138 Reset
OMAP-L138 is reset by the dedicated extended chip (U2003) and is active low.
3.2.4 External Memory
OMAP-L138 (U2000) provides two types of external memory interfaces: EMIFA and
DDR2/MDDR Controller.
EMIFA
EMIFA is an 8/16-bit interface and provides four 32 MB chip selects EMA_CS [5:2].This
interface supports connection to the NOR flash. NOR flash is mainly used to access program
and database.
DDR2/MDDR Controller
DDR2/MDDR controller is a 16-bit interface and provides one 512 Mbit (max.) chip select,
and it can connect up to eight banks. This interface supports MDDR and the latter is mainly
used to store intermediate data and move the flash program to run on it, speeding up radio
operation.

Service Manual 3. Baseband Section
10
3.2.5 Interface Distribution
3.2.5.1 PLL Interface
OMAP-L138 has SPI for connecting PLL SKY72310 (U7000) and this interface is controlled
by DSP. SKY72310 works in slave mode and its SPI timing is shown in Figure 3-4.
Figure 3-4 SPI Timing of SKY72310
3.2.5.2 IF Processor Interface
The IF processor AD9864 (U6002) is composed of two digital interfaces: SPI and SSI. SPI is
used to configure AD9864 and read configuration data. SSI is used to output I and Q
demodulation data and AGC data. AD9864 works in SPI slave mode and DSP works in SPI
master mode. SSI is connected to the RX end of McBSP1 on OMAP-L138, AD9864 works in
master mode, and DSP on OMAP-L138 works in slave mode.
3.2.5.3 DAC Interface
TLV5614 (U4000) is a 12-bit DAC that consists of four channels and provides a 4-wire serial
interface for connecting to the TX end of McBSP1on OMAP-L138. U4000 is controlled by
DSP and works in slave mode.
3.2.5.4 RTC Interface
The button cell (BT2000) is adopted to supply power to OMAP-L138 RTC, so that the RTC
will operate properly even if the battery is removed.