Renesas 8V19N850 User manual

Evalua
tion Board Manual
8V19N850
Applicable to part number, 8V19N850DNLGI
X0119393 Rev.1.0
Mar 25, 2021
Page 1
© 2021 Renesas Electronics
Description
This document describes the following topicsabout
the 8V19N850 evaluation board:
■Basic hardware and GUIset-up
■Board power-up instructions
■Instructions to get active output signals using a
provided configuration file.
■Hardware modifications require for different
conditions
Features
The EVB has SMAconnectors to relevant I/O ofthe
device:
■Two differential clock inputs
■Four differential digital outputs
■Five differential RF-PLL outputs
■Five SYSREF outputs (JESD204B/C)
■On-board EEPROM storesstartup-configuration
data
■Four GPIO controls
■Selectable output buffer voltage
■XO_DPLL and OSCI terminals can use laboratory
signal generator or OCXO/TCXO/XO components
and board
■Laboratory power supply connectors
■Serial port for configuration and register read out
Board Contents
■8V19N850 evaluation board
■EVB manual
■Configuration software (TCP file for Timing
Commander)
■Configuration example file for four built-in device
settings
■Board schematic and BOM
Computer Requirements
■Timing Commander Software installed
■8V19N850 GUI
■USB 2.0 or USB 3.0 Interface
■Windows XP SP3 or later
■Processor: Minimum 1GHz
■Memory: Minimum 512MB;recommended 1GB
■Available disk space:
●Minimum 600MB (1.5GB64-bit)
●Recommended 1GB (2GB 64-bit)
■Network access during installation if the .NET
framework is not currently installed on the system
Evaluation Board

8V19N850 Evaluation Board Manual
X0119393 Rev.1.0
Mar 25, 2021
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Contents
1. Functional Description.................................................................................................................3
1.1 Operational Characteristics....................................................................................................3
1.2 Hardware Setup and Configuration..........................................................................................3
1.3 GUI Setup and Configuration..................................................................................................6
1.3.1. Prepare the Software................................................................................................6
1.3.2. Bring Up the GUI......................................................................................................6
1.3.3. Configure the Evaluation Board..................................................................................9
1.4 Hardware Modification Options.............................................................................................11
1.4.1. Overdrive the OCXO (TCXO) with an External Signal Source.......................................11
1.4.2. Use the Onboard OCXO..........................................................................................12
1.4.3. Use the Onboard TCXO..........................................................................................13
2. Board Design............................................................................................................................14
2.1 Evaluation Board Images.....................................................................................................14
2.2 Layout Guidelines...............................................................................................................15
2.3 Schematic Diagrams...........................................................................................................16
2.4 Bill ofMaterials...................................................................................................................16
3. Ordering Information.................................................................................................................18
4. Revision History........................................................................................................................18
Figures
Figure 1. 8V19N850 EVB Hardware Connections.....................................................................................3
Figure 2. Timing Commander Download..................................................................................................6
Figure 3. Start Timing Commander..........................................................................................................6
Figure 4. Open Settings File...................................................................................................................7
Figure 5. Open Browser toSearch for .tcs File..........................................................................................7
Figure 6. Browse for .tcs File..................................................................................................................7
Figure 7. Browse for .tcp File..................................................................................................................8
Figure 8. TCP File................................................................................................................................8
Figure 9. Complete the TCP and TCS File Load........................................................................................8
Figure 10. Example SetupView..............................................................................................................9
Figure 11. Connect to the Board.............................................................................................................9
Figure 12. Write All Button.....................................................................................................................9
Figure 13. Initialization Dialog...............................................................................................................10
Figure 14. Relock Button.....................................................................................................................10
Figure 15. Default XO Input Schematic..................................................................................................12
Figure 16. Use On-boardOCXO to Drive the XO Input.............................................................................12
Figure 17. Use On-board TCXO to Drive the XO Input .............................................................................13
Figure 18. 8V19N850 EVB – Top View.................................................................................................14
Figure 19. 8V19N850 EVB – Bottom View.............................................................................................15

8V19N850 Evaluation Board Manual
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Mar 25, 2021
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1. Functional Description
The evaluation kit can be used to evaluate the 8V19N850, a fully integrated radio synchronizer and JESD204B/C
clock jitter attenuator. The kit can be used toevaluate major parameters including phase noise, spurious
attenuation, clockfrequency,output skew, phase alignment,device timing,and the signal waveform. The device
on the board accepts any input frequency from 1Hz to 1GHz. Locked to a selected input, the device PLLs
generate clock and SYSREF signals for converter reference frequency and data frame synchronization.
The 8V19N850 supports two independent frequency domains:one generates transport network clocks,such as
Ethernet frequencies at four outputs and the other one generates radio base station clocks at 12 outputs
(ADC/DAC reference clocks and SYSREF signals). Each frequency domain usesa DPLL forfrequency
translation, clock filtering,and jitter attenuation. The DPLLs provide a programmable bandwidth and a DCO
function for real-time frequency/phase adjustment.
1.1 Operational Characteristics
The board is equipped with on-board LDOs that require a 4V supply. The input power voltage should not exceed
5V. The board is designed to operate over the industrial temperature range from -40 to 85°C, ambient
temperature.
It is recommended that the person operating the board use proper grounding to avoid ESD damage to the EVB.
1.2 Hardware Setup and Configuration
Figure 1. 8V19N850 EVB Hardware Connections

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Mar 25, 2021
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Connect the board as shown in Figure 2. See more details below:
■Power connection:
●Set the power supply voltage to 4V and the current limitto 2.5A
●+4V (J50) = +4V
●GND (J51) = GND
■Expected currentdraw
●Rakon TCXO not populated: ~ 1.5A
●Rakon TCXO populated. Initial current draw will be ~2A and then it will drop down to ~1.7A (Rakon TCXO
draws about 250mA after it stabilizes.)
●After programming the device, depending on the configuration, ~1.1A to 1.7A during normal operation.
■USB/I2C Connection
●Connect the USB port (J55) to PC through USB Cable
■For proper functionality out of the box, the jumpers on board should be placed to allow the correct voltages at
each LDO and domain. The jumpers should be arranged as seen in Table 1.
Table 1. Default Jumper Configuration
Label/Function Jumper Default Orientation
XO Enable JP1 Not populated
OCXO_EN JP2 Not populated
TCXO_EN JP3 Not populated
U5 Enable JP4 4V-to-VREG &
VREG_EN-to-ON
U6 Enable JP5 4V-to-VREG &
VREG_EN-to-ON
VDD_RFPLL JP6 LDO_VDD_3V3
VDDK_RFVCO JP7 LDO_VDD_3V3
VDD_XO JP8 LDO_VDD_3V3
VDD_OSC JP9 LDO_VDD_3V3
VDD_APLL JP10 LDO_VDD_3V3
VDD_IMP
JP11
LDO_VDD_3V3
VDD_DCO1 JP12 LDO_VDD_3V3
VDD_DPLL1 JP13 LDO_VDD_3V3
VDD_DPLL JP14 LDO_VDD_3V3
VDD_SPI JP15 LDO_VDD_3V3
VDD_GPIO JP16 LDO_VDD_3V3

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Label/Function Jumper Default Orientation
U7 Enable JP17 4V-to-VREG &
VREG_EN-to-ON
U8 Enable JP18 4V-to-VREG &
VREG_EN-to-ON
U8 LDO VoltageSelection JP19 Not populated
U11 Enabled JP20 4V-to-VREG &
VREG_EN-to-ON
EEPROM External Connection
JP21
Not populated
SPI_SEL JP22 I2C
LVL_SHIFT_EN JP24 Not populated
GPIO_0 JP25 PD
GPIO_1 JP26 PU
EEPROM Pow er JP27 Not populated
Connect chipSDA to EEPROM JP28 Not populated
Connect chipSCLK toEEPROM JP29 Not populated
VDD_LCF
JP30
Not populated
VCSO_OE JP31 Not populated
VDDD_REF E1 LDO_VDDD_3V3
VDDD_Dx E2 LDO_VDDD_3V3
VDDO_R01 E3 LDO_VDDD_3V3
VDDO_R23 E4 LDO_VDDD_3V3
VDDO_R4 E5 LDO_VDDD_3V3
VDDO_R5 E6 LDO_VDDD_3V3

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1.3 GUI Setup and Configuration
1.3.1. Prepare the Software
1. Prior to execution of the GUI, the Timing Commander software must be downloaded and installed.
If Timing Commander is already installedon the computer, skipthis step.
2. Download the 8V19N850D_vx.tcp file from the 8V19N850 webpage.
3. Download and unzip the 8V19N850D_Example_Configuration_files.zip found on the 8V19N850 webpage.
These configurations match the four default configuration settings from the internal read-only storage spaces
that is specified by the GPIO pins 0, 1.
4. If Timing Commander is not yet installed,please download and install the software from the Timing
Commander webpage.
Figure 2. TimingCommander Download
5. Double click on the TimingCommanderSetup.exe file.
6. Follow the on-screen instructions.
1.3.2. Bring Up the GUI
1. After successfully installing the Timing Commander software, activate the software from the Windows
<start> menu at the bottomleft-corner of the screen.
2. Start > IDT> Timing Commander.
Figure 3. Start TimingCommander

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3. Click <Open Setting File>.
Figure 4. Open Settings File
4. Use the file browser button to locate the example tcsfile.
Figure 5. Open Browser to Searchfor .tcs File
5. Pick one ofthe example .tcs files from the folder and click “Open”.
Figure 6.Browsefor.tcsFile

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6. Use the file browser button to locate the 8V19N850D_V.x.tcp Timing Commander Personality (.tcp) file.
Figure 7. Browse for .tcp File
7. Select the .tcp file and click “Open”.
Figure 8. TCP File
8. Once the .tcp and .tcs files have been selected, clock the“Open” button.
Figure 9. Complete the TCPand TCS File Load

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9. The GUI will load the configuration file and the screen will look like the following screen.
Figure 10. Example Setup View
1.3.3. Configure the Evaluation Board
1. To establish communication between the EVB and the GUI, clickthe top right-corner chip logo.
Figure 11. Connectto the Board
2. Program the board by pressing the “WriteAll” button. Expect the outputs to activate.
Figure 12. Write All Button

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3. After the GUIsuccessfully connectsto the device, there will be an Initializationdialog that appears in the
diagram.
Figure 13. Initialization Dialog
4. Click the “Relock Write”button to see the 8V19N850 PLL lock and align the outputs.
Figure 14. Relock Button