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SGH-V206 CircuitDescription
4-6
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7.CSP1093
CSP1093 integratesthetiming and controlfunctionsforGSM2+mobile application withtheADCand DACfunctions.
TheCSP1093 interfacestothetrident,viaa16-bit parallel interface.Itservesastheinterface thatconnectsaDSP tothe
RFcircuitryinaGSM2+mobiletelephone.DSP canload 148 bitsofburstdataintoCSP1093’sinternalregister,and
programCSP1093’sevent timing and controlregisterwiththe exact timetosend theburst.Whenthetiming portion of
the event timing and controlregistermatchestheinternalquarter-bit counterand internalframe counter,the148 bitsin
theinternalregisterareGMSKmodulatedaccording toGSM2+standards.Theresulting phaseinformation istranslated
intoIand Qdifferentialoutputvoltagesthatcan be connected directlytoanRFmodulatorat theTXOPand TXON pins.
TheDSP isnotifiedwhenthetransmission iscompleted.For receiving baseband data,aDSP can programCSP1093’s
event timing and controlregisterwiththe exact timetostartreceiving Iand Qsamplesthrough TXIPand TXINpins.
Whenthat timeisreached,the controlportion ofthe event timing and controlregisterwill start thebaseband receive
section converting Iand Qsamplepairs.Thesamplesarestoredinadouble-bufferedregisteruntil theregistercontains
32 samplepairs.CSP1093 then notifiestheDSP which hasampletimetoreadtheinformation outbeforethenext32
samplepairsarestored.Thevoice band ADCconverterissuesaninterrupt totheDSP wheneverit finishesconverting a
16-bit PCMword.TheDSP thenreadsthenewinputsample and simultaneouslyloadsthevoice band outputDAC
converterwithanewPCMoutputword.Thevoice band outputcan be connected directlytoaspeakerviaAOUTAN and
AOUTAPpinsand be connectedtoaEar-micspeakerviaAOUTBNand AOUTBPpins.
8.X-TAL(13MHz)
This systemusesthe13MHzTCXO,TCO-9141B,Toyocom.AFCcontrolsignalformCSP1093 controlsfrequencyfrom
13MHzx-tal.Itgeneratesthe clockfrequency.Thisclockisinvertedthrough NOTgate,TC7S04FUand isconnectedto
CSP1093.13MHz clockforYMU759 usesanot-invertedclock.ClockforRFpartsuses sametype.
9.CameraDSP(LC99704B)
-Thischipset isMCPproduct thatcombinestheCCD Driverwith on-chip boostercircuit
and analogue/digitalmixed-signalprocessing IC.
Theboostercircuit generatethesupply voltagesrequiredforCCDdrive.
Camerascan use eithera +2.8Vor+3.0Vor+3.3Vonly powersupplysystem.
The analogue/digitalmixed-signalprocessing ICthat integratesthesignal-processing
functionsrequiredinaCCDdigitalcamera and arichsetofaddtionalfunctionson asingle
chip.Although theCDS(correlated dualsampling)and AGCcircuit requiredforanalog
processing and the clampcircuit requiredforA/Dconversion arenormally povided on
circuits,aswell asanA/Dconverter,on asingle chip.
Additionally,it alsoincludesthepulsegeneratorcircuitsrequiredforCCDdrive,the
logic circuitsforthe electronicsiris,and thedigitalsignal-processing circuitsrequiredto
createthedigitalYUV signaloutput.Thisdevice cantake advantageofthefeaturesof
thesedigitalsignal-processing functionsto provide autowhitebalance,automaticdropout
detection and correction,mirrorimageoutput,and asinglelineofmemoryto provide
flexibilityinthe external interface.
Thisdevice assumesaninternalmasterclockfrequencyintherange16 ~27 MHz.
Normally,eitheranexternalclockwiththatfrequencyisprovided,orelseamasterclock
oscillatorcircuit isconstructed using thebuilt-in oscillatorinvertercircuit.
And thisisalso possibletocontrol theCCDdriveinternaland enternal.