Sanyo LC85632 User manual

Ordering number : EN4659
O3098HA (OT)/71093JN B8-0531 No. 4659-1/34
LC85632
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
Digital Alarm Clock
CMOS IC
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
Overview
The LC85632 is a multi-function digital clock IC that in
addition to providing current time display supports a
wide range of functions, including an alarm function, a
sleep function, a calendar function, and a function to turn
connected equipment on and off. Furthermore, the
LC85632 provides a simpler user interface than that of
earlier Sanyo products.
Applications
• Alarm clocks
• Clock radios
Functions
• Current time display
• Two independent alarm functions with snooze function
• Sleep timer function (up to 90 minutes)
• Calendar function
One year calendar (January 1 to December 31) that can
display leap year’s day (February 29)
Package Dimensions
unit: mm
3196-DIP30SD
[LC85632]
SANYO: DIP30SD

LC85632
No. 4659-2/34
Pin Assignment

Pin Functions
Internal equivalent
No. Pin I/O circuit Pin function Handling when unused
1 AM & PM O LED output pins Open
2 10’SHRag & d O
3 10’SHRb & e O
4 10’SHRc & HRe O
5 HRb & g O
6 HRc & d O
7 HRa & f O
8 10’SMIN a & f O
9 10’SMIN b & g O
10 10’SMIN c & d O
11 10’SMINe & MINe O
12 MIN b & g O
13 MIN c & d O
14 MIN a & f O
15 COLON O
16 ALM INDICATOR O (VDD – 15 V breakdown voltage)
22 RADIO OUTPUT O Outputs a DC voltage. This pin is controlled by the inputs to Open
the MANUAL & SLEEP pin (pin 26). It operates as a toggle.
During normal operation it outputs a low level (high
impedance).
(Normal breakdown voltage)
23 ALM-A OUTPUT O Output alarm signals Open
24 ALM-B OUTPUT O ALM-A OUTPUT: Alarm A
ALM-B OUTPUT: Alarm B
The output waveform is shown below.
During normal operation these pins output a low level
(high impedance).
(Normal breakdown voltage)
Continued on next page.
LC85632
No. 4659-3/34
No. Pin Drive phase 1 Drive phase 2
1 AM & PM AM PM
2 10’SHR ag & d 10’SHR ad 10’SHR g
3 10’SHRb & e 10’SHR e 10’SHR b
4 10’SHRc & HRe HR e 10’SHR c
5 HRb & g HR g HR b
6 HRc & d HR d HR c
7 HRa & f HR f HR a
8 10’SMIN a & f 10’SMIN a 10’SMIN f
9 10’SMIN b & g 10’SMIN b 10’SMIN g
10 10’SMIN c & d 10’SMIN c 10’SMIN d
11 10’SMINe & MINe MIN e 10’SMIN e
12 MIN b & g MIN g MIN b
13 MIN c & d MIN d MIN c
14 MIN a & f MIN f MIN a
15 COLON COLON —
16 ALM INDICATOR ALM-A ALM-B
VDD
VDD
MANUAL & SLEEP pin input level
VDD
OPEN
VSS
VSS
RADIO OUT pin output level (when pulled down to VSS)
VDD
ALM-A OUTPUT and ALM-B OUTPUT pin output levels
(summary diagram)
* ALM-A OUTPUT (2400 Hz)
VDD
VSS
Output start
VSS
* ALM-B OUTPUT (1200 Hz)
VDD
VDD

LC85632
Continued from preceding page.
Internal equivalent
No. Pin I/O circuit Pin function Handling when unused
20 TIME SET INPUT 3I Input pin that starts the setting/update of the current time, Open
the alarm time, or the calendar date. Normally left open
(NOP).
The application of a high level is taken as a + input,
which increases the value of the setting, and a low is taken
as a – input, which decreases the value of the setting.
21 CAL DISP & 3I Input pin for calendar display and snooze. Open
SNOOZE Normally left open. When a high level is applied the
calendar displays the day and month, and when a low level
is applied the calendar displays the month and day.
However, if an alarm signal is being output from either
ALM-A OUTPUT or ALM-B OUTPUT (pin 23 or 24) the
calendar is not displayed, but rather a snooze operation is
started.
25 ALM-A/B DISP & SEL 3I Input pin for switching between alarm mode and current Open
time mode. Normally left open. When a high level is applied,
the current time setting for alarm A is displayed, and when
a low level is applied, the current time setting for alarm B is
displayed. In either case, the time setting and the operation
enable/disable state can be changed.
26 MANUAL & SLEEP 3I Input pin for setting the RADIO OUTPUT pin (pin 22) output Open
control and the sleep function time. Normally left open.
When a high level is applied the RADIO OUTPUT goes
high. This pin can also be used for setting the sleep
function time. When a low level is applied the RADIO
OUTPUT goes low. When either a low level or a high level
is applied, any alarm output in progress will be stopped.
Continued on next page.
No. 4659-4/34
VDD
H
L
H:
L:
High threshold
input
Low threshold
input
VDD
H
L
H:
L:
High threshold
input
Low threshold
input

Continued from preceding page.
Internal equivalent
No. Pin I/O circuit Pin function Handling when unused
28 MODE SELECT 3I Input pin for switching the operating mode. Either left open, connected
Switches the display mode and the clock input to the to VDD, or connected to
50/60 Hz INPUT pin (pin 27). ground.
High: 50 Hz/24 hour display
Open: 60 Hz/12 hour display
Low: 50 Hz/12 hour display
29 RT-TIME 3I Input pin for switching the enabled/disabled state for setting Open
SET/DIMMER the time.
Normally left open.
High: Current time display/current time setting mode
Open: Current time display/current time setting disabled
Low: Dimmed display/current time setting disabled
19 CR OSC I/O Connection pin for external RC circuit. Connected to VDD
An oscillator circuit with a frequency of 4800 Hz can be
formed using the following R and C values.
R = 68 kΩ
C = 4700 pF
17 VSS I — Power supply pins. —
30 VDD I VSS = 0 V
VDD = +5 V (standard)
18 TEST 3I LSI test pin. Open
Normally left open.
27 50/60 Hz INPUT I Input pin for the 50/60 Hz input for the clock.
(Schmitt input)
Note: •
“3I” is an abbreviation for “three value input pin.” The inputs to these pins can be either high, open, or low. These pins are left open during normal use.
• NOP: “No operation”
LC85632
No. 4659-5/34
VDD
H
L
H:
L:
High threshold
input
Low threshold
input
VDD
External RC constant circuit
VDD
H
L
H:
L:
High threshold
input
Low threshold
input

LC85632
Three Value Input Circuits: H: High level, M: Open, L: Low level, NOP: No operation
• MODE SELECT
Input level Mode
H 50 Hz/24 hour display
M 60 Hz/12 hour display
L 50 Hz/12 hour display
• TIME SET INPUT
Input level Mode
HUp
MNOP
L Down
• RE-TIME SET/DIMMER
Input level Mode
H Current time display/current time setting mode
M Current time display/NOP
L Dimmed display/NOP
• CAL DISP & SNOOZE
Input level Mode
H Calendar display (day·month)/calendar setting/snooze on
M Current time display/NOP
L Calendar display (month·day)/calendar setting/snooze on
• ALM-A/B DISP & SEL
Input level Mode
H Alarm A setting display/setting
M Current time display/NOP
L Alarm B setting display/setting
• MANUAL & SLEEP
Input level Mode
H ON input/sleep-in
M Current time display/NOP
L OFF input
• TEST
Input level Mode
H Illegal setting
M Normal operation
L LED test
No. 4659-6/34

Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V
Parameter Symbol Applicable pin Conditions Ratings Unit
Maximum power supply voltage VDDmax –0.3 to +7.0 V
Input voltage VIN(1) All input pins other than the –0.3 to VDD + 0.3 V
50/60 Hz INPUT pin
VIN(2) 50/60 Hz INPUT Pin voltage –0.3 to VDD + 0.3
With a 100 kΩcurrentlimiting VDD – 12 to VDD + 12
resistor inserted in the input, at
that resistor’s terminal.
Input clamping current IIN 50/60 Hz INPUT With a 100 kΩlimiting resistor –0.4 to +0.4 mA
inserted in the input.
Output voltage VOUT(1) CR OSC –0.3 to VDD + 0.3 V
Output voltage VOUT(2) RADIO OUTPUT –0.3 to VDD + 0.3 V
ALM-A OUTPUT
ALM-B OUTPUT
Output voltage VOUT(3) LED SEGMENT output pins VDD – 15 to VDD + 0.3 V
(pins 1 to 16)
Total output current ∑ILED Total for the LED The average value of the –280 to 0 mA
SEGMENT output pins effective current value within
(pins 1 to 16) a single display cycle
according to the 50 or 60 Hz
frequency.
Maximum power dissipation Pdmax Ta = –30 to +70°C 700 mW
Ambient temperature: operating Topr –30 to +70 °C
Ambient temperature: storage Tstg –55 to +125 °C
Allowable Operating Ranges at Ta = –30 to +70°C, VSS = 0 V
Ratings
Parameter Symbol Applicable pin Conditions min typ max Unit
Operating power supply voltage VDD 4.0 5.0 6.0 V
Input high level voltage VIH(1) CR OSC 0.75 VDD VDD V
Input low level voltage VIL(1) VSS 0.25 VDD V
Input high level voltage VIH(2) TIME SET INPUT The intermediate is the VDD – 0.5 VDD V
CAL DISP & SNOOZE open pin state.
Input intermediate level voltage VIM(2) ALM-A/B DISP & SEL The rated values apply 1/2 VDD – 0.5 1/2 VDD + 0.5 V
MANUAL & SLEEP when an external signal
MODE SELECT is applied.
Input low level voltage VIL(2) RT-TIME SET/DIMMER VSS VSS + 0.5 V
TEST
Input high level voltage VIH(3) 50/60 Hz INPUT VDD – 0.5 VDD + 0.3 V
Input low level voltage VIL(3) VSS VDD – 3.0 V
Operating frequency fOP 50/60 Hz INPUT 1 2000 Hz
Input level hold time tH All three value input pins 10 ms
Input chattering time tC All three value input pins 10 ms
LC85632
No. 4659-7/34

LC85632
Electrical Characteristics at Ta = 25°C, VDD = 5 V, VSS = 0 V
Ratings
Parameter Symbol Applicable pin Conditions min typ max Unit
Output high level current IOH(1) 10’ SHRag & d Output on, (Note 1) –32 mA
VOUT = VDD – 2.0 V
Output off leakage current IOF(1) Output off, –20 µA
VOUT = VDD – 12 V
Output high level current IOH(2) AM & PM Output on, (Note 2) –16 mA
10’SHRb & e VOUT = VDD – 2.0 V
10’SHRc & HRe
HRb & g
HRc & d
HRa & f
10’SMIN a & f
10’SMIN b & g
10’SMIN c & d
10’SMINe & MINe
MIN b & g
MIN c & d
MIN a & f
Output off leakage current IOF(2) COLON Output off, –20 µA
ALM INDICATOR VOUT = VDD – 12 V
Output high level current IOH(3) RADIO OUTPUT Output on, –2 mA
ALM-A OUTPUT VOUT = VDD – 2.0 V
Output off leakage current IOF(3) ALM-B OUTPUT Output off, –10 µA
VOUT = VSS
Input high level current IIH(2) CR OSC VIN = VDD 10 µA
Input low level current IIL(2) VIN = VSS –2 mA
Input high level current IIH(3) TIME SET INPUT VIN = VDD 10 100 µA
CAL DISP & SNOOZE
ALM-A/B DISP & SEL
Input low level current IIL(3) MANUAL & SLEEP VIN = VSS –100 –10 µA
MODE SELECT
RT-TIME SET/DIMMER
TEST
Pull-up resistance RPU TIME SET INPUT VIN = 1/2 VDD 1.0 MΩ
CAL DISP & SNOOZE
ALM-A/B DISP & SEL
Pull-down resistance RPD MANUAL & SLEEP 0.8 MΩ
MODE SELECT
RT-TIME SET/DIMMER
TEST
Oscillator stability fS CR OSC (Note 2) VDD = 5.0 V –10 +10 %
Oscillator precision fA CR OSC (Note 2) VDD = 5.0 V –10 +10 %
Oscillator frequency fOSC CR OSC R = 91 kΩ±1% 4800 Hz
C = 3300 pF ±5%
Initial reset power supply voltage VDET VDD Power supply voltage 2.5 4.0 V
VSS range when initial reset
operates.
Current dissipation (operating) IDD With no output load 2 mA
Note: 1. In addition to not exceeding the total output current ΣILED (from the absolute maximum ratings table), the segment output currents are allowed the
following values within a 700 mW total power dissipation range.
10’SHRag & d: Up to –78 mA
Others: Up to –39 mA
Current flowing out of the IC is expressed with negative values, and current flowing into the IC is expressed with positive values.
2. The total variation in the oscillator frequency will be the sum of the precision and the stability. That is, the limiting values for the oscillator frequency
variation fall within the range from fosc - 19% to fosc + 21%.
No. 4659-8/34

Functional Description
Segment Output
This IC can directly drive with its 16 segment pins duplex type LED panels that include colon and alarm indicators.
However, since the total value of the LED drive current (∑ILED) flowing into the LED panel is limited to its absolute
maximum value, caution is required in design.
Figure 1 shows the correspondence between the LC85632 segment outputs and the LED panel. For example, pin 2 (the
10’SHRag & d pin) drives the segments ‘a’, ‘g’, and ‘d’ in the 10’SHR digit. Table 1 shows the correspondence between
the drive phases and the segments that light.
Note that figure 1 is a generalized LED panel and not an exact representation of any particular product.
Figure 1 LED Panel and LED Segments
Table 1 Segment Lighting Correspondences for the Drive Phases
No. Pin Drive phase 1 Drive phase 2
1 AM & PM AM PM
2 10’SHRag & d 10’SHR ad 10’SHR g
3 10’SHRb & e 10’SHR e 10’SHR b
4 10’SHRc & HRe HR e 10’SHR c
5 HRb & g HR g HR b
6 HRc & d HR d HR c
7 HRa & f HR f HR a
8 10’SMIN a & f 10’SMIN a 10’SMIN f
9 10’SMIN b & g 10’SMIN b 10’SMIN g
10 10’SMIN c & d 10’SMIN c 10’SMIN d
11 10’SMINe & MINe MIN e 10’SMIN e
12 MIN b & g MIN g MIN b
13 MIN c & d MIN d MIN c
14 MIN a & f MIN f MIN a
15 COLON COLON —
16 ALM INDICATOR ALM-A ALM-B
LC85632
No. 4659-9/34

LC85632
Figure 2 shows the sections where LEDs are lit for each drive phase. This figure is based on the generalized drawing
shown in figure 1, and the shaded sections show the segments that are lit by the corresponding phase.
Figure 2 LED Sections Lit by the Drive Phases
No. 4659-10/34