Sony CDX-C4750 - Fm/am Compact Disc Player User manual

– 1 –
Model Name Using Similar Mechanism CDX-C480/C580
CD Drive Mechanism Type MG-363X-121
Optical Pick-up Name KSS-521A
SERVICE MANUAL
US Model
CDX-C4750
E Model
CDX-C6600
CDX-C4750/C6600
FM/AM COMPACT DISC PLAYER
MICROFILM
AUDIO POWER SPECIFICATIONS (US Model)
POWER OUTPUTAND TOTAL HARMONIC DISTORTION
17 watts per channel minimum continuous average power into
4 ohms, 4 channels driven from 20 Hz to 20 kHz with no more
than 1% total harmonic distortion.
Other Specifications
CD player section
System Compact disc digital audio
system
Signal-to-noise ratio 90 dB
Frequency response 10 – 20,000 Hz
Wow and flutter Below measurable limit
Laser Diode Properties
Material GaAlAs
Wavelength 780 nm
Emission Duration Continuous
Laser output power Less than 44.6 µW*
*This output is the value measured at a distance
of 200 mm from the objective lens surface on the
Optical Pick-up Block.
Tuner section
FM
Tuning range US model:
87.5 – 107.9 MHz
E model:
FM tuning interval:
50 kHz/200 kHz switchable
87.5 – 108.0 MHz
(at 50 kHz step)
87.5 – 107.9 MHz
(at 200 kHz step)
Antenna terminal External antenna connector
Intermediate frequency 10.7 MHz
Usable sensitivity 12 dBf
Selectivity 75 dB at 400 kHz
Signal-to-noise ratio 65 dB (stereo),
68 dB (mono)
Harmonic distortion at 1 kHz
0.7% (stereo),
0.5% (mono)
Separation 35 dB at 1 kHz
Frequency response 30 – 15,000 Hz
SPECIFICATIONS
Photo: CDX-C4750
AM
Tuning range US model:
530 – 1,710 kHz
E model:
AM tuning interval:
9 kHz/10 kHz switchable
531 – 1,602 kHz
(at 9 kHz step)
530 – 1,710 kHz
(at 10 kHz step)
Antenna terminal External antenna connector
Intermediate frequency 10.7 MHz/450 kHz
Sensitivity 30 µV
Power amplifier section
Outputs Speaker outputs
(sure seal connectors)
Speaker impedance 4 – 8 ohms
Maximum power output 40 W ×4 (at 4 ohms)
– Continued on next page –

– 27 – – 28 –
CDX-C4750/C6600
4-5. SCHEMATIC DIAGRAM — CD MECHANISM SECTION — • Refer to page 24 forWaveforms.
• Refer to page 41 for IC Block Diagrams.
note:
• Voltage and waveforms are dc with respect to ground
under no-signal conditions.
no mark :CD PLAY
∗: Impossible to measure
(Page 33)

CDX-C4750/C6600
– 33 – – 34 –
note:
• Voltage is dc with respect to ground under no-signal
(detuned) condition.
no mark : FM
( ) : AM
< > : CD PLAY
4-7. SCHEMATIC DIAGRAM — MAIN SECTION (1/2) — • Refer to page 43 for IC Block Diagrams.
(Page 35)
(Page 28)

IC801
MB90574PFV-G-193-BND
– 35 – – 36 –
CDX-C4750/C6600
note:
• Voltage is dc with respect to ground under no-signal
(detuned) condition.
no mark : FM
( ) : AM
< > : CD PLAY
4-8. SCHEMATIC DIAGRAM — MAIN SECTION (2/2) — • Refer to page 44 for IC Block Diagrams.
(Page 39)
(Page 34)

– 39 – – 40 –
CDX-C4750/C6600
note:
• Voltage is dc with respect to ground under no-signal
(detuned) condition.
no mark : FM
4-10. SCHEMATIC DIAGRAM — DISPLAY SECTION —
(Page 36)

– 41 – – 42 –
• IC Block Diagrams
IC1 CXD2507AQ
IC3 BA6796FP-T1
XLON
SPOD
SPOC
SPOB SPOA
CLKO
VDD
CNIN
SEIN
CLOK
XLAT
XLTO
DATO
52
53
5455
5657
58596061
62
63
64
51
SERVO AUTO
SEQUENCER
33
34
35
36
37
38
39
40
41
42
43
45
46
47
48
49
50
44
DATA
XRST
SENS
MUTE
SQCK
SQSO
EXCK
SBSO
SCOR
VSS
WFCK
EMPH
DOUT
C4M
FSTT
XTSL
XTAO
XTAI
MNTO
20 21 22 23 24 25 26 27 29 30 31 3228
LRCK
PCMD
BCLK
GTOP
XUGF
XPCK
VDD
GFS
RFCK
C2PO
XROF
MNT3
MNT1
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
13
14
15
FOK
MON
MDP
MDS
LOCK
TEST
FILO
FILI
PCO
VSS
AVSS
CLTV
AVDD
RF
BIAS
ASYI
ASYO
ASYE
WDCK
5
14
CPU
INTERFACE
SUB CODE
PROCESSOR
DIGITAL
CLV
EFM
DEMODULATOR
DIGITAL
PLL
ASYMMETRY
CORRECTOR
5D/A
INTERFACE
ERROR
CORRECTOR
3
6
3
16K
RAM
DIGITAL
OUT
CLOCK
GENERATOR
4
123 4 5678
9
10 11 12 13 14
OPOUT
CH4-IN
CH4
CTL1
CTL2
FWD
REV
TRAY
GND
CH3 –
CH5 –
COM
CH4 +
CH3 +
CH3-IN
CH3
VREF
CH2
CH2-IN
VCC
VCC
CH1 –
CH2 –
CH1-IN
OP IN –
CH1
CH1 +
OP IN +
CH2 +
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
LEVEL
SHIFT
LEVEL
SHIFT
LEVEL
SHIFT
LEVEL
SHIFT
THERMAL
SHUT
DOWN
15
161718
1920
21
22
23
2425
26
27
28
LOGIC
CTL1 CTL2 FWD REV
V/I
IC2 CXA1782BQ
36 35 34 33 32 31 30 29 28 27 26 25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
987
6
5
43
2
1
37
38
39
40
41
42
43
44
45
46
47
48
PHD 2 PHD 1
PHD
LD
RF O
RF I
CP CB CC1 CC2 FOK
SENS
C.OUT
XRST
DATA
XLT
CLK
VCC
ISET
SL O
SL M
SL P
TA O
TA M
FSET
TG2
TGU
SRCH
FE O
FLB
FGD
FDFCT
FE M
FEI
FEO
FE BIAS
F
E
EI
VEE
TED
LPFI
TEI
ATSC
TZC
TDFCT
VC
APC LEVEL S
FOK
MIRR
RF IV AMP1
RF IV AMP2
FE AMP
TTL
IIL
FZC COMP
DFCT
IIL
TTL
IIL DATA REGISTER INPUT SHIFT REGISTER
ADDRESS DECODER
OUTPUT DECODER
TTL
IIL
TOG1-3
BAL1-3
FS1-4 TG1-2 TM1-7 PS1-4
F IV AMP
E IV AMP
BAL1
BAL2
BAL 3
TE AMP
TZC COMP
DFCT
TM1
DFCT
FS4
ATSC
WINDOW COMP
TOG1 TOG2
TOG3
FCS PHASE
COMPENSATION
FS1
F SET
TG2
TM7
TM3
TM4
TM5
TM6
ISET
TRACKING
PHASE
COMPENSATION
HPF COMP LPF COMP
TG1
FS2
TM2
RF M

– 43 –
IC401 TDA7462D
IC702 PCM1717E-S
SE3L
SE3R
MUTE
SDA
SCL
PAUSE
OUT FL
OUT FR
OUT RL
OUT RR
SUBOUT+
SUBOUT–
VDD
GND
CREF
SE1L
SE1R
MD+
MD–
CDL+
CDL–
CDR–
CDR+
PDR
PDGND
PDL
SE2L
SE2R
INPUT
GAIN &
AUTO
ZERO
PAUSE
DETECT
INPUT MULTIPLEXER &
MIXING STAGE
REAR SIDE
SELECTOR FRONT SIDE
SELECTOR
LOUDNESS
CONTROL
CIRCUIT
INPUT
GAIN
BEEP
LOUDNESS
CONTROL
CIRCUIT
SOFT
MUTE
VOLUME
CONTROL
CIRCUIT
COMPANDER
TREBLE/
BASS
CONTROL
CIRCUIT
SUBWOOFER
OUT
FADER
SUBWOOFER
LP
IIC
BUS
DIGITAL CONTROL CIRCUIT
POWER
SUPPLY
FRONT
FADER
FRONT
FADER
REAR
FADER
REAR
FADER
VOICE BANDPASS
HP LP
SDA
SCL
1
2
3
4
5
6
7
8
9
10
11
12
13
14 15
16
17
18
19
20
21
22
23
24
25
26
27
28
3
4
5
6
7
18
19
20
17
16
15
14
8
9
10
13
12
11
2
1CLK
CONTROL
INPUT
INTERFACE
DIGITAL
FILTER
5LEVE DAC
LOWPASS FILTER
CMOS
AMP
5LEVEL DAC
LOWPASS FILTER
CMOS
AMP
MODE
CONT
ROL
XTI
DGND
VDD
LRCIN
DIN
BCKIN
ZERO
D/C R
VOUTR
AGND VCC
VOUTL
D/C L
MODE
RSTB
MD/DM0
MC/DM1
ML/MUTE
CLKO
XTO
NOISE SHAPER
IC803 BA8270F-E2
1
2
3
4
5
6
7 8
9
10
14
13
12
11
BUS ON
SWITCH
RESET
SWITCH
BATTERY
SWITCH
BUS ON
RST
BATT
CLK
VREF
DATA
GND
VCC
RST
BUS ON
CLK IN
BU IN
DATA IN
DATA OUT

– 44 –
IC601 TDA7427AD1
IC901 BA4903
SWITCH
LP1/LP2
PORT
EXTENSION
CHARGE
PUMP
TEST
LOGIC
16 BIT PROG
COUNTER
REF
OSCILLATOR
TIMER CONTROL SWITCH
OUT
SUPPLY
&
POWER ON
RESET
11-21 BIT PROG COUNTER
14 BIT PROG
COUNTER
SWITCH
AM/FM
PHASE
COMP
INLOCK
DETECTOR
11 BIT PROG
COUNTER
SWITCH
SWM/DIR
6 BIT PROG
COUNTER
SWITCH
SWM/DIR
PRE COUNTER
:32/33
I
2
C BUS
INTERFACE
SWITCH
AM/FM
VDD1
1
2
3
4
6
7
8
5
9
10
11
14
12
13
17
18
19
20
21
22
23
24
25
26
27
28
16
15
LP FM
LP HC
LP AM
V REF
LCL/DX
SEEK
NIL
MONO
OSCIN
OSCOUT
NC
SCL
SDA
IF AM
LPOUT
VDD2
GND AM
AM IN
FM IN
NC
GND D
VDD1
ADDR
HFREF
AMOSC
DOUT/INLOCK
SSTOP
IF FM
REGULATOR
VREF
+– +–
THERMAL
SHUT
DOWN
OVER
VOLTAGE
PROTECT
CIRCUIT ON
51 2 3 4
AMP
ON AMP OUT GND VCC VDD OUT
ON ON
5.7V

– 45 –
4-11. IC PIN DESCRIPTION
• IC801 MB90574PFV-G-193-BND (SYSTEM CONTROL)
Pin No. Pin Name I/O Pin Description
1 LD ON O Laser ON/OFF control output
2 FOK I Focus OK signal detection input
3 XLAT25 O CD signal processing latch output
4 DATA25 O CD signal serial data output
5 XRST O Reset output to CD signal processor IC.
6 GFS I GFS signal detection input
7 NIL — Not used. (Connect to ground in this set.)
8 VCC — Power supply pin (+5V)
9 – 11 NIL — Not used. (Open)
12 FLS SI/NOSE1 I Front panel attachment detection input
13 LCD SO/FLS SO O LCD serial data output
14 LCD CKO O LCD serial clock output
15 BEEP O BEEP output
16 NIL — Not used. (Open)
17 SQ SI I Sub Q data input
18 NIL — Not used. (Connect to ground in this set.)
19 SQ CKO O Sub Q read clock output
20 UNI SI I BUS system serial interface input
21 UNI SO O BUS system serial interface output
22 UNI CK I/O BUS system serial clock input/output
23 C IN I Track jump No. count input
24 SIRCS I Remote commander input
25 TXT SI I CD-TEXT data input
26 NIL — Not used. (Connect to ground in this set.)
27 TXT CKO O CD-TEXT data read clock output
28 CLOK25 O CD signal processing serial clock output
29 SYSRST O System reset output
30 DEEMPH O De-emphasis output
31 AMP ATT O Power amplifier attenuator control output
32 MD ON O CD mechanism power control output
33 VSS — Ground
34 C — Power stabilization capacitor pin
35 CD ON O CD power control output
36 BUS ON O BUS ON control output
37 AD ON O Power control output ofA/D conversion.
38 DVCC — VREF input of D/A converter.
39 DVSS — Ground of D/A converter.
40 NIL — Not used. (Open)
41 ANGLE O LCD view angle alignment output (Not used in this set.)
42 AVCC — Analog power supply pin (+5 V)
43 AVRH — VREF + input of A/D converter.
44 AVRL — VREF – input of A/D converter.
45 AVSS — Analog ground
46 – 48 KEY IN0 – 2 I Key input 0 – 2
49 RC IN0 I Rotary commander input 0
50 QUALITY I Not used in this set.
51 NIL — Not used. (Connect to ground in this set.)
52 MPDH I Tuner multi path input (Not used in this set.)
53 S-METER I S-meter voltage detection input
54 VCC — Power supply pin (+5 V)
55 NS MASK O Not used in this set.

– 46 –
Pin No. Pin Name I/O Pin Description
56 AMP ON O Power amplifier power control output
57 TXT ON O Reset output to CD-TEXT decoder IC. (Not used in this set.)
58 VOL ATT O Electric volume mute control output
59 NIL — Not used. (Open)
60 ATT O System attenuate control output
61 RC IN1 I Rotary commander shift key input 1
62 TU ATT O Tuner attenuate output (Not used in this set.)
63 VSS — Ground
64 NIL — Not used. (Open)
65 SSTOP I IF counter result signal detection input of PLL.
66 TEST I Test mode initial setting detection input
67 DAVN I RDS IC data acquisition detection input (Fixed at “L” in this set.)
68 FM ON/AM ON O FM ON output
69 TU ON O Tuner power control output
70 SDA I/O I2C BUS serial data input/output
71 SCL O I2C BUS serial clock output
72 NOSE2 I Front panel OPEN detection input (Not used in this set.)
73 X1A O Sub ceramic oscillator output (32 kHz)
74 X0A I Sub ceramic oscillator input (32 kHz)
75 SCOR I SCOR signal detection input
76 BU IN I Backup power detection input
77 DQSY I CD-TEXT data setting completion signal detection input
78 CD SENS I CD SENS signal detection input
79 KEY ACK I Key input acknowledge
80 TEL ATT I Telephone attenuate detection input
81 ST/MONO I/O Tuner stereo signal detection input/forced monaural output
82 SEEKOUT O SEEK output
83 SD IN I Signal detector input
84 WIDE O WIDE/NARROW select output (Not used in this set.)
85 NARROW O WIDE/NARROW select output (Not used in this set.)
86 HSTX — Hardware standby input (Connect to pin (º (RESET).)
87 MD2 — Operation mode input (Connect to ground in this set.)
88, 89 MD1, 0 — Operation mode input (Connect to VCC in this set.)
90 RESET I Reset input
91 VSS — Ground
92 X0 I Main ceramic oscillator input (4.19 MHz)
93 X1 O Main ceramic oscillator output (4.19 MHz)
94 VCC — Power supply pin (+5 V)
95 COM8V ON O COM 8V control output
96 NIL — Not used. (Open)
97 AREA1 I Destination select input 1 (Fixed at “L” (CDX-C4750) or “H” (CDX-C6600) in
this set.)
98 AREA2 I Destination select input 2 (Fixed at “L” (CDX-C6600) or “H” (CDX-C4750) in
this set.)
99 AREA3 I Destination select input 3 (Fixed at “L” in this set.)
100 BAND I Frequency select input (CDX-C6600)
101 ACC IN I Accessory power detection input
102, 103 PH3, 2 I Disc insertion detection photo sensor input (Not used in this set.)
104 LCD CE O LCD chip enable output
105 FLS W I Flash write input (Fixed at “H” in this set.)
106, 107 RE IN0, 1 I Rotary encoder input
108 ILL ON O Illumination power control output
109 PW ON O System power control output

– 47 –
Pin No. Pin Name I/O Pin Description
110 NIL — Not used. (Open)
111 ANT REM O ANT REMOTE power control output
112, 113 NIL — Not used. (Open)
114 CD LD O Loading motor control output (Loading direction)
115 CD EJ O Loading motor control output (Eject direction)
116 L SW I Sled limit switch detection input
117 IN SW/(PH1) I Disc insertion detection input
118 D SW I DOWN switch detection input
119 VSS — Ground
120 SELF SW/(IN SW) I Disc self store detection input