Sony HCD-V5500 User manual

HCD-V5500
E Model
Chinese Model
SERVICE MANUAL
STEREO CASSETTE DECK CD PLAYER
MICROFILM
Model Name Using Similar Mechanism HCD-V8800
CD CD Mechanism Type CDM38-5BD21
Section Base Unit Name BU-5BD21
Optical Pick-up Type KSS-213B/S-N
Tape deck Model Name Using Similar Mechanism HCD-V8800
Section Tape Transport Mechanism Type TCM-220WR2E
Manufactured under license from Dolby Laboratories
Licensing Corporation.
“DOLBY” and the double-D symbol aare trademarks
of Dolby Laboratories Licensing Corporation.
SPECIFICATIONS
• HCD-V5500 is the deck, CD section
in MHC-V5500/V7700AV.
VIDEO CD/CD player section
System Compact disc and digital
audio system
Laser Semiconductor laser
(λ=780nm)
Emission duration:
continuous
Laser output Max.44.6 µW*
*This output is the value
measured at a distance of
200 mm from the
objective lens surface on
the Optical Pick-up Block
with 7 mm aperture.
Audio
Frequency response 2 Hz - 20 kHz(±0.5 dB)
Wavelength 780 - 790 nm
Signal-to-noise ratio More than 90 dB
Dynamic range More than 90 dB
Video
Color system format NTSC, PAL
CD OPTICAL DIGITAL OUT
(Square optical connector jack, rear panel)
Wavelength 600 nm
Output Level –18 dBm
Tape player section
Recording system 4-track 2-channel stereo
Frequency response 60 - 13,000 Hz (±3 dB),
(DOLBY NR OFF) using
Sony TYPE I cassette
60 - 14,000 Hz (±3 dB),
using Sony TYPE II
cassette
Design and specifications are subject to change
without notice.

— 2 —
TABLE OF CONTENTS
1. SERVICING NOTE ······················································ 3
2. GENERAL ······································································ 4
3. DISASSEMBLY
3-1. Back Panel, CD Block Removal········································· 5
3-2. Cassette Lid (A)/(B) Assy, Mechanism Deck Removal ···· 5
3-3. Main Board, Resistor Board, Video Board,
Video In Board, Front Panel Assy Removal ······················· 6
4. TEST MODE ·································································· 7
5. ADJUSTMENTS
5-1. Mechanical Adjustment ······················································ 8
5-2. Electrical Adjustment ························································· 8
6. DIAGRAMS
6-1. Block Diagram — CD Section — ···································· 13
6-2. Block Diagram — Video Section — ································ 15
6-3. Block Diagram — Deck/System Control Section — ······· 17
6-4. Circuit Boards Location ··················································· 19
6-5. Schematic Diagram — Audio Section —························· 20
6-6. Printed Wiring Board — Audio Section — ······················ 23
6-7. Printed Wiring Board — Video Section — ······················ 26
6-8. Schematic Diagram — Video Section — ························· 29
6-9. Schematic Diagram — Main Section — ·························· 33
6-10. Printed Wiring Board — Main Section — ······················· 37
6-11. Printed Wiring Board — CD Panel Section — ················ 40
6-12. Schematic Diagram — CD Panel Section — ··················· 43
6-13. Printed Wiring Board — BD Section — ·························· 45
6-14. Schematic Diagram — BD Section — ····························· 47
6-15. Schematic Diagram — Motor Section — ························ 49
6-16. Printed Wiring Board — Motor Section —······················ 51
6-17. IC Block Diagrams ···························································53
6-18. IC Pin Functions ·······························································57
7. EXPLODEDVIEWS
7-1. MAIN SECTION ····························································· 69
7-2. FRONT PANEL SECTION··············································70
7-3. CD MECHANISM DECK SECTION
(CDM38-5BD21) ····························································· 71
7-4. CD MECHANISM DECK SECTION-2
(CDM38-5BD21) ····························································· 72
7-5. BASE UNIT SECTION (BU-5BD21) ····························· 73
7-6. TAPE MECHANISM DECK SECTION-1
(TCM-220WR2E) ···························································· 74
7-7. TAPE MECHANISM DECK SECTION-2
(TCM-220WR2E) ···························································· 75
8. ELECTRICAL PARTS LIST ··································· 76

— 3 —
SECTION 1
SERVICING NOTE
SELF-DIAGNOSIS
This model has the self-diagnosis function for the VIDEO and
AUDIO decoder sections.
Immediatelyafterthepoweron, theself-diagnosis function searches
eachoperation ofIC’saround themechanism controlmicrocomputer
(IC701).
The results can be checked by connecting an oscilloscope toTP709
(LED) of the VIDEO board. Note: The LED for check (D701) is mounted to some sets
(FORMER TYPE). In this case, confirm the lighting
condition of LED.
[VIDEO BOARD] (SIDE A)
[VIDEO BOARD] (SIDE B)
Oscilloscope (Waveform) Symptom
No error
External SRAM (IC751)
error
MPEG decoder (IC201)
error
DRAM (IC251)
error
H
L
Light
H
L
1 time blinking
H
L
2 time blinking
H
L
3 time blinking
VIDEO board
TP709 (LED)
Oscilloscope
+
_
D701
IC771
TP709 (LED) X901
IC751 IC251

— 4 —
SECTION 2
GENERAL
1DISC SKIP EX-CHANGE Button
(CD)
20Button (CD)
3PREV Button (CD)
4NEXT Button (CD)
5)Button (CD)
6RETURN Button (CD)
7DISC 1 Button (CD)
8DISC 2 Button (CD)
9DISC 3 Button (CD)
!º SELECT Button (CD)
!¡ 6OPEN/CLOSE Button (CD)
!™ ·P CD NON-STOP Button (CD)
!£ pButton (CD)
!¢ ·Button [B] (DECK)
!∞ ªButton [B] (DECK)
!§ πButton [B] (DECK)
!¶ )Button [B] (DECK)
!• 0Button [B] (DECK)
!ª DIRECTION MODE Button
(DECK)
@º PAUSE Button (DECK)
#º
#¡
#™ #£ #¢ #∞
12 5 7 8 9 !¡
!™
!£
!¢
!∞
!§
!¶
!•
!ª
@º
@¡
@™
@£
@¢
@∞
@§
@¶
@•
@ª
346!º
@¡ REC Button (DECK)
@™ HI-SPEED DUBBING Button
(DECK)
@£ CD SYNCHRO Button (DECK)
@¢ DOLBY NR Button (DECK)
@∞ )Button [A] (DECK)
@§ 0Button [A] (DECK)
@¶ πButton [A] (DECK)
@• ªButton [A] (DECK)
@ª ·Button [A] (DECK)
#º OPTICAL DIGITAL OUT
#¡ SYSTEM CONTROL CONNECTOR
#™ SYSTEM SELECT SWITCH
#£ VIDEO IN JACK
#¢ MONITOR OUT JACK
#∞ S VIDEO JACK

— 5 —
SECTION 3
DISASSEMBLY
Note : Follow the disassembly procedure in the numerical order given.
CASE
Unscrew the fivecase attachmentinthe screws (case)
(M3 ×8) ×4, (+BV 3 ×8) ×1 and remove the case.
3-1. BACK PANEL, CD BLOCK REMOVAL
8 Screw
+BVTP 3
× 10
1 Screw
+BVTP 3
× 1
0
1 Screw
+BVTP 3
× 10
7 Screw
+BVTP 3
× 10
6 CN111 (8 pin)
5 CN112 (9 pin)
4 Flat wire (19 core)
9 CD block
3 Back panel
2 Screw
+BVTP 3
× 8
3-2. CASSETTE LID (A)/(B) ASSY, MECHANISM DECK REMOVAL
1 Press the EJECT button and open the cassette lid.
6 Screw
+BVTT 3
× 8
7 Screw
+BVTP 2.6
× 8
4 Flat wire (11 core)
5 Flat wire (21 core)
Mechanism Deck (TCM-220WR2E)
2
8
1
1
3

— 6 —
3-3. MAIN BOARD, RESISTOR BOARD,VIDEO BOARD,VIDEO IN BOARD,
FRONT PANEL ASSY REMOVAL
!£ Screw
+BVTP 3
× 8
2 Front panel assy
!§ Screw
+BVTP 3
× 8
1 Screw
+BVTP 3
× 8
!¢ Bracket (H/S)
!∞ Resistor board
!¶ Main boar
d
6 Screw
+BVTP 3
× 10
3 Screw
+BVTP 3
× 10
7 Bracket V (T)
9 VIDEO board
8 Screw
+BVTP 3
× 8
5
!º Screw
+BVTP 3
× 8
4
!¡ VIDEO IN board
!™ Bracket (BP)
7 Bracket V (B)
• Tray (Slide) getting out procedure on the power supply is OFF
Rotate the BU CAM assembly in the direction of the arrow and pull out the slide.
Tray (Slide)
1
BU CAM assy

— 7 —
SECTION 4
TEST MODE
VIDEO CD COLOR-BARS MODE
On this mode, the data of the color-bars signal as a picture signal
and the 1kHz sine wave signal as a sound signal are output by the
mechanism control microcomputer (IC701) for video CD signal
check. When measurement of the voltage and waveform on the
VIDEO board, perform it in this mode.
For reference, the color-bars signal can be observed at J9001
(VIDEO OUT) and the sound signal can be observed at J101
(VIDEO (AUDIO) OUT) using an oscilloscope.
1. Connect the lead wire to both ends of the land of SL701 (CAL
BAR) of the VIDEO board.
2. Turn the power on. Press FUNCTION button to select CD.
3. After 2 or 3 seconds later, connect the lead wire.
4. After measuring, remove the lead wire connected.
Note : The 1kHz sine wave is not outputted when the CD is played
once, but it is not error.
SL703 (AFADJ)
SL702 (ADJ)
SL701 (CAL BAR)
IC751 IC251
[VIDEO BARD ] (SIDE B)

— 8 —
SECTION 5
ADJUSTMENTS
5-1. MECHANICAL ADJUSTMENT
PRECAUTION
1. Clean the following parts with a denatured-alcohol-moistened
swab:record/playback head pinch roller
erase head rubber belts
capstan idlers
2. Demagnetize the record/playback head with a head
demagnetizer.
3. Do not use a magnetized screwdriver for the adjustments.
4. After the adjustments, apply suitable locking compound to the
parts adjusted.
5. The adjustments should be performed with the rated power
supply voltage unless otherwise noted.
•Torque Measurement
•Tape Tension Measurement
5-2. ELECTRICAL ADJUSTMENT
1. The adjustment should be performed in the publication.
(Be sure to make playback adjustment at first.)
2. The adjustmentand measurementshould beperformed forboth
L-CH and R-CH.
• Switch position
DOLBY NR switch : OFF
FUNCTION button : OFF
EFFECT switch : OFF
DBFB switch : OFF
3. Deck section electrical adjustments are made in test mode by
press key switch same time CD STOP DECKA STOP and
DECK B STOP button.
4. Input point and output level measurement point.
• Test Tape
0 dB=0.775V
Record/Playback Head Azimuth Adjustment
DECK A DECK B
Procedure:
1. Forward Playback mode
Reverse Playback mode
Mode Torque Meter Meter Reading
Forward CQ-102C 36 to 61g•cm
(0.50 – 0.84 oz•inch)
Forward CQ-102C 2 to 6g•cm
Back Tension (0.028 – 0.083 oz•inch)
Reverse CQ-102RC 36 to 61g•cm
(0.50 – 0.84 oz•inch)
Reverse CQ-102RC 2 to 6g•cm
Back Tension (0.028 – 0.083 oz•inch)
FF, REW CQ-201B 61 to 143g•cm
(0.85 – 1.99 oz•inch)
Mode Tension Meter Meter Reading
Forward CQ-403A more than 100 g (3.53 oz)
Reverse CQ-403R more than 100 g (3.53 oz)
DECK SECTION
Tape Signal Used for
P-4-A100 10 kHz, –10 dB Head Azimuth Adjustment
P-4-L300 315 Hz, 0dB Level Adjustment
WS-48B 3 kHz, 0dB Tape Speed Adjustment

— 9 —
2. Turn the adjustment screw for the maximum output levels. If
these levels do not match, turn the adjustment screw until both
of output levels match together within 1 dB.
3. Playback Mode
4. Change the playback mode and repeat the steps 1 to 3.
5. After the adjustment, lock the adjustment screw with suitable
locking compound.
Adjustment Location:
— Record/playback head (DeckA and B) —
Tape Speed Adjustment DECK A DECK B
Note: Start the Tape Speed adjustment as below after setting to the
test mode.
Set to test mode. (Press key switch same time CD STOP
DECK A STOP and DECK B STOP button.)
Test mode off. (Power off.)
Procedure:
• Perform high speed adjustment before normal speed adjustment.
Mode: Playback
* Continue to press HIGH SPEED DUBBING switch (S259) in
playback mode : High speed playback.
Frequency difference between the beginning and the end of the
tape should be within ± 3%.
Frequency difference between deck A and deck B the beginning
of the tape should be within 1.5 %.
Adjustment Location: AUDIO board (See page 10)
SampleValue of Wow and flutter
W.RMS (JIS) within 0.3%
(test tape: WS-48B)
Playback level Adjustment DECK A DECK B
Procedure:
— FWD playback Mode —
Deck A is RV311 (L-CH) and RV411 (R-CH), Deck B is RV301
(L-CH) and RV401 (R-CH) so that adjustment within adjustment
level as follows.
Adjustment Level:
LINE OUT level : –8.2 to –7.2 dB (301.5 to 338.3 mV)
Level Difference between Channels : within 0.5 dB
Confirm the OUTPUT level does not change in playback mode
while changing the mode from playback to stop several times.
Adjustment Location: AUDIO board (See page 10)
Speed
*High
Normal
Deck
A
B
A
B
Adjustment
RV652
RV652
RV651
RV651
Frequency counter
5,910 to 6,090 Hz
2,910 to 3,090 Hz
+
–
VTVM
set
test tape
P-4-L300
(315 Hz, 0 dB)
Output level measurement poin
t
(See page 8)

— 10 —
Record Bias Adjustment DECK B
Procedure:
1. Record mode
2. Mode: Playback
3. Confirm playback the signal recorded in step 1 become
adjustment level as follows.
4. If these levels do not adjustment level, adjustment the RV341
(L-CH) and RV441 (R-CH) to repeat steps 1 and 4.
Adjustment level: Playback output of 315 Hz to playback output
of 10 kHz: 0 ± 1.0 dB (0 ± 4.5mV).
Adjustment Location: AUDIO board
Record Level Adjustment DECK B
Procedure:
1. Record mode
2. Playback mode
3. Confirm playback the signal recorded in step 1 become
adjustment level as follows.
4. If these levels do not adjustment level, adjustment the RV401
(L-CH) and RV451 (R-CH) to repeat steps 1 and 4.
Adjustment Level:
OUTPUT level: –23.8 dB ± 1.0 dB (56.1 to 44.6 mV)
Adjustment Location: MAIN board
Adjustment Location :
[AUDIO BOARD] — Component Side —
[MAIN BOARD] — Component Side —
RV451 Record Level (R
)
RV401 Record Level (L)
CNB108
attenuator
set
1) 315 Hz
2) 10 kHz 50.1mV (–23.8dBs)



blank tape
CS-123
AF OSC
Input point (See page 8)
RV301 : Playback Level (Deck B L-CH)
RV401 : Palyback Level
(Deck B R-CH) RV651 :Tape Speed (Normal)
RV341 : Record Bias (L-CH)
RV441 : Record Bias (R-CH)
RV652 :Tape Speed
(Hight)
RV311 : Playback Level
(Deck A L-CH)
RV411 : Playback Level (Deck A R-CH)

— 11 —
RF Level Check
Procedure :
1. Connect oscilloscope to test point TP (RF) on BD board.
2. Turned Power switch on.
3. Put disc (YEDS-18) in to play the number five track.
4. Confirm that oscilloscope waveform is clear and check RF
signal level is correct or not.
Note : A clear RF signal waveform means that the shape “◊” can
be clearly distinguished at the center of the waveform.
RF signal waveform
CD SECTION
Note :
1. CD Block is basically designed to operate without adjustment.
Therefore, check each item in order given.
2. UseYEDS-18 disc (3-702-101-01) unless otherwise indicated.
3. Use an oscilloscope with more than 10MΩimpedance.
4. Clean the object lens by an applicator with neutral detergent
when the signal level is low than specified value with the
following checks.
S Curve Check
Procedure :
1. Connect oscilloscope to test point TP (FE) on BD board.
2. Connect between test pointTP (FEI) and TP (VC) by lead wire.
3. Turned Power switch on.
4. Put disc (YEDS-18) in and turned Power switch on again and
actuate the focus search. (actuate the focus search when disc
table is moving in and out.)
5. Check the oscilloscope waveform (S-curve) is symmetrical
betweenA and B.And confirm peak to peak level within 3 ± 1
Vp-p.
S-curve waveform
6. After check, remove the lead wire connected in step 2.
Note : • Try to measure several times to make sure than the ratio
of A : B or B : A is more than 10 : 7.
• Take sweep time as long as possible and light up the
brightness to obtain best waveform.
BD board Oscilloscope
TP (FE)
TP (VC)
A
BWithin 3
± 1 Vp-p
Symmetry
BD board Oscilloscope
TP (RF)
TP (VC)
Level : 1.3 Vp-p
+0.25
–0.20
VOLT/DIV : 200mV
TIME/DIV : 500ns

— 12 —
RF PLL Free-run Frequency Check
Procedure :
1. Connect frequency counter to TP (PLCK) with lead wire.
2. Turned Power switch on.
3. Put thedisc(YEDS-18) into playthenumber fivetrack.Confirm
that reading on frequency counter is 4.3218 MHz.
Adjustment Location :
[BD BOARD] — SIDE A —
BD baord
TP (PLCK)
frequency counte
r
IC103
(PLCK)
IC101
(RF) (FEI)
(FE)
(VC)
(TE)
VIDEO SECTION
Frequency adjustment
1. Connect the frequency counter to check point of the VIDEO
board.
2. Adjust CT401oftheVIDEOboard so thatthe frequencycounter
read 13.5 MHz ± 40 Hz at STOP condition.
[VIDEO BOARD] — SIDE B —
VIDEO board
TP410 (DCLK)
frequency counte
r
SL703 (AFADJ)
SL702 (ADJ)
IC751 IC251
SL701 (CAL BAR) TP410 (DCLK)
CT401
Frequency

HCD-V5500
6-1. BLOCK DIAGRAM — CD SECTION —
SECTION 6
DIAGRAMS
— 13 — — 14 —
APC LD
AMP
RF AMP
IC103
1
2
19
3
4
5
6
RF
SUMMING
AMP RF FQ
AMP
FOCUS
ERROR
AMP 15
TRACKING
ERROR
AMP 13
1110
VC
BUFFER 12 VC
VC
FOCUS/TRACKING COIL DRIVE
SPINDLE/SLED MOTOR DRIVE
IC102
1
24
5
T+
T–
F+
F– 19
20
16
17
10
9
12
13
M
M102
SLED
MOTOR
M
M101
SPINDLE
MOTOR
27
26 23
24
TRACKING
COIL
FOCUS
COIL
16
RF
15MUTE
16
8
9
4
AC
BD
E
F
DETECTOR
1
OPTICAL PICK-UP
BLOCK (KSS-213B/S-N)
LD
DRIVE
Q101
PD
LASER
DIODE
LD
LD
POWER
INTEGRATOR
INTE-
GRATOR 28
27
26
29
RF DC
TE
SE
FE
A/D
CONVERTER
4
6
10
8
2
100
96
ASYMMETRY
CORRECTION
ASY0
RF AC
ASY1 MIX
36
MIRR
DFCT
FOK
DETECTOR
DIGITAL
PLL
EFM
DEMODULATOR
CLOCK
GENERATOR
FOK
DFCT
MIRR
SERVO DSP
FOCUS
SERVO
TRACKING
SERVO
SLED
SERVO
PWM
GENERATOR
TRACKING
PWM
GENERATOR
FOCUS
PWM
GENERATOR
SLED
PWM
GENERATOR
SYNC
PROTECTOR
CLV SERVO
PROCESSOR
1B TIMS
OVERSAMPLING
FILTER
NOISE
SHAPER
TIMING
GENERATOR 1
TIMING
GENERATOR 2
DIGITAL SERVO
DIGITAL SIGNAL PROCESSOR
IC101 62
XTAL
REGISTER
DATA BUS
ERROR
CORRECTOR
D/A
DATA
PROCESSOR
79 54
MUTE
GFS
99
S STOP
+5V
S101
LIMIT
SWITCH
TFDR
TRDR
FFDR
FRDR
SRDR
SFDR
MDP
32K
RAM
ADDRESS
GENERATOR
PRIORITY
EMCODER
SERIAL/PARALLEL
PROCESSOR
PEAK
DETECTOR SUBCODE
Q
PROCESSOR
SUBCODE
P-W
PROCESSOR
DIGITAL
OUT
70
MD2
71
DOUT
EXCK 76
SBSO 75
77
78
SUBQ
SQCK
83
SCLK
73
74
SCOR
WFCK
47
BCLK
LRCK 45
DATA 46
+5V 384BD
EXCK
SUBQ
LDON
DIGITAL
OUT
IC107
OPTICAL
SUBQ
SQCK
SCLK
ADATA
LRCK
BCLK
SCOR
86
87
88
XLT
DATA
CLK XLT
DATA
CLK
CPU
INTERFACE
SERVO
AUTO
SEQUENCER SENS SENS
80
56
C2PO
SERVO
INTERFACE
MIRR 91
92
DFCT
FOK 93
81
XRST XRST
AMUTE
39
38
C2PO
VIDEO
SECTION
B
(Page 15 )
• SIGNAL PATH
: CD
: DIGITAL OUT
: VIDEO
1

HCD-V5500
6-2. BLOCK DIAGRAM —VIDEO SECTION —
— 15 — — 16 —
RGB-YUV
CONV.
TIMING
GEN.
NOISE
REDUSER YUV-RGB
CONV.
60
67
51
58
1
4
•
6
9
11
18
71
74
•
76
80
63
70
1
4
•
6
9
11
18
MEMORY
CONT.
DRAM
IF 29
30
31
98 10097
DCLKI
Y
C
Y
C
NOISE REDUCTION
IC301
DEMPX, LEVEL
TRANSLATOR
&
INTERPOLTATOR
VIDEO
POSTPROCESSOR
&
SYNC GENERATOR
LPF
LPF
DELAY
MODULATOR
SYNC
SLOPE
GEN.
CLOSED
CAPTION
ENCODER
SIO & I2O-BUS
CONT.
SUB
CARRIER
GEN.
SYNC GEN.
&
TIMING CONT.
49 504859 60625557 51
1/2
56
XRST
DCLK HSYNC VSYNC DCLK XVRST FID VSYNC HSYNC
VDAC-XLAT CLK DATA
3456
X401
27MHz
CT401
13.5MHZ
CLOCK GENARATOR
IC402
Y, C/Y, U, V
SELECTOR
&
INTER-
POLATOR
24
29
32
5
3
1
32
7
7
143
V
Y
C
10BIT VIDEO D/A CONVERTER
IC401
5 7
VIDEO AMP
IC451
Y/C AMP
IC452 J603
Q601 J601
IC601
SELECTOR
S VIDEO OUT
MONITOR OUT
VIDEO IN
NR-XCS
MCLK
MDATA
MDATA
RESET
OS-XLAT
MCLK
OUTPUT
CONT.
4
3
2
1
8
OSD
IC271
VIDEO
RAM
DATA INPUT
SHIFT
RESISTOR
SYNC
CONT. DATA SEL.
DISPLAY
POSITION
CONT.
18
17
16
15
19
20 OSC
1 5
CK 1/2 Q 6.75MHz
DCLK
HSYNC
VSYNC
XOSDEN
OSD R
OSD G
OSD B
CLOCK
GENERATOR
IC272
97
95
92
93
94
89
56
57
58
59
118
HSYNC
XSGRST
VSYNC
FID
DCLK
XOSDEN
OSD B
OSD G
OSD R
XRST
MPEG
VIDEO
DECODER
MPEG
SYSTEM
DECODER
CD-ROM
DECODER
MPEG
AUDIO
DECODER
112
111
110
109
103
100
101
102
11
12
13
14
15
9
8
7
6
5
2
3
BUFFER
IC501 (1/2)
HOST INTERFACE
117115116114
EACH CIRCUIT BLOCK
D-RAM INTERFACE
34
301516 31
5 6•• •119 120
7–13 16
•
17–21 23 24 32 33••••
38–43 46–55•
X202
28.63636MHz
106
107
X201
45.1584MHz
XTL0O
XTL01
XTL2O
XTL2I
MPEG DECODER
IC201
18–21 24–28•
272022
55
2–10 21 23–25
••
•
2–5 7–10 35–38 40–43
••
LCAS
UCAS
W
RAS
A8 A0
DQ16
DQ1
WE CE1 OE
A12
A0
I/O8 I/O1
D-RAM
IC251
S-RAM
IC751
D0
D7 A0
A3
XHCS XWR XHDT XHIRQ
•11–13 15–19
8
10 9
6
12
11
12 13
XTCS
IC772
41 54 56 43 70 7 8
21–29 • 31–3513 – 20
3735
68494847
34
35
36
37
44
18
43
1
2
3
4
5
6
72
64
CMD0
CMD1
CMD2
CMD3
SACK
QINT
MREQ
MDATA
MCLK
OS-XLAT
NR-XCS
73
78
74
11
10
77
76
DATA
CLK
AMUTE
SQCK
SUBQ
SCLK
XLT
CMD0
CMD1
CMD2
CMD3
SACK
QINT
MREQ
NPIN
75
71
62
48
LDON
SCOR
SENS
RESET
384FS
DATA
CLK
AMUTE
SQCK
SUBQ
SCLK
XLT
LDON
SCOR
SENS
XRST PAL
AUTO
NTSC
S601
SYSTEM SELECT
5251 X701
10MHz
EXTAL XTAL
111052 X901
5MHz
X2 CD-XRST X1
VDAC-XLAT
DF-XLAT
WAIT
WR
XHIRQ
AS
A17
A18
RD
A12
A0
D7 D0
MECHA CONTROL
IC701
56
55
15
IIC INTERFACE
IC901
RESET
IIC-DATA
IIC-CLK
B
CD
SECTION
(Page 14 )
B
CD
SECTION
(Page 14 )
16
BCK
ADATA
LRCK
C2PO
384FS
ADATA
LRCK
BCLK
416
IC501
(2/2)
DATA
CLK
AMUTE
384FS
11
6
3
11 27
25
21
22
16
18
12
10
3
4
5
2
13
4
1
BUFFER
IC181
XRST
6
INPUT PLM
D/A
CONV.
MODE MUTE
CIRCUIT
ADATA
384FS
LRCK
BCLK
DATA
CLK
DF-XLAT
AMUTE
TIMING
CIRCUIT CLOCK GENERATOR
1
IIC-CLK
IIC-DATA
XRST
L CH
CD FUNC A
MAIN
SECTION
(Page 17)
2
316 7
R CH
ACTIVE LPF
IC102
X101
33.8688MHz
DIGITAL FILTER & D/A CONVERTER
IC101
• R CH: Same as L ch
• SIGNAL PATH
: VIDEO
: Y
: CHROMA
: CD
Y0-Y7
C0-C7
INT
40
54
3
IC771

HCD-V5500
6-3. BLOCK DIAGRAM — DECK/SYSTEM CONTROL SECTION — 6-4. CIRCUIT BOARDS LOCATION
— 17 — — 18 — — 19 —
CONNECTOR BOARD
SENSOR BOARD
MOTOR BOARD
CD PANEL BOARD
TC (A) BOARD
TC
(
B
)
BOARD
LEAF SWITCH BOARD
TC PANEL BOARD
AUDIO BOARD
MAIN BOARD
RESISTOR BOARD
MOTOR (SLIDE) BOARD
MOTOR (TURN) BOARD
BD BOARD
VIDEO BOARD
VIDEO IN BOARD
2
6
7
12
14
11
15
RECT
Q901-904
REG
IC851
REG
IC853
REG
Q852
REG
IC852
Q104
Q102
SWITCH
Q103
SWITCH
Q106
-REG
Q855
PB(L)
LEVEL
REC
BIAS
BIAS
TRAP
R CH
R CH R CH
BIAS
OSC
Q621,622
PB EQ
AMP
IC611
31
RV341
Q623
+7.5V
C331,L331
ERASE
HEAD
REC/PB
HEAD
(B DECK)
HRPE101
REC/PB
HEAD
(A DECK)
HP101
RV311
R CH PB(L)
LEVEL
PB EQ
AMP
IC601
57
RV301
IC602
REC/PB SWITCH
REC
EQ
BIAS
SW
DOLBY
B
NORM
CROM
REC(L)
LEVEL
RV401
PB A/B
IC401
DOLBY NR/REC EQ AMP
37
6
8
12
14
16
17
18
19
20
13
15
87
88
89
90
91
92
93
80
79
78
ROTARY
ENCODER
S851
97
DRIVE
Q201-204
LED
Q219,220
2
7
D201-210
FUNCTION
KEY
S251-266
73
72
70
65
53
49
41
DRIVE
Q205-218
LED D211-227
FUNCTION
KEY
S270-282
RESET
IC103
28
MOTOR
SWITCH
CAPSTAN
SWITCH
Q410,411
M
SWITCH
Q409
Q405,408
SPEED
CONTROL
Q651
SPEED
(NOMAL)
TAPE
SPEED
(HIGH)
TAPE
M
2
7
6
3
MOTOR DRIVE
IC701
OUT2
OUT1
IN2
IN1
M
61
60
M701
TURN
MOTOR
4
7
2
10
OUT2
OUT1
R IN
F IN
M
64
63
M801
SLIDE
MOTOR
MOTOR DRIVE
IC801
1
2
3
4
2
4
A
B
70
120
PB
REC
DOL
PAS
PB
REC
11
29
28 22 A7.5V
10 9
B CrO2
DET
S1008
A CrO2
DET
S1005
NORM/HIGH
NORM/CROM/METAL
BIAS ON/OFF
RM ON/OFF
NR ON/OFF
REC PB/PASS
LM ON/OFF
A120/70
IC703
L CH
VIDEO
SECTION
IIC DATA
IIC CLK
XRST
CD FUNC
DISC
D +5V
A +5V
+5V
A +7.5V
+7V
+12V
-7.5V
CD L
REC L
PB L
IIC DATA
IIC CLK
AC
AC
SYSTEM
CONTROL1
CNB108
TO STR-W550
CNP701
IC101
SYSTEM CONTROL
46
15
29
CD POWER
IIC DATA
IIC CLK
XRST
CD FUNC
RESET
LED1
LED6
KEY A
31+5V
KEY B
LED20
DISC SENS
TBL SENS A PLAY SW
75
76
11
10
30
94
Q701
SENSOR
IC702
TABLE
SENSOR
X1
X2
X101
5MHz
PB A/B
OPEN SW
S801
EQ H/N
BIAS
REC MUTE
NR ON/OFF
R/P PASS
LM ON/OFF
OUT OPEN
VZ
IN1
IN2
81
96 TC RELAY
TBL R
TBL L
LOAD IN
LOAD OUT
CAPSTAN
MOTOR
M1
TRIGGER
MOTOR
M2
A HALF SW
26
A SHUT
S1001
A PLAY +5V
+5V
S1004
A HALF
S1007
B HALF
S1009
REC B
S1006
REC A
ROTATION
DET A
Q1001
+5V
B HALF SW
B PLAY SW 95
S1002
B PLAY +5V
27
B SHUT
+5V
ROTATION
DET B
Q1002
TRIGGER
MOTOR DRIVE
IC402
TRG LOW
B TRG
A TRG
CAP M ON/OFF
CAP M H/L
OUT1
OUT2
2
10
4
6
5
85
84
83
86
82
.
.
LED7 .
.
.
.
E1
E2
E3
16
RV652
RV651
Signal path
: CD
: PB(DECK A)
: PB(DECK B)
: REC(DECK B)
55
56
57
A
(Page 16 )
37
Q105
D +5V

HCD-V5500
6-17. IC BLOCK DIAGRAMS
— 53 — — 54 —
IC101 CXD2545Q IC103 CXA1821M-T6
IC201 CXD1852AQ
IC101 CXD8567AM
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45
62
63
64
65
66
67
68
69
70
71
72
73
74
75
767778
7980818292 91 90 89 88 87 86 85 84 83
93949596979899
100
SLED PWM
GENERATOR
TRACKING PWM
GENERATOR
FOCUS PWM
GENERATOR
PWM GENERATOR SERVO DSP
FOCUS
SERVO
TRACKING
SERVO
SLED
SERVO
CLV
PROCESSOR
CPU
INTERFACE
NOISE
SHAPER
18-TIMES
OVER SAMPLING
FILTER
CPU
INTERFACE
CPU
INTERFACE
ADDRESS
GENERATOR
CPU
INTERFACE
PRIORITY
ENCODER
CPU
INTERFACE
ERROR
CORRECTOR
CPU
INTERFACE
TIMING
GENERATOR 2
MIRR
DFCT
FOK DETECTOR
32K RAM
REGISTER
D/A
DIGITAL
PROCESSOR
TIMING
GENERATOR 1
SYNC
PROTECTOR
DIGITAL
OUT
SUBCODE
P-W
PROCESSOR
SUBCODE
Q
PROCESSOR
DIGITAL
PLL
VARI-PITCH
DOUBLE SPEED
CPU
INTERFACE
EFM
DEMODULATOR
SERIAL
PARALLEL
PROCESSOR
CPU
INTERFACE
ASYMMETRY
CORRECTION
1
2
3
4
5
6
7
8
9
10
11
20
19
18
17
16
15
14
13
12
21
22
23
24
25
46 — 50
61
|
51
PEAK
DETECTOR
CLOCK
GENERATOR
MUX




A/D
CONVERTER
SWITCH
&
BUFFER
SERVO
AUTO
SEQUENCER
SERVO
MICRO PROGRAM
INTERFACE
RFC
ADIO
AVSS
IGEN
AVDD
VCKI
VPCO
PDO
TES3
TES2
DVSS
TEST
VCO1
VCO0
SRON
SRDR
SFON
TFDR
TRON
TRDR
TFON
FFDR
FRON
FRDR
FFON
RFDC
TE
SE
FE
VC
FILO
FILI
PCO
CLTV
AVSS
RFAC
BIAS ASYI
ASYO
AVDD
ADD
ASYE PSSL
WDCK
LRCK
XTAI
XTAO
XTSL
DVSS
FSTI
FSTO
D OUT
MD2
C16M
C4M
SCOR
WFCK
EMPH
SBSO
EXCK SQSO SQCK MUTE SENS XRST DIRC SCLK DFSW ATSK DATA XLAT CLOK COUT ADD MIRR DFCT FOK FSW MON MDP MDS LOCK SSTP SFDR
4
3
DA01
|
DA11
DA16
|
DA12
1INIT
2
3
4
5
6
7
8
9
10
11
12
13
14
D Vdd 2
SYSM L1 (+)
ATT A Vdd L
SHIFT L2 (+)
LATCH A Vss L
256FSO X Vss
TEST1 512IN
D Vss X OUT
MCKSEL X Vdd
XBCK A Vss R
DATA R2 (+)
LRCK A Vdd R
MUTE L R1 (+)
MUTE R D Vdd 1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
MODES/P
ATT
IIR
FIR3FIR2FIR1
PLMPLM
MUTE
CIRCUIT
CLOCK
GENERATOR
AC
DITHER
DC
DITHER
3RD ORDER
NOISE SHAPER
SAMPLE
HOLD (X1)
TIMING CIRCUIT
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
LD VCCVCC
PD LD ON
A LC/PD
B RFE
C RFO
D FE
VEE FE BIAS
F TE
E VC
VC
VC BUFFER
TRACKING ERROR AMP
FOCUS ERROR AMP
RF EQ AMP
APC LD AMP
RF SUMMING AMP
EI EO
VEE
VCC
VCC
VC
VC
VC VC
VC
VC
VC
VEE
VEE VEE
VREF
VSS
XTLOO
XTLO1
VDD
HA2 HA3
HD0 HD1 HD2 HD3 HD4 HD5 HD6
VDD
VSS
HD7
MA3 MA4 MA2 MA5 MA1
VSS
MA6 MA0
BC
TCKI
TDI
TENAI
TDO
VST
HA1 CLOCK
HA0
XRST
XHIRQ
XRW
XHDT
XHCS
DOIN
BCKI
DATI
LRCI
C2PO
VDD
XTL2I
XTL2O
VSS
VDD
FSXI
BCKO
LRCO 100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
DATO 99DOUT 98CLK0O 97XSGRST 96CSYNC 95CBLNK/FSC 94FID/FHREF 93VSYNC 92HSYNC 91VSS
31 VSS
32 MA7
33 MA8
34 XRAS
35 XMWE
36 XCAS2/MA9
37 XCAS0
38 MD7
39 MD8
40 MD6
41 MD9
42 MD5
43 MD10
44 VDD
45 VSS
46 MD4
47 MD11
48 MD3
49 MD12
50 MD2
51 MD13
52 MD1
53 MD14
54 MD0
55 MD15
56 XOSDEN
57 OSDB
58 OSDG
59 OSDR
60 VDD
123456789101112131415161718192021222324252627282930
VDD DCLK B/Cb7 B/Cb6 B/Cb5 B/Cb4 B/Cb3 B/Cb2 B/Cb1 B/Cb0 G/Y7 G/Y6 G/Y5 G/Y4 G/Y3 VSS VDD G/Y2 G/Y1 G/Y0 R/Cr7 R/Cr6 R/Cr5 R/Cr4 R/Cr3 R/Cr2 R/Cr1 R/Cr0 XVOE VSS
90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
VIDEO POSTPROCESSOR
&
SYNC GENERATOR
CLOCK
RESET
CLOCK
TEST
HOST
INTERFACE
CD-ROM
DECODER
D-RAM
INTERFACE
MPEG
SYSTEM
DECODER
MPEG
AUDIO
DECODER
MPEG
VIDEO
DECODER
EACH
CIRCUIT
BLOCK

— 55 —
IC271 BU6257AFV-E2
IC301 CXD1854Q
DATA INPUT
1
2
3
4
5
6
7
8
9
10
13
11
PROTECTION
CIRCUIT
VIDEO RAM
CHARACTERCHARACTER
SIZE
REGISTER
DATA SELECTOR
DATA
3-BIT
288
WORD
COLOR
DATA
3-BIT
WORD
CHARACTER
DATA
8-BIT
WORD
SHIFT REGISTER
HSYNC
VSYNC
VB
VG
VR
VBLK
VC2
BLK2
VC1
BLK1
CS
DATA
CLK
RESET
VDD
CKOUT
OSCOUT
OSCIN
TEST
VSS
VERTICAL
ADDRESS
COUNTER
TEST
CIRCUIT
OSCILLATION
CIRCUIT
COUNTER COUNTER
POSITION ADDRESS
COUNTER
HORIZONTAL
HORIZONTAL HORIZONTAL HORIZONTAL
ADDRESS
REGISTER
WRITE
ADDRESS
SIZE
COUNTER
VERTICAL
SIZE COUNTER
VERTICAL
POSITION COUNTER
VERTICAL
BACKGROUND
CONTROL
DATA
REGISTER
ADDRESS
COUNTER
DISPLAY
CONTROL
DATA
REGISTER
OUTPUT CONTROL
CHARACTER
GENERATOR
ROM
12X18-BIT
X255-WORD
x288 x288 x
20
19
18
17
16
15
14
12
81
YUV-RGB
CONVERSION
80
CSYNCO 82HAPGAIN0 83HAPGAIN1 84TEST 85TEN 86HAPBPF0 87IFSEL1 88HAPBPF1 89NRON 90LEVEL0 91LEVEL1 92FNR UFRZ 93XRST 94VSS7 95CSYNCI 96CBLNKI 97VSYNCI 98HSYNCI 99VDD5 100DCLKI
50 VSS4
49 VCPT
48 VCP
47 HVCCT
46 HVCC
45 ADVS
44 ADVD
43 CORON
42 BLCKST3
41 VSS3
40 BLCKST2
39 BLCKST1
38 BLCKST0
37 VDD1
36 BLCKSIZE
35 BLCKNR1
34 BLCKNR0
33 SXP COM
32 SDO
31 SDI
CBLNKO
79
VSYNCO
78
HSYNCO
77
VSS5
76
BO7
75
BO6
74
BO5
73
BO4
72
BO3
71
BO2
70
BO1
69
BO0
68
VDD3
67
Y/GO7
66
Y/GO6
65
Y/GO5
64
Y/GO4
63
Y/GO3
62
Y/GO2
61
Y/GO1
60
Y/GO0
59
VDD2
58
C/RO7
57
C/RO6
56
C/RO5
55
C/RO4
54
C/RO3
53
C/RO2
52
C/RO1
51
C/RO0
1
VSSO
2
BI7
3
BI6
4
BI5
5
BI4
6
BI3
7
BI2
8
BI1
9
BI0
10
VSS1
11
Y/GI7
12
Y/GI6
13
Y/GI5
14
Y/GI4
15
Y/GI3
16
Y/GI2
17
Y/GI1
18
Y/GI0
19
VSS2
20
C/RI7
21
C/RI6
22
C/RI5
23
C/RI4
24
C/RI3
25
C/RI2
26
C/RI1
27
C/RI0
28
VDD0
29
XCS
30
XSCK
NOISE
REDUCER
RGB-YUV
CONVERSION MEMORY CONTROLLER
TIMING
GENERATOR
888
8 8
C/R-Y
B-Y
Y
Y
B-Y
C/R-Y
8
D-RAM
MICRO COMPUTER
INTERFACE

— 56 —
IC401 CXD1913Q
52
51
F1
XVRST
50
XCS
49
SCK
48
SI
47
VSS
46
TDO
45
TCK
44
TMS
43
TDI
42
VDD
41
TRST
40
VSS XTEST1 XTEST3
36
TD8
35
TD9
34
VDD
33
TD1O
53VDD
54XTEST4
55XRST
56SYSCLK
57PDCLK 58VSS 59VSYNC 60HSYNC 61SO 62FID 63VDD 64XIICEN 1/2
SYNC Gen.
and
Timing Controller
SIO and I2O-Bus
Controller
3
8
Sub Carrier
Gen.
Modulator
Dempx,
Level
Translator
and
Interpolator
4 : 2 : 2 to
4 : 4 : 4
Y, C/
Y, U, V
selector and
Interpolator
SYNC Slope
Gen.
Closed Caption Encoder
(for NTSC)
CSYNC
CHROMA
V
U
Y
BURST FLAG
37-39
-
TEST MODE
10
VDD
19
VSS
C7 C0
11-18
-
5
VSS
Y3 Y0
6-9
-
Y7 Y4
1-4
-
Delay 10bit
DAC
10bit
DAC
10bit
DAC
LPF
LPF
29 YO
28 AVSS2
27 AVDD2
26 VG
25 VB
24 COMPO
23 AVSS1
22 AVDD1
21 VREF
20 IREF
30 AVDD3
31 AVSS3
32 CO
4 4
8
IC701 M54641L
1
5
2
7
3
6
4
POWER
AMP.
POWER
AMP.
CONTROL
INPUT
AMP.
INPUT
AMP.
REG
8
VCC VCC
REFERENCE
OUT2
OUT1
IN1
IN2
GND
IC272 TC7W74F
6
CLR
7
PR
8
VCC
5
Q
RSQ
3
Q
2
D
4
GND
1
CK
QDC
IC801 BA6286N
1
2
3
4
5
6
7
8
9
10
TSD CONTROL
LOGIC
POWER
SAVE
GND
RIN
VREF
OUT2
RNF
GND
VM
VCC
FIN
OUT1
IC601 uPC1330HA
12345 6 7 8 9
INVERTER
COMPARATER
SW R1 GND SW P1 CONT GND VCC SW P2 GND SW R2

— 57 —
6-18. IC PIN FUNCTIONS
• IC101 SYSTEM CONTROL (UPD780016YGF-016-3BA)/MAIN board
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
I/O
—
O
O
O
O
O
O
—
—
O
I
—
—
—
I
—
—
I
O
I
—
—
—
—
I
I
I
I
I
I
I
—
—
I
—
O
—
—
—
—
—
I
—
—
—
O
O
O
O
O
Description
Not used.
LED control.
LED control.
LED control.
LED control.
LED control.
LED control.
Not used.
Ground.
X’tal (5MHz).
X’tal (5MHz).
5V.
Not used.
Not used.
Reset signal input.
Not used.
Not used.
CD Q data request.
Soft operation check port.
AC power supply check.
Not used.
Not used.
5V.
5V.
CD adjustment port.
Reel pulse detection.
Reel pulse detection.
Cassette half detection.
Key input.
Key input.
Key input.
Not used.
Ground.
CD data input.
Not used.
Clock for data input.
Not used.
Ground.
Ground.
Ground.
Not used.
BD status input.
Ground.
Not used.
Not used.
CD power.
CD data output.
CD clock.
LED control.
LED control.
Pin Name
NC
LED 1
LED 2
LED 5
LED 6
LED 3
LED 4
NC
Test
X2
X1
Vdd
XT2
XT1
Reset
NC
NC
SCOR
SOFT TEST
AC CUT
NC
NC
Vdd
AVdd
ADJ
A SHUT
B SHUT
B-HALF
KEY A
KEY B
KEY C
ADJ 2
AVSS
SQ DATA IN
NO USE
SQ CLK
CD-FUNC
NC
NC
VSS
LED 20
SENSE2
COM D IN
COM D OUT
COM CLK
CD POWER
CD DATA
CD CLK
LED 19
LED 18

— 58 —
Pin No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
I/O
O
O
O
—
I/O
I/O
O
O
O
O
O
—
O
I
O
O
O
O
O
O
—
O
O
I
I
I
—
I
I
I
I
O
O
O
O
O
O
O
O
O
O
I/O
O
I
I
O
I
—
—
—
Description
LED control.
LED control.
LED control.
Not used.
Communciation data.
Comunicaton clock.
CD reset.
CD latch.
Focus switch.
Table-L.
Table-R.
Not used.
Load out.
Load in.
LED control.
LED control.
LED control.
LED control.
LED control.
LED control.
Ground.
LED control.
LED control.
BD status input.
Disc sensor.
Table sensor.
Not used.
Encoder input for CDM38.
Encoder input for CDM38.
Encoder input for CDM38.
Encoder input for CDM38.
Capstan motor H/N selection.
Mechanism timing output control.
Mechanism timing output control.
Mechanism timing output control.
Capstan motor ON/OFF switch.
Playback A/B selection.
Equalizer H/L selection.
Bias ON/OFF.
REC mute.
NR ON/OFF.
REC/PB/PASS select.
TC mute.
Mechanism PLAY switch.
Mechanism PLAY switch.
Head selection.
Cassette half detection.
Not used.
Not used.
Not used.
Pin Name
LED 17
LED 16
LED 15
IIC-TEMP
IIC DATA
IIC CLK
XRST
XLAT
FOCUS SW
TBL L
TBL R
TRAY LED
LOAD OUT
LOAD IN
LED 14
LED 13
LED 12
LED 11
LED 10
LED 9
Vss
LED 8
LED 7
SENS
DISC SENS
T-SENS
UPSW
ENC3
ENC2
ENC1
OUT OPEN
CAP M H/N
A TRG
B TRG
TRG LOW
CAP M ON/OFF
PB A/B
EQ H/N
BIAS
REC MUTE
NR ON/OFF
R/P PASS
LM-ON/OFF
A PLAY SW
B PLAY SW
TC RELAY
A HALF
POWER
NC
NC