Sony spp901 User manual

MICROFILM
SERVICE MANUAL
CORDLESS TELEPHONE
Canadian Model
SPECIFICATIONS
SPP-901

SPP-901
– 19 – – 20 –
5-5. SCHEMATIC DIAGRAM – BASE RF Board – • See page 29 for IC Block Diagrams.
(Page 21)

SPP-901
– 21 – – 22 –
5-6. SCHEMATIC DIAGRAM – BASE MAIN/BASE KEY Boards – • See page 16 for Waveform. •See page 30 for IC Block Diagrams.
(Page 20)

SPP-901
– 23 – – 24 –
5-7. SCHEMATIC DIAGRAM – HAND RF Board – • See page 29 for IC Block Diagrams.
(Page 26)

SPP-901
– 25 – – 26 –
5-8. SCHEMATIC DIAGRAM – HAND MAIN Board – • See page 16 forWaveform. •See page 30 for IC Block Diagrams.
(Page 24)

– 29 –
• IC Block Diagrams
U1 U2765B-AFSG3 (BASE RF Board)
U1 U2765B-AFSG3 (HAND RF Board)
VCC/2
COMPARATOR SLICER
LOCAL OSC
BUFFER
VCC2 LO REF LO IN GND2 NC VCC3 LIM1 OUT GND3 LIM2 IN LIM2 REF GND4 DEM NTANK DEM TANK DEM OUT
NC
A1 REF
A1 IN
GND1
MIX OUT
VCC1
MIX NOUT
LIM1 REF
LIM1 IN
RSSI
DATA OUT
COM NIN
COM IN
SL IN
1 2 3 4 5 6 7 8 910 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
A1
MIX
LIMITER
AMP
LIMITER
AMP
DE-
MODULATOR
RSSI
+
–
+
–
U2 TB31202BFN-EL (HAND RF Board)
U10 TB31202BFN-EL (BASE RF Board)
235
4 6 78
9
10
1
11
12
13
14
15
16
BUF
BUF PROGRAMABLE
DIVIDER
PHASE
COMPARATOR
OUTPUT
SWITCH
L. OSC
REFERENCE
DIVIDER
LOCK
DET
CONTROL
CIRCUIT
1/2
1/2
1/2
BUF
1
––––––––
32, 33
1
––––––––
32, 33
PHASE
COMPARATOR
OUTPUT
PROGRAMABLE
DIVIDER
FIN1
VCC
CP1
GND
LD CK
DATA
STB
FIN2 VCC CP2 GND SW XIN XOUT BO

– 30 –
U4 TA31103F (BASE MAIN Board)
U7 TA31103F (HAND MAIN Board)
2
1
E-RECT
PRE OUT
PRE NF
VCC
VREF
THROUG
RO2
RIN
EXP OUT
RO1
COMP MUTE
EXP MUTE
4
FIL1 OUT
3
FIL2 IN
FIL2 OUT
+
–
+
–
59
8
7
6
IN2
C-RECT
C-NF
FIL1 IN
COMP OUT
10 11 12
24 20
21
22
23 19 17
18 15 14 13
16
GND
MIC IN
MIC OUT
MIC NF
∆G
VREF
+
–
VREF
VREF
SWITCH
CONTROL
+
–
+
–
MIC AMP
SUM
AMP
+
–
+
–
∆G
VREF
VREF
PRE AMP
SUM
AMP
RO1
AMP
COMP
MUTE
EXP
MUTE
THROUG
THROUGH
IN 2
AMP
FILTER
AMP 1
FILTER
AMP 2
+
–
VREF
RO2
AMP
+
–
U7 BR93LC46F-E2 (BASE MAIN Board)
CS
CLK
6BIT
16BIT
DI
DO
VCC
NC
NC
VSS
4
3
2
1
5
6
7
8
COMMAND DECODE
CONTROL,
CLOCK GENERATION
WRITING
INHIBIT
COMMAND
REGISTER
DUMMY
BIT
ADDRESS
BUFFER
DATA
REGISTER
ADDRESS
DECODER 1,024 BIT
EEPROM
ARRAY
16BIT
6BIT
HIGH VOLTAGE
GENERATION
R/W
AMP
POWER SUPPLY VOLTAGE
DETECTION
U11 LP2953IM (HAND MAIN Board)
2
3
1
8
9
10
11
12
13
14
15
7
5
6
4
SHUT DOWN
ERROR
NC
GND
NC
OUTPUT
SENSE
GND
VREF
COMP IN
COMP OUT
GND
INPUT
FEEDBACK
5V TAP
+
–
+
–
+
–
+
–
ERROR
AMP
SHUT DOWN
COMPARATOR
DROP OUT
DETECTION AMP
AUXILLARY
COMPARATOR
1.23V
16 GND