Sony FPF55C17196UA User manual

PANEL MODULE SERVICE MANUAL
PDP Module Name
FLAT PANEL COLOR TV
UC Model
KDE55XBR950
FPF55C17196UA

CONTENTS
1 OUTLINE ..................................................................................................................................1
1.1 Panel Dimension ................................................................................................................1
1.2 Feature...............................................................................................................................1
1.3 Specification .......................................................................................................................2
1.3.1 Functional specification ...............................................................................................2
1.3.2 Display quality specification .........................................................................................3
1.3.3 I/O Interface Specification............................................................................................4
2 SAFETY HANDLING of THE PLASMA DISPLAY ..................................................................... 8
2.1 Notes to Follow During Servicing .......................................................................................8
3 NAME and FUNCTION .............................................................................................................9
3.1 Configuration ......................................................................................................................9
3.2 Block Diagrams ................................................................................................................10
3.2.1 Signal Diagrams ........................................................................................................10
3.2.2 Power Diagrams ........................................................................................................ 11
3.3 Function............................................................................................................................12
3.3.1 Logic board Function ................................................................................................. 12
3.3.2 Function of X-SUS Board ..........................................................................................13
3.3.3 Function of Y-SUS Board...........................................................................................13
3.4 Protection function............................................................................................................14
4 PROBLEM ANALYSIS ............................................................................................................15
4.1 Outline of Repair Flow......................................................................................................15
4.2 Outline of PDP Module Repair Flow.................................................................................16
4.3 Checking the Product Requested for Repair .................................................................... 19
4.4 Operation Test Procedure ................................................................................................20
4.5 Fault Symptom ................................................................................................................. 22
4.6 Problem Analysis Procedure ............................................................................................ 25
4.6.1 "The entire screen does not light.(Main power is turned off)” Problem analysis
procedure............................................................................................................................25
4.6.2 "Vertical line/Vertical bar" Problem analysis procedure..............................................31
4.6.3 "Horizontal bar" Problem analysis procedure.............................................................35
4.7 Problem Analysis Using a Personal Computer.................................................................36
4.7.1 Connecting a computer..............................................................................................36
4.7.2 Preparing a computer ................................................................................................ 36
4.7.3 Problem Analysis Procedure......................................................................................37
5 Disassembling and Reassembling.......................................................................................... 40
5.1 Exploded View..................................................................................................................40
5.2 X-SUS Circuit Board Removal/Installation Procedure......................................................41

5.3 Y-SUS Circuit Board Removal/Installation Procedure................................................................43
5.4ABUS-U1 Circuit Board Removal/Installation Procedure..........................................................45
5.5ABUS-U2 Circuit Board Removal/Installation Procedure..........................................................47
5.6ABUS-U3 Circuit Board Removal/Installation Procedure..........................................................49
5.7ABUS-U4 Circuit Board Removal/Installation Procedure..........................................................51
5.8ABUS-D1 Circuit Board Removal/Installation Procedure..........................................................53
5.9ABUS-D2 Circuit Board Removal/Installation Procedure..........................................................55
5.10ABUS-D3 Circuit Board Removal/Installation Procedure........................................................57
5.11ABUS-D4 Circuit Board Removal/Installation Procedure.........................................................59
5.12 LOGIC Board Removal/Installation Procedure.........................................................................61
5.13 Complete Panel Chassis Removal/Installation Procedure......................................................63
6 Operation Check and Adjustment Method..........................................................................................66
6.1 List of Check and Adjustment Items.............................................................................................66
6.2 Check and Adjustment Method.....................................................................................................67
6.2.1 Check and adjustment procedure.........................................................................................67
6.2.2 Parameter adjustment............................................................................................................68
6.2.3 Operation performance check items.....................................................................................70
6.2.4 Heat Run Test...........................................................................................................................72
6.2.5 Logic board parameter forwarding .......................................................................................74
6.2.6 Accumulation time reset.........................................................................................................76
6.2.7 Setup before shipment...........................................................................................................77
7 The parts information.............................................................................................................................78
7.1 FPF55C17196UA-53 configuration list.......................................................................................78
8packing Procedure................................................................................................................................79
8.1 Single packing................................................................................................................................79

Scope; 55P1 series
(Model name; FPF55C17196UA)
Before doing the service operation please be sure to read this service
analysis manual. This module has a lot of devices to secure the safety
against the fire, electric shock, injury and harmful radiation.
To maintain the safety control, please follow the instructions and remarks
described in this service analysis manual.
Caution

-1-
1 OUTLINE
The module is a plasma display module which can be designed in there is no fan in addition to a
general feature of the plasma display such as a flat type, lightness, and high-viewing-angle and
terrestrial magnetism.
1.1 PANEL DIMENSION
1.2 FEATURE
1. For high definition television and monitor by Progressive method
2. For FAN Less design(Low consumption electric power)
3. Flat type・Lightness
4. Customizing of module equipped with communication function
1229.4
1340
(
Glass
)
750(Glass)
691.2
Pixel pitch(horizontal) Sub- pixel pitch(horizontal)
0.90mm 0.30mm
0.90 mm
Pixelpitch(Vertical)
RGB
RGB
RGB
RGB
RGB
RGB
RGB
RGB
RGB
RGB
RGB
RGB
RGB
RGB
RGB
RGB
RGB
RGB

-2-
1.3 SPECIFICATION
1.3.1 Functional specification
Specification
Item NO
UA-5*
Module size 1 1340 × 760 × 66mm Externals
Weight 2 30kg
Display size 3 1229.4 × 691.2mm
(55inch: 16:9)
Resolution 4 1366 × 768 pixel
Pixel pitch 5 0.90(H) × 0.90(V)mm
Display panel
Sub pixel pitch 6 0.30(H) × 0.90(V)mm
Color Grayscale(standard) 9 RGB each color 256 Grayscale
White(display load Ratio 1%,standard) 11 1000cd/ m2 BrightNess
Chromaticity
Coordinates
(x,y)､white 10% 14 (0.290,0.290)
Contrast Contrast in Darkroom(60Hz) 15 900:1
Video signal (RGB each color) 16 LVDS(10bit)X1 or LVDS(10bit)X2 Data signal
Dot clock(max) 17 85MHz
Horizontal Sync Signal(max) 18 50KHz(LVDS) Sync Signal
Vertical Sync Signal 19 50Hz ± 1.9 / 60 ± 1.7Hz (LVDS)
Input voltage/current 20 +3.3/+5/+75-90/+50-65VDC, 0.05/7.5/7.5/6A Powersupply
Standby electric power(max) 21 1W
Noise Shade noise at 18dB(A) or less 22 25dB(A) or less
Temperature(operation) 23 0 ~ 45 °C
Temperature(storage) 24 0 ~ 45 °C
Humidity(operation) 25 20 ~ 85 %RH (no condensation)
Guarantee
environment
Humidity(storage) 26 20 ~ 80 %RH (no condensation)
*It is made to give priority when there is a delivery specification according to the customer.

-3-
1.3.2 Display quality specification
Specification
Item NO
UC-5*
Total number (subpixel) 1 15 or less
Density (subpixel/cm2) 2 2 or less
（However,1 continuousness or less）
Non-lighting cell
defect
Size (H x V) (subpixel) 3 1x2 or less, Or 2x1 or less
Total number (subpixel) 4 6 or less（each color 2 or less） Non-extinguishing
cell defect
Density (subpixel/ cm2) 5 Each color 2 cells max
（However,1 continuousness or less）
Flickering lighting cell defect
(sub pixel/cm2)
6 5 or less
Flickering cell defect
Flickering non-extinguishing cell defect 7 Number on inside of
Non-extinguishing cell defect
High intensity cell
defect
Twice or more bright point 8 0
White block of 10% load [9 point] (%) 9 20 or less Brightness variation
In area adjacent 20mm [White] (%) 10 10 or less
Color variation White block of 10% load [9 point] 11 X: Average ± 0.020
y: Average ± 0.020
*It is made to give priority when there is a delivery specification according to the customer.

-4-
1.3.3 I/O Interface Specification
(1) LVDS Signal Definition and Function
A video signal (display data signal and control signal) is converted from parallel data to serial
data with the LVDS transmitter and further converted into four sets of differential signals before
input to this product. These signals are transmitted seven times faster than dot clock signals.
The dot clock signal is converted into one set of differential signals by the transmitter before
input to this product. The LVDS signal definition and function are summarized below:
No. Item Signal Name
Number
of
signals
I/O Form Content of definition
1
Video Signal
Timing Signal
(ODD)
RA0-
RA0+
RA1-
RA1+
RA2-
RA2+
RA3-
RA3+
RA4-
R
A
4+
1
1
1
1
1
1
1
1
1
1
Input LVDS
Differential
Differential serial data signal.
Input video and timing signals after
differential serial conversion using a
dedicated transceiver.
The serial data signal is transmitted
seven times faster than the base
signal．
2
Video Signal
Timing Signal
(EVEN)
RB0-
RB0+
RB1-
RB1+
RB2-
RB2+
RB3-
RB3+
RB4-
RB4+
1
1
1
1
1
1
1
1
1
1
Input LVDS
Differential
Differential serial data signal.
Input video and timing signals after
differential serial conversion using a
dedicated transceiver.
The serial data signal is transmitted
seven times faster than the base
signal．
3 Clock (ODD) RACLKIN-
RACLKIN+
1
1 Input LVDS Differential
4 Clock (EVEN) RACLKIN-
RACLKIN+
1
1 Input LVDS Differential
Input the clock signal after
differential conversion using a
dedicated transceiver.
The clock signal is transmitted at
the same speed as the base signal.
5
Display signal
Power down
Signal PDWN 1 Input LVTTL
Low :LVDS receiver outputs are all
“L”.
High: Output signals are active.
6 SDA 1 I/O
7
Communication
SCL 1 I/O
LVTTL
(I2C)
I2C bus serial data communication
signal.
Communication with the control
MPU of this product is enabled.
8 CPUGO 1 Input LVTTL
“High”: Low power consumption
mode of the control MPU of this
product is released.
9 PDPGO 1 Input LVTTL
“High”: This product is started.
(CPUGO=“High” Effective)
10
MPU Communication / Control
Control
IRQ 1
Outpu
t LVTTL
It changes into "Low" →"High"
when this product enters the
undermentioned state.
1. Vcc/Va/Vs output decrease
2. Circuit abnormality detection

-5-
(2) Video Signal Definition and Function
The table below summarizes the definitions and functions of input video signals before LVDS
conversion.
Item Signal name Number
of signals
Input/
output Signal definition and function
Video signal
(ODD)
DATA-RA
DATA-GA
DATA-BA
10
10
10
Input
Display data signal
RA9/GA9/BA9 is the highest intensity bit.
RA0/GA0/BA0 is the lowest intensity bit.
Video signal
(EVEN)
DATA-RB
DATA-GB
DATA-BB
10
10
10
Input
Display data signal
RB9/GB9/BB9 is the highest intensity bit.
RB0/GB0/BB0 is the lowest intensity bit.
Clock DCLK
A
DCLK
B
2 Input
Video signal timing: These signals
continuously input are necessary. Data are
read when these signals are fallen.
Horizontal
sync signal Hsync 1 Input
Regulates one horizontal line of data: Begins
control of the next screen when Hsync is
fallen.
Vertical sync
signal Vsync 1 Input
Screen starts up control timing signal: Begins
control of the next screen when Vsync is
fallen.
Input the same frequency in both
odd-numbered and even-numbered fields.
Original
Display signal
(before LVDS
transmittance)
Blanking
signal
BLANKA
BLANKB
2 Input
Display period timing signal.
H indicates the display period and L indicates
the non display period.
Note:
Set this timing properly like followings, as is
used internally for signal processing.
・Set the blanking period so that the number of
effective display data items in one horizontal
period is 1366.
・Set the number of blanking signals in one
vertical period to 384, which is one half the
number of effective scan lines.
If the BLANK changes when the Vsync
frequency is switched, the screen display may
be disturbed or brightness may change.
The screen display is restored to the normal
state later when the BLANK length is
constant again.

-6-
(3) Connector Specification
The connector specification is shown below. Please do not connect anything with the terminal NC.
(3-1) Signal connector [CN1]
Pin No. Signal name Pin No. Signal name
1 R
A
0- 2 GND
(
LVDS
)
3 RA0+ 4 SCL
5 RA1- 6 GND
7 RA1+ 8 SDA
9 RA2- 10 GND(LVDS)
11 RA2+ 12 CPUGO
13 RACLK- 14 PDPGO
15 RACLK+ 16 IRQ
17 RA3- 18 PDWN
19 RA3+ 20 GND(LVDS)
21 RA4- 22 GND
23 RA4+ 24 GND
25 GND 26 GND
27 GND 28 GND
29 GND 30 GND
DF13-30DP-1.25 V (tin-plated) (Maker: HIROSE DENKI)
[Conforming connector] Housing: DF13-30DS-1.25C Contact: DF13-2630SCF
(3-2) Signal connector [CN2]
Pin No. Signal name Pin No. Signal name
1 R
A
0- 2 GND
(
LVDS
)
3 RA0+ 4 SCL
5 RA1- 6 GND
7 RA1+ 8 SDA
9 RA2- 10 GND(LVDS)
11 RA2+ 12 CPUGO
13 RACLK- 14 PDPGO
15 RACLK+ 16 IRQ
17 RA3- 18 PDWN
19 RA3+ 20 GND(LVDS)
21 RA4- 22 GND
23 RA4+ 24 GND
25 GND 26 GND
27 GND 28 GND
29 GND 30 GND
DF13-30DP-1.25 V (tin-plated) (Maker: HIROSE DENKI)
[Conforming connector] Housing: DF13-30DS-1.25C Contact: DF13-2630SCF