Sony STR-DA333ES - Fm Stereo/fm-am Receiver User manual

– 1 –
US Model
Canadian Model
SERVICE MANUAL
FM STEREO FM-AM RECEIVER
MICROFILM
SPECIFICATIONS
STR-DA333ES/DA555ES
— Continued on next page —
Photo: STR-DA555ES

STR-DA333ES/DA555ES
– 19 – – 20 –
5-3. SCHEMATIC DIAGRAM – DIGITAL (1/3) SECTION –
• See page 18 forWaveforms.
• See page 25 for PrintedWiring Board.
• See page 59 for IC Block Diagrams.
• See page 68 for IC Pin Functions.
(Page 21)
(Page 22) (Page 22)
(Page 23)
(Page 53)

STR-DA333ES/DA555ES
– 21 – – 22 –
5-4. SCHEMATIC DIAGRAM – DIGITAL (2/3) SECTION –
• See page 25 for PrintedWiring Board.
• See page 60 for IC Block Diagrams.
(Page 52)(Page 40)(Page 29)
(Page 29)
(Page 30)
(Page
23)
(Page
23)
(Page 19) (Page 20) (Page 20)

STR-DA333ES/DA555ES
– 23 – – 24 –
5-5. SCHEMATIC DIAGRAM – DIGITAL (3/3) SECTION –
• See page 18 forWaveforms.
• See page 65 for IC Pin Functions.
(Page
22)
(Page
22)
(Page
20)
(Page 36)
(Page 36)(Page 55)(Page 44)(Page 29, 30)

STR-DA333ES/DA555ES
– 29 – – 30 –
5-8. SCHEMATIC DIAGRAM – MAIN (1/3) SECTION –
• See page 61 for IC Block Diagrams.
(Page
31)
(Page 21)
(Page 23)
(Page 22)
(Page 21) (Page 36)(Page 36)
(Page 33)(Page 33) (Page 33)

STR-DA333ES/DA555ES
– 31 – – 32 –
5-9. SCHEMATIC DIAGRAM – MAIN (2/3) SECTION –
• See page 27 for PrintedWiring Board.
• See page 61 for IC Block Diagrams.
(Page
35)
(Page
30)
(Page 34)(Page 34)(Page 34)(Page 33)
(Page
48)
(Page
48)
(Page
48)

STR-DA333ES/DA555ES
– 33 – – 34 –
5-10. SCHEMATIC DIAGRAM – MAIN (3/3) SECTION –
• See page 27 for PrintedWiring Board.
(Page 30)
(Page 55)
(Page
55)
(Page
40)
(Page
48)
(Page
47)
(Page 32)(Page 32)(Page 31)(Page 31)(Page 29)(Page 29)
(Page 56)
(Page
52)
(Page
40)

STR-DA333ES/DA555ES
– 35 – – 36 –
5-11. SCHEMATIC DIAGRAM – AMP SECTION –
(Page
31)
(Page
24)
(Page 43)
(Page 44)
(Page 30)
(Page 30)
(Page 24)

STR-DA333ES/DA555ES
– 39 – – 40 –
5-13. SCHEMATIC DIAGRAM –VIDEO SECTION –
• See page 62 for IC Block Diagrams.
(Page 22)
(Page 52)
(Page
33)
(Page
34)
(Page
48)

STR-DA333ES/DA555ES
– 43 – – 44 –
5-15. SCHEMATIC DIAGRAM – DISPLAY SECTION –
• See page 18 forWaveforms.
• See page 61 for IC Block Diagrams.
• See page 63 for IC Pin Functions.
(Page
36)
(Page
55) (Page
52) (Page 23)
(Page 36)

STR-DA333ES/DA555ES
5-17. SCHEMATIC DIAGRAM – SPEAKER SECTION –
• See page 61 for IC Block Diagrams.
– 47 – – 48 –
(Page 34)
(Page 40)
(Page 34)
(Page 32)
(Page 32)
(Page 32)

STR-DA333ES/DA555ES
– 51 – – 52 –
5-19. PRINTEDWIRING BOARD – AUDIO SECTION –
• See page 17 for Circuit Boards Location.
(Page 42)
(Page 46)
(Page 25)
(Page 28)
5-20. SCHEMATIC DIAGRAM – AUDIO SECTION –
• See page 61 for IC Block Diagrams.
(Page 22)
(Page 44)
(Page 40)
(Page 33)

STR-DA333ES/DA555ES
– 53 – – 54 –
5-21. SCHEMATIC DIAGRAM – INPUT SECTION –
(Page 20)
5-22. PRINTEDWIRING BOARD – INPUT SECTION –
• See page 17 for Circuit Boards Location.
(Page
25)

STR-DA333ES/DA555ES
5-23. SCHEMATIC DIAGRAM – POWER SECTION –
• See page 61 for IC Block Diagrams.
– 55 – – 56 –
(Page 43)
(Page 34)
(Page 34)
(Page 24)
(Page 34)

STR-DA333ES/DA555ES
5-25. IC BLOCK DIAGRAMS
IC1101 CXD8495AQ (DIGITAL BOARD)
TIMING
GENERATOR
37
38
39
40
41
42
43
44
45
46
47
48
24
23
22
21
20
19
18
17
16
15
14
13
123456789101112
3536 34 33 32 31 30 29 28 27 26 25
X' TAL
OSC
MUTING
OUTPUT
ERROR LOCK
DETECTION
DATA
DEMODULATOR
MICRO COMPUTER
INTERFACE
MULTI PLEXER
TEST
PLL CIRCUIT CD SUB-CODE
DETECTION
LD/DQSY
SRDT
D0
DI/SWDT
CE/XLAT
CL/SCLK
D VDD
DIN1
DIN2
DIN3
DIN4
DGND
D GND
SBCK
SFSY
PW
SBSY
D VDD
VCO
V IN
A GND
R
A VDD
N.C.
LRCK DATA OU
T
BCLK SUB 2 SUB 1 D GND ERROR CLK OUT2 CLK OUT1 X OUT X IN D VDD
DOUT/V
EMPHA
RC1 RC2
CCB/SUB
D GND
CLKMD
CLK
TEST1 TEST2
X MODE
D VDD
IC1106 CS4926 (DIGITAL BOARD)
DATA0,EMAD0,GPIO0
DATA1,EMAD1,GPIO1
DATA2,EMAD2,GPIO2
DATA3,EMAD3,GPIO3
DATA4,EMAD4,GPIO4
DATA5,EMAD5,GPIO5
DATA6,EMAD6,GPIO6
DATA7,EMAD7,GPIO7
VSS2
VDD2
A0,SCCLK
WR,
DS,
EMWR,
GPIO10
MCLK
CLK IN
XMT958
EXTMEM, GPIO8
PARALLEL
or
SERIAL
HOST
INTERFACE
COMPRESSED
DATA INPUT
INTERFACE
SP DIF
RECEIVER
DIGITAL
AUDIO
INPUT
INTERFACE
PLL
CLOCK
MANAGER
RAM
INPUT BUFFER
RAM
OUTPUT BUFFER
OUTPUT
FORMATTER
30
CMPREQ,LRCKN2 29
CLKSEL 31
FILTD 32
FILTS 33
VDDA 34
VSSA 35
RESET 36
DD 37
DC 38
21
ABOOT, INTREQ
20
SCDIO, SCDOUT, PSEL, GPIO9
19
CMPCLK, SCLKN2
28
CMPDAT, RCV958, SDATAN2
27
LRCKN1
26
SCLKN1, STCCLK2
25
VSS3
24
VDD3
23
SDATAN1
22
CS
18
7
44
SCLK
43
LRCLK
42
AUDATA0
41
AUDATA1
40
AUDATA2
39 4
RD,
R/W,
EMOE,
GPIO11
5
A1,
SCDIN
6
3
FRAMER SHIFTER
INPUT BUFFER CONTROLLER
17
16
15
14
13
12
11
10
9
8
VSS1
2
VDD1
1
RAM
PROGRAM MEMORY
RAM
DATA MEMORY
ROM
PROGRAM MEMORY
ROM
DATA MEMORY
24-Bit
DSP
PROCESSING
STC
IC1109 TC74VHC393FT(EL) (DIGITAL BOARD)
14 13 12 11 10 9 8
1234567
QAQBQCQD
A
CLEAR
VCC
QAQBQCQD
A
CLEAR
GND
IC1202 AK4324-VF-E2 (DIGITAL BOARD)
IC3310 TC74HC151AF (DIGITAL BOARD)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
D3D2
D1
D0
Y
W
SC
D4
D5
D6
D7
A
B
D3
D2
D1
D0
Y
XY
OE
GND
V CC
D4
D5
D6
D7
A
B
C
IC1210 AK5352-VF-E2 (DIGITAL BOARD)
182315172224131245 19 20
21
8 10 11 14
SCLK SMODE1 SMODE2 MCLK CMODE VB DGND VD VA AGND
VREF
AINL+
AINL–
AINR+
AINR–
LRCK
FSYNC
SDATA
TST1
9
HPFE
16
PD
TST2 TST3 TST4
Clock Divider
Voltage
Reference
Modulator
Serial Output
Interface
Digital Decimation
Filter
3
6
7
1
2
Modulator
DVSS
DVDD
PD
SMUTE
DFS
DEM0
DEM1
1
2
CKS
MCLK
3
4
5
BICK
SDATA
LRCK
6
7
8
9
10
11
12
DIF2
DIF1
DIF0
13
14
15
AVSS
VREF
AVDD
DZFR
DZFL
20
21
22
23
24
AOUTL–
AOUTL+
18
19
SCF
∆∑
MODULATOR
8x
INTERPOLATOR
AOUTR–
AOUTR+
16
17
SCF
∆∑
MODULATOR
8x
INTERPOLATOR
SERIAL INPUT
INTERFACE
CLOCK
DIVIDER
DEEMPHASIS
CONTROL
– 59 – – 60 –

– 61 –
IC103 LB1638MTE (DISPLAY BOARD)
1
2
3
4
5 6
7
8
9
10
GND
IN1
VCC
IN2
GND N.C.
OUT2
VS
OUT1
N.C.
CONTROL LOGIC
IC202,203 LC7821 (MAIN/AUDIO BOARD)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
CONTROL
LATCH
SHIFT RESISTER
LEVEL SHIFT
CL
DI
CE
VEE
L COM3
L7
L COM2
L5
L4
L2
VSS
S
RES
VDD
R COM3
R8
R7
R COM2
R6
R4
R2
R5
R COM1
R3
R1
L3
L1
L COM1
L6
L8
BUFFER
IC901 NJM2103D (PS BOARD)
1
2
3
45
6
7
8
V+
VSB/SESIN
VSA
RESET
GND
OUTC
VSC
CR
VREF
+–
–+
–
+
–
+
Q
R S
IC501,601,701 uPC2581V (REAR AMP/MAIN BOARD)
235
46798
1
MUTE
+ VOUT1 – VOUT1
COMP1
MF1
IN1
GND
IN2
NF2
COMP2
– VOUT2 + VOUT2
VCC1 VCC2
VEE
PROTECTOR
BIAS CIRCUIT
REG DRIVE PRE
DRIVE
11
10 12 13 1514
DRIVE
PRE
DRIVE

– 62 –
IC351 LC7822 (MAIN BOARD)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
CONTROL
LATCH
SHIFT RESISTOR
LEVEL SHIFT
CL
DI
CE
VEE
OUT
IN
OUT
IN
OUT
IN
VSS
S
RESET
VDD
OUT
ININ
OUT
IN
OUT
IN
IC811,812,813 NJM2296D (S.VIDEO/VIDEO BOARD)
9
S5
S6 S7
S4
S1 S2
S3
Vout1
Vout2 Vout3
V-
GND
SW3
SW2SW1
SW5 SW4
Vin1 Vin2
Vin3Vin4Vin5
V+
10111213141516
1 52 3 4 6 7 8