Sony STR-DB925 User manual

– 1 –
MICROFILM
AEP Model
UK Model
Australian Model
SPECIFICATIONS
SERVICE MANUAL
FM STEREO/FM-AM RECEIVER
STR-DB925
— Continued on next page —
Photo:BLACK
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– 16 –
1
2
IC103 !¡ X2
IC102 *™ XO
WAVEFORMS
– DISPLAY SECTION –
1
IC1 !£
– TUNER SECTION –
1
2
IC1101 @¶ X OUT
IC1201 (™ XO
– DIGITAL SECTION –
3
4
IC1101 #¢ BCK
IC1101 @ª CLK OUT
5
6
IC1403 02QB
IC1101 #§ LRCK
7
8
IC1305 6
IC1305 !¡, !™
3.2Vp-p
4MHz
4Vp-p
7.28MHz
3.2Vp-p
4.33MHz
4Vp-p
4MHz
3.6Vp-p
24.576MHz
4.8Vp-p
12.28Vp-p
4.8Vp-p
3MHz
4.8Vp-p
48MHz
3Vp-p
12.27Vp-p
0.56Vp-p
49.152MHz
3Vp-p
12.28MHz
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– 17 – – 18 –
STR-DB925
3-3. SCHEMATIC DIAGRAM – INPUT SECTION –
• See page 58 for IC Block Diagrams.
(Page 38) (Page 38)
(Page 53)
(Page 41) (Page 45) (Page 45) (Page 45)
(Page 21)
(Page 29)
(Page 30)
(Page 22)
(Page 42) (Page 46)
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– 21 – – 22 –
STR-DB925
3-5. SCHEMATIC DIAGRAM – POWER AMP SECTION –
(Page 18)
(Page 29)
(Page 29)
(Page 29)
(Page 26)
(Page 26)
(Page 53)
(Page 18)
(Page 30)
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– 25 – – 26 –
3-7. SCHEMATIC DIAGRAM – TRANS SECTION –
• See page 58 for IC Block Diagrams.
STR-DB925
(Page 53)
(Page 22)
(Page 22)
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– 29 – – 30 –
3-9. SCHEMATIC DIAGRAM – REAR AMP SECTION –
STR-DB925
(Page 18)
(Page 21)
(Page 21)
(Page 22)
(Page 18)
(Page 51)
(Page 22)
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– 33 – – 34 –
STR-DB925
3-11. SCHEMATIC DIAGRAM – DISPLAY SECTION –
• See page 16 forWaveforms.
• See page 57 for IC Block Diagrams.
• See page 60 for IC Pin Functions.
(Page 38)
(Page 38)
(Page 37)
(Page 45)
(Page 51)
(Page 51)(Page 42)
(Page 37)
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– 37 – – 38 –
3-13. SCHEMATIC DIAGRAM – PANEL SECTION –
STR-DB925
(Page 34)
(Page 33)
(Page 34)
(Page 34)
(Page 17)
(Page 17)
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– 41 – – 42 –
STR-DB925
3-15. SCHEMATIC DIAGRAM – BACK PANEL SECTION –
• See page 16 forWaveforms.
• See page 58 for IC Block Diagrams.
(Page 42)
(Page 33)
(Page 46)
(Page 17)
(Page 41)
(Page 51)
(Page 17)
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– 45 – – 46 –
STR-DB925
3-17. SCHEMATIC DIAGRAM –VOLUME SECTION –
(Page 18)
(Page 18)
(Page 18)
(Page 34)
(Page 41)
(Page 18)
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– 49 –
STR-DB925
3-19. SCHEMATIC DIAGRAM – D IN/OUT SECTION –
• See page 58 for IC Block Diagrams.
(Page 54)
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– 51 – – 52 –
STR-DB925
3-21. SCHEMATIC DIAGRAM – DIGITAL (1/2) SECTION –
• See page 16 forWaveforms.
• See page 64, 67 for IC Pin Functions.
• See page 55 for Printed Wiring Board.
(Page 42)
(Page 30)
(Page 34)
(Page 34)
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– 53 – – 54 –
STR-DB925
3-22. SCHEMATIC DIAGRAM – DIGITAL (2/2) SECTION –
• See page 16 forWaveforms.
• See page 59 for IC Block Diagrams
(Page 22)
(Page 25)
(Page 17)
(Page 49)
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– 57 – – 58 –
STR-DB925
3-24. IC BLOCK DIAGRAMS
IC103 BA6208
1 2 3 4 5 6 7 89
NC
OUTPUT 2
Vcc
GND
NC
INPUT 2
INPUT 1
NC
MOTOR
DRIVE
MOTOR
DRIVE
REG
SWITCH
SWITCH
OUTPUT1
IC201 NJM2296D
9
S5
S6 S7
S4
S1 S2
S3
Vout1
Vout2 Vout3
V-
GND
SW3
SW2SW1
SW5 SW4
Vin1 Vin2
Vin3Vin4Vin5
V+
10111213141516
1 52 3 4 6 7 8
IC104 MSC1162AGS-BK
IC105 MSC1164GS-KR1
IC301 LC7822
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
CONTROL
LATCH
SHIFT RESISTOR
LEVEL SHIFT
CL
DI
CE
VEE
OUT
IN
OUT
IN
OUT
IN
VSS
S
RESET
VDD
OUT
IN
IN
OUT
IN
OUT
IN
IC303 LC7823
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
CONTROL
LATCH
SHIFT RESISTOR
LEVEL SHIFT
CL
D1
CE
VEE
L1
L2
L COM1
L3
L4
L COM2
L5
L6
L COM3
L7
R1
R2
R COM1
R3
R4
R COM2
R5
R6
R COM3
R7
L COM4
VSS
S
RES
VDD
R COM4
IC414 TC9299P
1
2
3
4
5
16
15
14
13
12
6
7
8
11
10
9
CK
GND
CS1
DATA
STB
CS2
A-GND
NC
IN
OUT
VSS
A-GND
NC
IN
OUT
VDD
L-CH
DATA
LATCH
CIRCUIT
LEVEL
SHIFT
CIRCUIT
SHIFT
REGISTER
(13bit)
STROBE
GENERATOR
CIRCUIT
LEVEL
SHIFT
CIRCUIT
R-CH
DATA
LATCH
CIRCUIT
R-ch
L-ch
IC501 uPC2581V
IC901 NJM2103D
IC1005 TC74HC151AF (EL)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
D3D2
D1
D0
Y
W
SC
D4
D5
D6
D7
A
B
D3
D2
D1
D0
Y
XY
OE
GND
V
CC
D4
D5
D6
D7
A
B
C
IC1006 TC74HC08AF (EL)
1
2
3
4
5
6
78
9
10
11
12
13
14
1A
1B
1Y
2A
2B
2Y
GND
VCC
4B
4A
4Y
3B
3A
3Y
1
2
3
4
5
6
7
8
9
10
OUTPUT CIRCUIT
GATE
CIRCUIT
40 BIT
LATCH
40 BIT
SHIFT
REGISTER
HVO1
HVO2
HVO3
HVO4
HVO5
HVO6
HVO7
HVO8
HVO9
HVO10
HVO11
HVO12
HVO13
HVO14
HVO15
HVO16
HVO17
HVO18
HVO19
HVO20
VHV
GND1
GND2
CL
NC
LS
NC
R/L
DIN
VCC
HVO40
HVO39
HVO38
HVO37
HVO36
HVO35
HVO34
HVO21
HVO33
HVO32
HVO31
HVO30
HVO29
HVO28
HVO27
HVO26
HVO22
HVO25
HVO24
HVO23
NC
VHV
GND1
GND2
NC
CHG
NC
CLK
DOUT
VCC
CK
CK
DOUT
DIN
11
12
13
14
15
16
17
18
19
20
50
49
48
47
46
45
44
43
42
41
60
59
58
57
56
55
54
53
52
51
40
39
38
37
36
35
34
33
32
31
21
22
23
24
25
26
27
28
29
30
20 BIT
SHIFT
REGISTER
20 BIT
LATCH
GATE
CIRCUIT
OUTPUT CIRCUIT
NC
NC
DOUT
LS
CL
VCC
HVO20
HVO19
HVO18
HVO17
HVO16
HVO15
HVO14
HVO13
HVO12
HVO11
HVO1
Vhv
GND
CLK
DIN
CHG
NC
D
CK
CK
Q
HVO2
HVO3
HVO4
HVO5
HVO6
HVO7
HVO8
HVO9
HVO10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
32
31
PROTECTOR
DRIVE
123 4 56 7 8 9 10 11 12 13 14 15
PRE
DRIVE
PRE
DRIVE
BIAS CIRCUIT
REG
MUTE
+VOUT1
–VOUT1
COMP1
NF1
IN1
GND
IN2
NF2
COMP2
–VOUT2 +VOUT2
VCC1 VCC2
VEE
DRIVE
1
2
3
45
6
7
8
V+
VSB/SESIN
VSA
RESET
GND
OUTC
VSC
CR
VREF
+–
–+
–
+
–
+
Q
R S
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– 59 –
DATA0,EMAD0,GPIO0
DATA1,EMAD1,GPIO1
DATA2,EMAD2,GPIO2
DATA3,EMAD3,GPIO3
DATA4,EMAD4,GPIO4
DATA5,EMAD5,GPIO5
DATA6,EMAD6,GPIO6
DATA7,EMAD7,GPIO7
VSS2
VDD2
A0,SCCLK
WR,
DS,
EMWR,
GPIO10
MCLK
CLK IN
XMT958
EXTMEM, GPIO8
PARALLEL
or
SERIAL
HOST
INTERFACE
COMPRESSED
DATA INPUT
INTERFACE
SP DIF
RECEIVER
DIGITAL
AUDIO
INPUT
INTERFACE
PLL
CLOCK
MANAGER
RAM
INPUT BUFFER
RAM
OUTPUT BUFFER
OUTPUT
FORMATTER
30
CMPREQ,LRCKN2 29
CLKSEL 31
FILTD 32
FILTS 33
VDDA 34
VSSA 35
RESET 36
DD 37
DC 38
21
ABOOT, INTREQ
20
SCDIO, SCDOUT, PSEL, GPIO9
19
CMPCLK, SCLKN2
28
CMPDAT, RCV958, SDATAN2
27
LRCKN1
26
SCLKN1, STCCLK2
25
VSS3
24
VDD3
23
SDATAN1
22
CS
18
7
44
SCLK
43
LRCLK
42
AUDATA0
41
AUDATA1
40
AUDATA2
39 4
RD,
R/W,
EMOE,
GPIO11
5
A1,
SCDIN
6
3
FRAMER SHIFTER
INPUT BUFFER CONTROLLER
17
16
15
14
13
12
11
10
9
8
VSS1
2
VDD1
1
RAM
PROGRAM MEMORY
RAM
DATA MEMORY
ROM
PROGRAM MEMORY
ROM
DATA MEMORY
24-Bit
DSP
PROCESSING
STC
14 13 12 11 10 9 8
1234567
GND
VCC
DAC LPF VR
DAC LPF VR
DAC LPF VR
DAC LPF VR
DAC LPF VR
DAC LPF VR
28
27
26
ROUT1
LOUT1
ROUT2
25
24
23
LOUT2
ROUT3
LOUT3
HPF ADC
HPF ADC
32
31
30
RIN+
RIN-
LIN+
29 LIN-
33 VREFL
Audio
I/F
6
7
8
SDTI1
SDTI2
SDTI3
9
10
11
SDTO
DAUX
DFS
2
3
4
OCKS
M/S
BICK
5
LRCK
1
SDOS
17 18 19
PD
XTS
ICKS1
20 21 22
ICKS0
CAD1
CAD0
13 14 15
DEM0
MCKO
DVDD
16
DVSS
12
DEM1
39 38 37
PD
XTS
ICKS1
36 35 34
ICKS0
CAD1
CAD0
43 42 41
DEM0
MCKO
DVDD
40
DVSS
44
DEM1
SDTI1
SDTI2
SDTI3
BICK
LRCK
SDOUT
XTO XTI
Clock Gen
MCLK
MCLK
1/2
DEM OCKS
14 13 12 11 10 9 8
1234567
QAQBQCQD
A
CLEAR
VCC
QAQBQCQD
A
CLEAR
GND
IC1103 AK4526
IC1301 CS4926
IC1403TC74VHC393FT (EL)
IC1108 MC74HC00AF
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