Sony STR-S5L User manual

rM/AM
AEP Model
UK Model
STEREO
RTGE
I[|ER
SPECIFICATIONS
Amplitier section
Continuous
RMS
power
output
(less
than0.05%
THD,
bothchannelsdrivensimultaneously)
At 1kHz
60 + 60watts
(8
ohms)
At 20
Hz
,20 k{z
50 + 50watts
(8
ohms)
Accordingto DIN 45500
50 + 50watts
(8
ohms)
Power
bandwidth
(lHF) 10Hz 40kHz
Harmonicdistortion Lessthan
0.0596at rated output
Intermodulation
(lM)
distortion
(60
Hz:7kHz
= 4:1)
Lessthan0.05%at rated outout
Damping
factor 50at 10kHz,8 ohms
Dynamic
headroom 1.4
dB
Residual
noise Lessthan
250
fV at I ohms
Inouts
lmpedance
47k ohms 76dB
Frequencyresponse
Tone
controls
PHONO: RIAA
equalization
curver0.5
dB
AUX,
TAPE: .10
Hz
-100
kHz
+0.5
dB
BASS: +8 dB at .100
Hz
TREBLE
: +8
dBat 10kHz
SOUNDENHANCER: +8 dB
(80
Hz)
+ 6 dB (800 Hz)
+I dB (8 kHz)
Acceptslow impedanceheadphones
- Continuedon next page
-
SAFETY.BELATED COMPONENTWARNING!
!
COMPONENTSIDENTIFIED BY SHADING AND MARK
A oN THE ScHEMATIc DIAGRAMS, EXPLoDED
VIEWS AND IN THE PARTS LIST ARE CRITICAL TO
SAFE OPERATION. REPLACË THESE COMPONENTS
WITH SONY PARTS
WHOSEPART NUMBERS APPEAR
AS SHOWN IN THIS MANUAL OR IN SUPPLEMENTS
PUBLISHED
BY SONY.
SOhTY
50k ohms 105dB
50k ohms 105 dB
Outputs
RECOUT
HEADPHONES
2-5mV
SPEAKERS
SERVICE
MANUAL

FM tunor seclion
Tuningrange
Antenna
terminals
Intermediate
frequency
Sensitivily
Usablesensilivity
Signal-to-noise
ratio
Harmonic
distortion
Separation
Frequency
response
Selectivity
Captureratio
AM suppressionretio
lmage responseratio
lF response
ratio
Spuriousresponseratio
FIFintermodulation
Autotuninglevel
87.5
- 108.0MHz
300ohmsbalanced,75
ohms
unbalanced
10.7MHz
at 46 dB quieting
17.3dBf,4
fV (mono)
38.3
dBt, 45
fV (stereo)
10.3
dBf
, 1.8
riv(lH
F)
9.3
dBf
, 1.6
gV (S/N
26dB)
75
dB (mono),
70
dB (stereo)
at 1 kHz
0.15%
(mono),
0.3%
(stereo)
45dB at 1kHz
40Hz-12.5kxz
1$5oe
30Hz-15kHz
19idB
55
dB (300
kHz) -
60dB (400 kHz)
r  da
54dB
80
dB
100dB
80
dB
60dB
19.2dBf
(at
(at
Selectivity
General
System
Powerrequirements
Power
consumption
ACoutlets
Dimensions
Weight
I
Superheterodyne
FM/AMluner,
pure-complementary
sEPP
AEP model: 22OV ac,50/60 Hz
UK model: 24OV ac.50/60 Hz
AEP model: 120watts
UK model: 32O
watts
2 switched total 100W
Approx.
430
x 130 x 330mm (w/h/d)
(17
x 5r/r x 13inches)
Includingproiectingparts and controls
Approx.
9.3kg (20 lb I oz),
net
Approx. 11.5kg (25 lb 6 oz) in shipping
carton
AM tunor soction
MW LW
unrng
range 522kHz- 1602
kHz 150kHz
-350 kHz
Antenna
built-inantenna provided provided
externalantenna
terminal provided provided
Intermediate
frequency 450kHz 450kHz
Usablesensitivity
built-inantenna 50dB/m (1,000
kHz) 60dB/m(230
kHz)
externalantenna 100rrV
(1,000
kHz) ''l00rrV
(230
kHz)
Signal-to-noise
ratio
(at50mv/m) 52dB 52dB
Harmonicdistortion
(at 50 mV/m, 400 Hz) 0.3% 03%
35dB (9 kHz) 35dB (9
kHz)
-2-

Generally, the insulation resistanceof the oxide
layer in MOS IC structures is very high, and the oxide
layer is very thin. Because
of this, it is possible that
the static voltages
usually presenton clothes and the
human body will be enough to generate
a potential
difference acrossthe insulator, high enough to cause
a breakdown of the insulating layer.
The following precautions should be taken while
handling theseICs.
(Particular careshould be taken under conditions
of low humidity.)
Precautions in Replacing MOS lCs
l. StorenewICsby insertingthem into aurethane-
polyester cushion (which is somewhat conduc-
tive), or wrapping it in aluminum foil, so that
all the pins are at the same
potential.
(The ICs should be stored in that manneruntil
mounted on the circuit board.)
Fig. A partially conductive
unrethane-polyester
cushion
Fig. Baluminum foil
HandlingPrecautionsfor MOS lCs
soldered
Fis. D
Fis. E
Fis. F
-3-
Equalize any potential difference betweenthe
clothes, the tools in use, the work bench,the
set being worked on, and the packaged
IC by
touching them all in succession
with the hands
or a conductive wire or tool.
The following are effectivemethods for handl-
ing ICs thai remove the potential difference
across
the oxide layer.
o Use a paper clip modified by solderingin a
wire braid insert.
J.
4.
2. Check the solderingiron for possiblepower-line
leakagecurrent. Make sure that there is no
leakage
path by connecting
anohmmeter to the
tip of the solderingiron and the plug asshown
in Fig.C. If there is a leakage
path, usesome
other soldering iron.
VOM
(9x 1O.0OOrange)
Make sure that there is
no solder on the inside.
cltp
soldered
partially conductive
urethane-polyester
cushion or aluminum
foil
Make sure that all the pins are in
contact with the wire braid hll
the pins will then be at the same
potential.).
wire braid
wire braid

o Take a short length of fine bare wire and
wind it around the IC sothat it shorts all the
pins of the IC, while it is still in the urethane-
polyester cushion or aluminum foil. This
ensures that all the pins are at the same
potential.
fine bare wire
(stripped solid hookup
wtre. etc.)
Precaution
while Checking C-MOS lCs
The C-MOS ICs
(Complementary
MOS)areMOS
ICs that have their output sections made up of
N-channeland P-channel
push-pullstages
to increase
their speed
of operation. If the output terminalof
these ICs comesinto contact with B+ or B- voltage,
then the FET which is ON at that time will either
becomeshorted or open.
This is valid for all the output sectionsthat are
connected together by the interconnections. Even
the circuits that are physically separated
(and not on
the sameboard) can be destroyed simultaneously.
Example:
If this line is grounded, or touches
B+ or B- bus. . . , the output stage
of this lC will be destroyed.
Fis. I
I
partially conductive
urethane-polyester
cushion or aluminum
foil
Fis. G
o When it is necessaryto handle the IC with
the fingers,do not touch any pin, and hold
the IC at the endsof its plastic-package
case
asshown in Fie. H.
Fis. H
5. Method of Mounting
Insert the IC while holding it with the modified
clip, and solder all the pins with the clip still
shorting the pins. (Similarly, solder
all the pins
while the bare shorting wire is still wound
around them.). Re'movethe clip or the bare
shorting wire only after all the pins have been
soldered.
-4-

I
I STR-S5
SECTION
1
OUTLINE
1-1. CIRCUIT DESCRIPTION
ISOUND
ENHANCERI
Figure A shows an amplifier from the operation
amp. Its gain is determined by NF resistors(Rl, R2)
and the gain of the operation amp. Therefore, if
frequency response is given to Rl and R2, the amp
response
can be freely formed.
The sound enhancer circuit of this model makes
3 kinds of responses by inserting a resonance circuit
parallel to R2 by a switch.
Figure B shows the resonance circuit diagram.
The section within the dotted line performs the same
task as a coil and, with C609, forms the series
reso_
nance circuit. Following is the explanation of the
section of the circuit within the dotted line.
In FigureC, by raisingthe voltageat(S, charg_
ing current i2 flows to C2 andi3 also
flow.. When
i3
flows,the potential
at@rises, sothepotential
at@
is alsopushed
up by this. At this time the currenti1
flowing from the power applied to @ is very small,
and i2 is suppliedalmosttotally as
aiesult of the rise
in voltage
at@.
However, the charging current i2 decreases
as
time elapses.
Consequently,
since
potentid at
@ aho
drops,
i1 becomes
ia and
increases
as
timeelapses.
By
loweringthe potential at@, the directionsof current
and voltage reverse
and thus operation alsoreverses.
Therefore,by applying acto point @ in tH, circuit,
thephase
of i1 lags
thevoltage
by 90o.
This is because
this circuit performsthe same
job
as
a coil. Q is determined
by thehfe,etc.,
of R2,R3,
R4, Ql. Thiscircuit is called
activefilter, andisoften
used
in graphic
equalizers.
Fis. C
Fig. A
L___
Fig. B

STR.55L
TPOWER
AMP]
CollectorFollower Output Circuit
The output stage
of the power ampisusuallyan
emitter follower, but in this model it is a collector
follower. This is because
the output circuit of the
driver IC is SEPP,
and the output transistoris driven
by this collector. FigureD is a simplified illustration
oi tfri, circuit. Q604, 605 areincluded to drive high
voltage
output stages
(maximumratedpowervoltage
for IC602 is 20V, t40V)' This is alsofavorable
to
'reducing
distortion.
Protector circuit
Fig' D
In a circuit like the one shown in Figure E, by
increasing the flow of the basecurrent i1, evenif the
transistor is saturated, ir will increase without limit'
(In a conventional emitter follower output circuit,
the emitter potential rises and this does not occur')
In this model, as shown in Figure F, a diode is in-
serted to limit the basecurrent before'the transistor
issaturated.
When this circuit is operating, in other words'
when if is flowing, base potential at @ is l '8V'
This l.8V is a result of the voltage of 0'6V
between the base and emitter of the transistor and
forward direction voltage of I '2V at the 2 silicon
diodes. By increasing ir', the potential at (D drops
to 1.2V. i1
' cannot be increasedany further; if it is
tried, i2 will flow' By limiting if in this way, the
transistor is protected. Also, this circuit has a favor-
able effect on distortion resulting from clipping'
Legato Linear Circuit
Usually, in a class-B amp, switching distortion
is generated when the positive half cycle and negative
half cycle of the signal switch. This occurs each time
the output transistor cuts off' In order to remove this
distortion, therefore, this transistor must be used so
that it does not cut off. Figure G is the output circuit
of this set. This circuit operates so that R647 and
C623 do not cut off Q606 and Q607' This is an input
signal, but during the positive half cycle, it results
from i1 f{owing to the baseof Q606 and during the
negative half cycle, from i2 flowing to the base of
Q607. I
+t
ineut
sisnarl
Fis.G
Fig. EFig. F

FUNCTIONSOFIC3O3
TERMINALS
I
S{urve
I Input
DOWN
MANU
I -
MEMO Input
When UP search
is indicated, holds at low for more than 5 msec.
when low levelis maintained during uP search,
search
continues evenwhen s{urve
voltageis applied to S-Curve
terminâI.
Auto search
station selection
input terminal.
StartsDOWN search
at low, stopswhen S-Curve
voltageis applied to S{urve terminal
and after AFC operation.
When DOWN search
isindicated, holds at low for more than 5msec'
when low levelis maintained during DowN search,
search
continues even
when s-curve
I - Manual station selection state
is cancelled
when any one of the UF,DôWN or channel
input terminals goes
low.
- Presetmemory input terminal.
- Enablesmemory while it is holding at low.
- The external comparator output signal
which forms the A/D convertel during manual
mode is applied.
- At high, counts up 10 bits data and ladder output voltagerises.
At low. counts down 10 bits data and ladder output voltage decreases.
Output terminal which controls radio sensitivity during auto search.
At low only during search;
usually at high.
;T*-
Pin No. Pin Name Input/Output Function
ICRr Input/Output Generates
LSI systembasicclock signal
by connecting to CR time constant circuit and
forming oscillator circuit. (oscillation period: 0.8 msec)
2CRz Input/Output Forms
timer
circuit
by connecting
withCRtimeconstant
circuit.
Determines
pulse
width,etc.of MUTEoutputsignal
duringband
switching.
(operation
time:0.5sec)
JBUC Input Back-up control terminal; is in back-up stateat low level
TEST Input TEST terminal of LSI internal circuit.
In TEST stateat high level.
fFM Input FM band input terminal.
At low, achieves
FM reception stateand maintains it evenif it later goes
high.
(Holds
at low for more than 5 msec.)
6MW Input MW band input terminal.
At low, achieves
MW reception stateand maintains it evenif it later goes
high
(Holds
at low for more than 5 msec.)
7LW Input
LW band input terminal.
At low, achievesLW reception stateand maintains it evenif it later goes
high.
(Holds at low for more than 5 msec.)
8F/A OUT Outpu Outputs control signal
which indicates
band reception state.
FM band . .... high
AM band low (MW/LW)
lo M/L OUT Output
Outputs control signal
which indicatesband reception state.
MWband.....high
LWband.
.... low
Not usedin this model.
l0 CVOUT Output Output of analogsignal
transfer gate;outputs varactor impressed
voltage.
Input qi analogsignal
transfergate;inputs ladder output voltage.
11 CV IN lnput
t2 Manu Tune Input Input of analogsignal
transfergate;inputs
l:"19,'
Inputs S-Curve
voltage of F-M,AM.
tuning voltage generated by vari4ble
- Input of LSI comparator; inputs control signal for AFC operation'
.Auto search
station selection
input terminal'
StartsUP search
at low, stopswhen S-Curve
voltageis applied to S-curve terminal
after AFC operation.
-7-

PinNo. Pin Name Input/Output Function
20 M-IND Output Signaloutput which indicatesmanual station selectionstate.
N channelopen drain output form (at low during manual station selection).
Not used
in this model.'
2l Vnl - LSI power supply; During operation: +9V; Back-up: +5V
22 MUTE Outpul - Output terminal for control signalwhich eliminates undesirable
noiseduring station
selection.
- At high during search,
presetstation selectionand band switching.
ZJ F-Tune Output
Fine tuning output terminal.
Generates voltage for fine tuning by connecting with low passfilter.
Adjusts voltageat mixing resistor and loadsit to ladder output voltage
(50% duty signalexcept during fine tuning: T = 1.5msec).
Outputs 8 stage
pulse modulation signal
during fîne tuning.
24 Vref - Reference
voltage(+8V) for D/A converter, comparator.
25-34 Bl-Bl0 Output Output for l0 bit-
UP/DOWN counter (including ladder.buffer).
Performs D/A conversionbv connectins ladder resistor.
3s Vss - GND terminal of LSI
36-42 CHl_CH7 Input/Output
Channel
input terminal.
output terminal for station reception indication. (including N channelopen drain form
LED driver.)
At low, memorized station is selected.
when MEMô terminal is at low. and any one of cFIt -cH5 goes
low, the station being
received
is memorized.
Hold at low for station selectionor memory for more than 20 msec.
Note: A
ex: terminal with bar over its name operates when OV isapptied.
Fil,_
-8-

CIRCUIT
DIAGRAM
AROUNDIC3O3
l_-l
|.--r'rs-+]
F\I
il>-l
STATION
VOLTAGT
FUNCTION
SETEC
rc304
0,8mS ---T---r
+vtpI
9.5V
-l ou
R319
R3
17
ioiFrcHl
| 1 "',*t I
|MPE0aNCE
CoNV
I
REFERINCE
I
JOU VOLTAGE +
,n__o
w
__rÈl I
O3O5:SWIÎCH
OVERTHE
VOLTAGE
FOR
FMOR
ATfmin
Q3O4:SWITCH
OVERTHE
VOLTAGEFOR
FMOR
AT fmor
rc302
OCAMP
MUTING
CIRCUIT
FI,|MODÊ:
LOW
SELECTION
WHEN
BAND
IS
SELECTTO
z
J
-9-

STR.S5L
0306
8+ FORMW
B+ FOR
LW
B+ FOR
FM
-10-

FUNCTIONS
OF IC
305TERMINALS
Pin
No Pin Name Input Outpul Function
IVno . B+power
supply
2PO\ryER
.oN Input o Achieves back-up state of the internal memory and flip-flop at low level.
o Achieves operation state at high level.
3I!-il.{D IN lnput
o When low level is maintained in band division state (F/A IN: low level), enables alternate
designationof the band with AM input.
o When the terminal M-IND IN and CHI - CH7 arehigh level at band division state (F/A IN:
low level), enables alternate designation of the band with VT UPiDOWN terminal.
4MEMOIN Input
. Inputterminalof bandmemory.
oWhen at low, and terminals eHl - CH7 trotd at low for more than 2Omsec,enables
memorizationof thebandbeingreceived
(BANDI or BAND II).
o Employedby connectingin parallel
with the terrninal
MEMOof IC 303(LC'1207).
5w
uP/DOWN Input . Input terminal which designates the band (BAND I/BAND II) alternately by receiving the
leading or trailing differentiation signal of automatic search sweepvoltage (UP SEARCH).
6F/A IN Input r Employed by connecting to the terminal F/A OUT of IC 303 (LC72O7).
. At low level, achieves the band division state.
BAND-(ii) Output o At low level,designates
the band II.
r When the terminal (F/A IN is at high level, achieves the band division stâte (low level or
high level).
8BAND(I) Output . At low level,designates
thebandI-
. When
theterminalAM islow, achieves
thebanddivisionstate
(low or high).
Whenthe terminalF/A IN ishighlevel,the output of this terminalbecomesin highlevel.
9AM Input
r When the terminal Ni:IND-TN
is low at band division state(F/A IN: low level),becomes
theinputwhich designates
thetoggleoperation
of bands
(BANDI/BAND II)
(chatter
time:6 - 12 msec)
. At lowlevel,eithertheterminalEÂNDI-orBA-ND-lf
goes
simultaneouslylow.
o Not usedin thismodel.
10 CLK Input o Employedby connecting
in paraÏel with theterminalCRI or IC303
(LC7207).
o Inputfor LC7000systemclock.
11
l,
t'l
cHl-CH7 Input
o Employed by connecting in parallel with terminals CHI - CH7 of IC 303 (at low level,
channelband designationis performed)
. Input terminal of band designation (BAND I/BAND II) of eachchannel (CH1 - CH7).
o Priority during simultaneous
designations.
18 Vss o B- power
supply
t9 RST Input . When
this terminalgoes
high,internalmemoryandflip-flop are
reset.
20 MUTE Output . Outputs the muting signal (high level) when depressing simultaneously the channel switch
(cHl - cH7).

sTR-S5L
1.2. BLOCKDIAGRAM
FII,,IFRONT_END
r----- ----]
L90l
LW/MW
FERRITE
'.âr
o(il)o
-8irB-
"iie
tr
s80r s802
Em-L!rv'-ËlE
UP
B+
DOWN
8-
FM
AM
AUX
"o{
@
SWITCHING
8504
SWTCHING
0505,506
SUTCHING
0313
-12-

STR-S5L
rxltEEexH,
t
E
)
ts
z
SWITCHING
0305

rR-s5L
rc602,702
0607,707
I
c302
lc60r
Q60r-603,701-703
0804,806
0805,807

sTR-S5
TOPCOVERREMOVAL:
Remove
the
fourscrews.
EOUALIZER
BOARDREMOVAL HEAT
SINKREMOVAL
)
SECTION
2
DISASSEMBLY
Note: Follow the disassembly
procedure
in the numericalorder
given.
I
I
)
-15-

STR-S5L

srR-s51
BOTTOM
PLATE
REMOVAL
@ Loose, the screws.
SUB.PANEL
REMOVAL
The main board can be checked in this condition.
@svrrsxo
g
G)
avrr sxo
SOUND
^{
l\-,/
,l''<'v
/'^, v
@nu,-^-(
6.l- >
Ql
uauuat\Gt BVrrsx6
O BVTTgx6
CIRCUIT
BOARD
BRACKET
(B}
REMOVAL
GtrApsxe
OBVrr3x6
Glevrrsxa
@ Remove the-heat sink

5TR.55L

STR.S5L

sEcTroN3
ADJUSTMENTS (
EMsEcnonl
AM rf signal
generator
| .--'--- I
If _/\ | .t :ii":::",3î!;y,{:
I L--/^,) | /v the set.
I \'--r--
30To amPlitude
modulation bY
40OHz signat
o Repeat the procedures in each adjustment
several times, and the frequency coverage and
tracking adjustments should be finally done by
the trimmer capacitors.
{
{
(
VTVM
REC
OUT
Adjust for amaximumreading
on VTVM
Adjust for a maximum reading
on VTVM
LW
FREOUENCY
COVERAGE
ADJUSTMENT
Adjust for a maximum reading
on VTVM.
ltlUl,
FREOUENCY
COVERAGE
ADJUSTMENT
Adjust for a-maximum reading
on VTVM
-20-