Sony TRINITRON AE-6B User manual

AE-6B (KV-32LS65AUS) CHASSIS
OPERATION MANUAL

TABLE OF CONTENTS
Chapter 1. AE-6B Chassis Concept 1
1.1 Features 1
1.2 Specifications 2
1.3 21 Pin Connector 3
1.4 Board Overview 4
Chapter 2. Power Supply Circuit 5
2.1 Power Supply Block Overview 5
2.2 Function Overview 5
2.3 Overvoltage Protection 10
2.4 Overcurrent Protection 10
2.5 Protection Circuit of Power Block 10
Chapter 3. Video Processing Circuit 13
3.1 VSP9407 Features 14
3.2 Features of CRT Driver (CXA2100) 17
Chapter 4. Micro Controller 19
4.1 Features of SAA5667 Micro Controller 19
Chapter 5. Audio Circuit 20
5.1 Features of MSP3411G-B9 22
5.2 Features of TDA7497 Triple Amplifier 22
Chapter 6. Deflection Circuit 24
6.1 Deflection Block AE-6B (Protection) 29
i

Chapter 1 AE-6B Chassis Concept
1.1 Features
This is a new Chassis but some circuits are referred from other
chassis. The Deflection Circuit and the Back End (CXA2100) are
based on AE-5 chassis. Besides, its Power Supply Circuit is almost the
same as FE-2 chassis.
It is a 100 Hz FD Trinitron and Digital Plus (ABAB) model with 16:9
lifestyle cosmetic design concept. Its Digital Noise Reduction (DNR)
allows users to reduce the picture noise visible in the broadcast signal.
Virtual Dolby sound effect can simulate the sound effect of “Dolby
Surround Pro logic”. Dolby Surround sound effect could be created
by simulating the sound of four speakers with two speakers provided
the broadcast audio signal is Dolby Surround encoded.
BBE High Definition Sound system enhances clarity, detail and
presence of sound for better intelligibility and musical realism.
AE-6B chassis has Menu that is similar to FE-2 chassis. There is 1
Tuner for PIP.
Besides, it has Auto Format option that enables the aspect ratio of the
screen to be automatically changed.
There are three Scarts (Scart 1, Scart 2 and Scart 3) at the rear, which
are the 21-pin Euro connector. The pin diagram is shown as Figure
1.1. Scart 1 and Scart 2 are inputs for YUV while Scart 3 is input for S
Video.
Figure 1.2 shows the board overview of AE-6B for KV-32LS65AUS
model.
1

1.2 Specifications
Picture Audio Terminals
100 Hz Digital Plus Right and left speaker REAR
Digital Noise Reduction (DNR) 2X20W (Music Power) 1: 21-
pin Euro Connector
Inputs for audio and video signals.
2X10W (RMS) (CENELEC Standard)
Inputs for YUV
Outputs of TV video and audio signals.
Other Features Others 2: 21-pin Euro Connector
Inputs for audio and video signals.
Teletext Auto Volume Adjust Inputs for YUV
Fastext/ TOPtext Virtual Dolby Outputs of TV video and audio signals (Monitor Out).
Sleep Timer BBE 3: 21-pin Euro Connector Inputs for audio and video signals.
PIP (1 Tuner) Inputs for S Video.
Auto Format Remote Commander Outputs of TV video and audio signals (selectable).
RM-934 Phono Jacks Output connectors variable for audio signals.
SIDE
Power Requirement S Video Input 4 Pin DIN
220 –240V Video Inputs Phono Jacks
Audio Inputs Phono Jacks
Headphone Jack Stereo Mini Jack
2

1.3 21 Pin Connector
Figure 1.1 21-pin Euro connector
3

1.4 Board Overview
Figure 1.2 Board Overview (KV-32LS65AUS)
4

Chapter 2 Power Supply Circuit
2.1 Power Supply Block Overview
Figure 2.1 Power Supply Block Overview
2.2 Function Overview
The main power supply diagrams in AE-6B chassis are shown as
Figure 2.2 and Figure 2.3. It is similar to FE-2 and LE-3 chassis.
Meanwhile, the power supply circuit for AE-6B and AE-6D chassis is
almost similar. The difference is there is an additional G1 board in AE-
6D chassis.
The primary power supply on the AE-6B chassis G board consists of
three parts:
1. Oscillator 2. Output stage 3. Regulator Stage
The oscillator starts up to produce an initial signal for the output stage.
The output stage develops voltage to continue running the oscillator
stage, supply the regulating stage and provide normal output for the
TV. One of the normal TV outputs is used to start the secondary power
supply.
Oscillator Start Up
The oscillator within IC6001 starts if the VSENSE input voltage at pin 1
is above 1.3 VDC but less than 8 VDC. The block diagram of IC6001 is
shown in Figure 2.4.
Sample voltage from pin 18 is then used to run the internal oscillator.
The initial frequency is approximately 230 kHz. The low amplitude
initial oscillator signal is output IC6001 / pins 12 and 16 into the
driver/output stage.
5

Driver / Output Stage
The oscillator voltage output at pins 12 and 16 use drivers Q6006 and
Q6007 to develop T6002 secondary voltages. IC6001’s oscillator will
shut down if the driver transistor’s current is excessive. To prevent
premature shutdown, the timer capacitor C6007 (refer to Figure2.3)
delays the shutdown.
VC1 Powers IC6001
Although the oscillator is running at the initial frequency of 200 kHz,
there is insufficient current from T6002 to produce any unregulated
output voltage because of the load. There is a little load on D6008
(refer to Figure 2.3). This voltage is returned to IC6001 / pin 8 (VC1) to
serve as regulated +B for the IC.
IC6001 Normal Operation
At start up, IC6001 initially uses current limit +B from pin 18 to power
internal drivers. These internal drivers amplify the oscillator signal and
get out to pins 12 and 16. When the power supply stage works, the
power comes for the bottom driver, VG(L); pin 12 from pin 10 (VC2)
and for the top driver, VG(H); pin 16 from pin 14 (VB). The VB voltage
is approximately +5V (average) above the reference voltage at
IC6001/pin15.
Regulator Stage
This voltage supplies the top internal driver that amplifies the oscillator
signal that leaves IC6001/pin 16. The regulating stage uses error
detector IC6003 and optical isolator PH6001 to monitor the output from
T6002. If the output is low, the voltage fed back to IC6001/pin 2 goes
HIGH, decreasing the oscillator frequency. The decrease in frequency
increases the output of T6002.
6

Figure 2.2 Main power supply circuit diagram.
7

Figure 2.3 Main power supply circuit diagram.
8

Figure 2.4 IC6001 block diagram.
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2.3 Overvoltage Protection
With the voltage divider R6038, R6039 and R6040 the +B voltage is
controlled. In case of failure, the zener diode D6009 is switched and a
"high" signal is sent via resistor R6042 to pin 13 "OVP" at connector
CN6006. Please refer to Figure 2.5
2.4 Overcurrent Protection
R6021 is the resistor to control the current on the +B line. If the voltage
via R6021 goes to high the transistor Q6010 is switched. Then
transistor Q6005 is switched and the error message "OCP" is at
CN6006; Pin 12. Please refer to Figure 2.6
2.5 Protection Circuit of Power Block
• In case of OVP or OCP, the information goes to the A board via
CN6006 and then direct via CN0001 to the micro controller on the M
board pin 24 and pin 29.
• The main controller on the M board switch the main relay RY6001 on
the G board and the TV set switch into standby.
• In case of OVP the LED flash three time.
• In case of OCP the LED flash two time to show the error to the
outside.
10

Figure 2.5
Overvoltage Protection
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Figure 2.6
Overcurrent Protection
12

Chapter 3 Video Processing Circuit
13

3.1 VSP9407 Features
• Integrated Video Matrix switch
–Up to 7 CVBS inputs and up to 2 Y/C inputs
–Up to three CVBS outputs (even Y/C input)
• Multi-Standard colour decoder with 4H COMB FILTER
–PAL/NTSC/SECAM -> Automatic recognition of chroma standard
–2 Colour Decoder: Main Channel + Picture in Picture
–2D COMB FILTER in the Main Channel.
• Detection embedded circuits:
–Global motion and global still detection
–Film mode and phase detection (PAL, NTSC; 2-2, 3-2 pull down)
–Measurement of the noise level during the vertical retrace
(blanking) for both channels
–Detection of letter box formats
• Noise reduction:
–Automatic measurement of the noise level
–Motion adaptive temporal noise reduction
–Intelligent Frame-based temporal noise reduction for luminance
and chrominance, depending on both noise measured and motion
detected pixel by pixel
–Separate motion detection and noise measurement in both Master
Channel (Main Picture) and Slave Channel (PIP)
• Scan-rate-conversion:
–Motion adaptive frame based 100/120Hz interlaced scan
conversion.
–Special treatment for film material (‘Inverse 3-2 pull down’)
–Large area flicker and line flicker reduction.
–Simple Interlaced Modes (100/120Hz):
a) ABAB, if still picture (avoiding line flicker)
b) AA’B’B, if moving picture (avoiding artefacts)
c) AAAA or BBBB, for Teletext (avoiding line flicker)
d) Sharpness improvement
–Digital colour transition improvement (DCTI)
–Digital luminance transition improvement (DLTI)
–Adaptive horizontal and vertical PEAKING (luminance)
• Three D/A converters:
–9 bit amplitude resolution for Y, -(R-Y), -(B-Y) output
Figure 3.2 shows the block diagram of VSP9407 while Figure 3.3
shows its pinning diagram.
14

Figure 3.2 VSP 9407 Block Diagram
15

Figure 3.3 VSP9407 Pinning
VSP 9407B
16

3.2 Features of CRT Driver (CXA 2100)
• Two sets of switchable YCbCr input
• CbCr input offset adjustment circuit
• LTI and CTI circuits
• AKB system
• Two sets of analog RGB inputs
• Horizontal sync processing that supports 31.5kHz
• Vertical deflection circuit that supports 50/60/100/120Hz
• Deflection compensation circuit capable of supporting various wide
modes
• H drive soft start/ stop function
Figure 3.4 shows CXA 2100 pinning diagram while Figure 3.5 shows
its block diagram.
Figure 3.4 CXA 2100 Pinning Diagram
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Figure 3.5
CXA 2100
Block
Diagram
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