Texas Instruments LMG342XEVM-04X User manual

User’s Guide
LMG342XEVM-04X User Guide
ABSTRACT
The LMG342XEVM-04X features two LMG342XR0X0 600-V GaN FETs with an integrated driver and protection
in a half-bridge configuration with all the required bias circuit and logic/power level shifting. Essential power
stage and gate-driving, high-frequency current loops are fully enclosed on the board to minimize parasitic
inductance to reduce voltage overshoots and improving performance. The LMG342XEVM-04X is configured for
a socket style external connection for easy interface with external power stages to run the LMG342XR0X0 in
various applications. Refer to the LMG342XR0X0 data sheet before using this EVM.
Table of Contents
1 General TI High Voltage Evaluation User Safety Guidelines ............................................................................................. 3
1.1 Safety and Precautions...................................................................................................................................................... 4
2 Introduction.............................................................................................................................................................................5
2.1 LMG342XEVM-04X ...........................................................................................................................................................5
2.2 LMG34XX-BB-EVM............................................................................................................................................................8
2.3 Typical Applications............................................................................................................................................................8
2.4 Features............................................................................................................................................................................. 8
3 LMG342XEVM-04X Schematic............................................................................................................................................... 9
4 LMG342X-BB-EVM Schematic............................................................................................................................................. 10
5 Recommended Footprint......................................................................................................................................................11
6 Test Setup..............................................................................................................................................................................12
6.1 Test Equipment................................................................................................................................................................ 12
6.2 Recommended Test Setup With LMG34XX-BB-EVM...................................................................................................... 12
6.3 List of Test Points............................................................................................................................................................. 14
6.4 List of Terminals............................................................................................................................................................... 14
7 Test Procedure When Paired With LMG342X-BB-EVM......................................................................................................15
7.1 Setup................................................................................................................................................................................15
7.2 Start-Up and Operating Procedure.................................................................................................................................. 16
7.3 Shutdown Procedure........................................................................................................................................................16
7.4 Additional Operating Notes.............................................................................................................................................. 16
8 Test Procedure When Paired With LMG34XX-BB-EVM..................................................................................................... 17
8.1 Setup................................................................................................................................................................................17
8.2 Start-Up and Operating Procedure.................................................................................................................................. 17
8.3 Shutdown Procedure........................................................................................................................................................17
8.4 Additional Operation Notes.............................................................................................................................................. 17
9 Bill of Materials..................................................................................................................................................................... 18
List of Figures
Figure 2-1. LMG342XEVM-04X Block Diagram.......................................................................................................................... 6
Figure 2-2. Front Side View of the EVM...................................................................................................................................... 7
Figure 2-3. Back Side View of the EVM.......................................................................................................................................7
Figure 3-1. LMG342XEVM-04X Schematic................................................................................................................................. 9
Figure 4-1. LMG342X-BB-EVM Schematic............................................................................................................................... 10
Figure 5-1. Recommended Footprint for LMG342XEVM-04X .................................................................................................. 11
Figure 6-1. LMG342XEVM-04X Connected to the LMG34XX-BB-EVM....................................................................................12
Figure 6-2. Recommended Connection Points..........................................................................................................................13
Figure 7-1. LMG342X-BB-EVM Motherboard With LMG342XEVM-04X .................................................................................. 15
Figure 7-2. Connector and LEDs on the LMG342X-BB-EVM....................................................................................................16
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List of Tables
Table 2-1. EVM Version Lookup Table.........................................................................................................................................5
Table 2-2. Logic Pin Function Description................................................................................................................................... 5
Table 2-3. Power Pin Function Description..................................................................................................................................5
Table 6-1. Test Point Functional Description..............................................................................................................................14
Table 6-2. List of Terminals........................................................................................................................................................ 14
Table 9-1. Bill of Materials for LMG342XEVM-04X ...................................................................................................................18
Table 9-2. Bill of Materials for LMG342X-BB-EVM.................................................................................................................... 19
Trademarks
All trademarks are the property of their respective owners.
Trademarks www.ti.com
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1 General TI High Voltage Evaluation User Safety Guidelines
WARNING
Always follow TI’s set-up and application instructions, including the use of all interface components within the
recommended electrical rated voltage and power limits. Always use electrical safety precautions to help ensure
your personal safety and the safety of those working around you. Contact TI’s Product Information Center at
http://support/ti./com for further information.
Note
Save all warnings and instructions for future reference.
Failure to follow warnings and instructions may result in personal injury, property damage, or
death due to electrical shock and/or burn hazards.
The term TI HV EVM refers to an electronic device typically provided as an open framed, unenclosed PCB
(printed circuit board) assembly. It is intended strictly for use in development laboratory environments, solely for
qualified professional users having training, expertise, and knowledge of electrical safety risks in development
and application of high-voltage electrical circuits. Any other use or application is strictly prohibited by Texas
Instruments. If you are not suitably qualified, you must immediately stop from further use of the HV EVM.
•Work Area Safety:
– Maintain a clean and orderly work area.
– Qualified observer(s) must be present anytime circuits are energized.
– Effective barriers and signage must be present in the area where the TI HV EVM and its interface
electronics are energized; indicating operation of accessible high voltages may be present for the purpose
of protecting inadvertent access.
– All interface circuits, power supplies, evaluation modules, instruments, meters, scopes, and other related
apparatus used in a development environment exceeding 50 VRMS/75 VDC must be electrically located
within a protected Emergency Power Off (EPO) power strip.
– Use a stable and non-conductive work surface.
– Use adequately insulated clamps and wires to attach measurement probes and instruments. No freehand
testing whenever possible.
•Electrical Safety:
– As a precautionary measure, it is always a good engineering practice to assume that the entire EVM may
have fully accessible and active high voltages.
– De-energize the TI HV EVM and all its inputs, outputs, and electrical loads before performing any
electrical or other diagnostic measurements. Confirm that TI HV EVM power has been safely de-
energized.
– After confirming the EVM is de-energized, proceed with the required electrical circuit configurations,
wiring, measurement equipment hook-ups, and other application needs while still assuming the EVM
circuit and measuring instruments are electrically live.
– When EVM readiness is complete, energize the EVM as intended.
WARNING
While the EVM is energized, never touch the EVM or its electrical circuits as they could be at high
voltages capable of causing electrical shock hazard.
•Personal Safety:
– Wear personal protective equipment like latex gloves and safety glasses with side shields, or protect the
EVM from accidental touch in an adequate translucent plastic box with interlocks.
•Limitation for Safe Use:
– EVMs are not to be used as all or part of a production unit.
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1.1 Safety and Precautions
The EVM is designed for professionals who have received the appropriate technical training and is designed to
operate from an AC power supply or a high-voltage DC supply. Read this user guide and the safety-related
documents that come with the EVM package before operating this EVM.
CAUTION
!
Do not leave the EVM powered when unattended.
WARNING
Hot surface! Contact may cause burns. Do not touch!
WARNING
High Voltage! Electric shock is possible when connecting board to live wire. Board must be handled
with care by a professional.
For safety, use of isolated test equipment with overvoltage and overcurrent protection is highly
recommended.
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2 Introduction
The LMG342XEVM-04X can operate as a daughter card that is part of a larger custom designed system or
paired with the LMG34XX-BB-EVM or LMG342X-BB-EVM breakout motherboard.
Note
TI provides a custom interposer board that must be used when the LMG342XEVM-04X is paried with
the LMG34XX-BB-EVM.
2.1 LMG342XEVM-04X
The LMG342XEVM-04X has two LMG342XR0X0 GaN FETs in a half-bridge configuration. All the bias and level
shifting components are included, which allows low-side referenced signals to control both FETs. High-frequency
bypass capacitors are included on the power stage in an optimized layout to minimize parasitic inductance and
reduce voltage overshoot.
Table 2-1. EVM Version Lookup Table
EVM NAME FEATURED GaN FET WITH INTEGRATED DRIVER AND
PROTECTION
LMG3422EVM-041 LMG3422R050
LMG3422EVM-043 LMG3422R030
LMG3425EVM-041 LMG3422R050
LMG3425EVM-043 LMG3425R030
There are 12 logic pins on the LMG342XEVM-04X.
Table 2-2. Logic Pin Function Description
PIN PIN DESIGNATION DESCRIPTION
LS PWM 1 Logic gate signal input for low-side LMG342XR0X0. Compatible with both 3.3-V and 5-V logic.
Referenced to AGND.
HS TEMP 2 PWM TEMP output for high-side LMG342XR0X0. Referenced to AGND.
LS Fault 3 FAULT output signal for low-side LMG342XR0X0. Referenced to AGND.
HS OC 4 OC output signal for high-side LMG342XR0X0. Referenced to AGND.
LS OC 5 OC output signal for low-side LMG342XR0X0. Referenced to AGND.
HS Fault 6 FAULT output signal for high-side LMG342XR0X0. Referenced to AGND.
LS Temp 7 PWM TEMP output for low-side LMG342XR0X0 . Referenced to AGND.
HS PWM 8 Logic gate signal input for high-side LMG342XR0X0. Compatible with both 3.3-V and 5-V logic.
Referenced to AGND.
12V 9 Auxiliary power input for when the LMG342XEVM-04X is configured in bootstrap mode. Pin is not
used when configured in isolated power mode.
5V 10 Auxiliary power input for the LMG342XEVM-04X. Used to power logic isolators. Used as input bias
power of LMG342XR0X0 devices when configured in isolated power mode.
AGND 11,12 Logic and bias power ground return pin. Functionally isolated from PGND.
There are 6 power pins on the LMG342XEVM-04X.
Table 2-3. Power Pin Function Description
PIN DESCRIPTION
SW Switch node of the half-bridge configuration
HV Input DC voltage of the half-bridge configuration
PGND Power ground of the half-bridge configuration. Functionally isolated from AGND.
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Figure 2-1. LMG342XEVM-04X Block Diagram
CAUTION
High-voltage levels are present on the evaluation module whenever it is energized. Take proper
precautions when working with the EVM.
2.1.1 FAULT and OC
The FAULT and OC pins of the LMG342XEVM-04X are active low when an undervoltage lockout occurs on an
auxiliary voltage rail, when an overtemperature event occurs, or when an overcurrent event occurs on the
LMG342XR0X0. The signals are level-shifted to AGND. Refer to the LMG342XR0X0 data sheet for operation
details.
CAUTION
Do NOT ignore a FAULT signal when using the LMG342XEVM-04X. Turn off both top and bottom
devices if any device generates a FAULT signal. The device under a fault condition may operate in
the undesired third-quadrant mode and can overheat or become damaged due to the high source-
drain voltage drop if the other device is still switching.
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2.1.1.1 Power Pins
There are some power stage bypass capacitors on the LMG342XEVM-04X from VDC to PGND to minimize
voltage overshoot during switching, but more bulk capacitance is required to hold up the DC voltage during
operation. TI recommends preventing any overlap and parasitic capacitance from VSW to VDC, PGND, and any
logic pins. The two ground PGND and AGND pins are functionally isolated from each other on the
LMG342XEVM-04X.
2.1.1.2 Bootstrap Mode
The LMG342XEVM-04X card can be modified to operate in bootstrap mode, where the 12-V bias voltage is used
to power both LMG342XR0X0 devices. This can be achieved by the following modifications to the EVM:
1. Remove R1.
2. Place a 20-Ω resistor on R2.
3. Place a 600-V SOD-123 diode on D1, such as UFM15PL-TP.
4. Adjust Rdrv resistor for the low side to be above 70 kΩ, which corresponds to a slew rate below 60 V/ns for
the low side.
2.1.1.3 Heat Sink
The heat sink is installed to help with heat dissipation of the LMG342XR0X0. Exposed copper pads are attached
to the die attach pad (DAP) on the high-side and low-side devices to provide a low thermal impedance point for
the heat sink. The two copper pads have a high-voltage potential difference between them, therefore an
electrically isolative thermal interface material (TIM) is required.
Figure 2-2. Front Side View of the EVM
Figure 2-3. Back Side View of the EVM
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2.2 LMG34XX-BB-EVM
For quick operation, the designer can use the LMG34XX-BB-EVM to interface with the LMG342XEVM-04X. This
mother board is designed to operate the LMG342XR0X0 as a synchronous open-loop buck converter up to 1
kW. Easy probe locations are provided to measure the logic and power stage voltages.
Note
TI provides a custom interposer board that must be used when the LMG342XEVM-04X is paried with
the LMG34XX-BB-EVM.
2.2.1 Bias Supply
The motherboard requires one 12-V bias supply. A linear drop-off regulator steps the voltage down to a tightly
regulated 5 V for the logic and auxiliary power of the LMG342XR0X0 when the LMG342XEVM-04X is configured
in isolated power mode. When the LMG342XEVM-04X is configured in bootstrap mode, the 12-V input is used to
power the two LMG342XR0X0 devices.
2.2.2 Logic PWM Input
The LMG34XX-BB-EVM supports a single PWM, with complimentary signal and corresponding dead time
generated onboard. A 0-V to 5-V magnitude input square wave is required. The complementary PWM generation
circuit creates 50 ns of dead time between both transitions of the PWM signals.
2.2.3 Fault Protection
There is an option to disable the PWM input to the FET card in the event of a fault signal from the
LMG342XEVM-04X. When the FAULT Protect jumper is placed in the EN mode, PWM is disabled when either
LMG342XR0X0 has an active fault. This disable is not latching, so PWM immediately resumes when the fault
clears. If the FAULT Protect mode is not desired, that mode can be disabled by placing the jumper in the DIS
position. The FAULT LED will still illuminate when either LMG342XR0X0 has an active fault, regardless of the
position of FAULT Protect jumper.
2.3 Typical Applications
The LMG342XEVM-04X is designed for use in AC/DC, DC/DC and DC/AC applications:
• Totem-Pole PFC Converters
• Phase-Shifted Full Bridge or LLC Converters
• Inverters
• Buck Converters such as the LMG342X-BB-EVM
2.4 Features
The LMG342XEVM-04X has the following features and specifications:
• Overtemperature, overcurrent, and undervoltage lockout protection with FAULT and OC indication that is
level-shifted to an AGND referenced signal
• Gate logic input support of either 3.3-V or 5-V logic
• Maximum recommended operating voltage of 480 V and absolute maximum voltage of 600 V
The LMG342X-BB-EVM has the following features and specifications:
• Requires only a single 12-V bias supply
• Requires only a single 0-V to 5-V PWM input to generate a gate drive signal
• PWM disables in the event of a fault from the LMG342XEVM-04X
• Maximum recommended operating voltage of 480 V and absolute maximum voltage of 600 V
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3 LMG342XEVM-04X Schematic
Bot_FET_PWM
AGND
ISO_12V_L
0.022µF
C15
0.022µF
C16
0.022µF
C17
20
20
R2
5V_H
Powe r Connector
HVBUS
LMG342x Ha lf-Bridge Ga N Da ughte r Card
600V
D1
ISO_12V_H
AGND
5V_H
0.1uF
C20
0.1uF
C21
5V
AGND
5V
AGND
49.9
R16
49.9
R7
ISONC2
ISO_12V_L
LS_GND
ISO_12V_H
ISO_12V_L_B
ISO_12V_H_B
D1 1
D2 3
VCC
2
GND 4
EN
5
CLK
6
U6
SN6505BDBVR
D1 1
D2 3
VCC
2
GND 4
EN
5
CLK
6
U5
SN6505BDBVR
16V
D6
16V
D5
10uF
C1
4.7uF
C37
4.7uF
C36
4.7uF
C30
4.7uF
C31
4.7uF
C33 4.7uF
C35
68pF
C14
68pF
C6
TP1
5016
0
R1
ISO_RET_H_B
HS_GND
HS_GND
HS_GND
ISO_RET_L_B
VDD
46 DRAIN 1
DRAIN 2
DRAIN 3
DRAIN 4
DRAIN 5
DRAIN 6
DRAIN 7
DRAIN 8
DRAIN 9
DRAIN 10
DRAIN 11
DRAIN 12
DRAIN 13
DRAIN 14
DRAIN 15
DRAIN 16
SOURCE 17
SOURCE 18
SOURCE 19
SOURCE 20
SOURCE 21
SOURCE 22
SOURCE 23
SOURCE 24
SOURCE 25
SOURCE 26
SOURCE 27
SOURCE 28
SOURCE 29
SOURCE 30
SOURCE 31
SOURCE 32
SOURCE 33
SOURCE 34
SOURCE 35
SOURCE 36
SOURCE 37
SOURCE 38
SOURCE 39
SOURCE 40
FAULT
48
OC
50
BBSW
43
IN
47
LDO5V
53
RDRV
52
TEMP
51
VNEG
41 VNEG
42
GND 44
GND 45
GND 49
GND 54
PAD 55
U1
VDD
46 DRAIN 1
DRAIN 2
DRAIN 3
DRAIN 4
DRAIN 5
DRAIN 6
DRAIN 7
DRAIN 8
DRAIN 9
DRAIN 10
DRAIN 11
DRAIN 12
DRAIN 13
DRAIN 14
DRAIN 15
DRAIN 16
SOURCE 17
SOURCE 18
SOURCE 19
SOURCE 20
SOURCE 21
SOURCE 22
SOURCE 23
SOURCE 24
SOURCE 25
SOURCE 26
SOURCE 27
SOURCE 28
SOURCE 29
SOURCE 30
SOURCE 31
SOURCE 32
SOURCE 33
SOURCE 34
SOURCE 35
SOURCE 36
SOURCE 37
SOURCE 38
SOURCE 39
SOURCE 40
FAULT
48
OC
50
BBSW
43
IN
47
LDO5V
53
RDRV
52
TEMP
51
VNEG
41 VNEG
42
GND 44
GND 45
GND 49
GND 54
PAD 55
U2
5V_H
HS_GND
1uF
C26
0.1uF
C10
HS_GND
0
R3
HS_GND
HS_GND
22pF
C5
20k 1 00V/ns
70k 5 0V/ns
5V_L
12V
AGND
5V_L
IN_L
5V_L
1uF
C9
0.1uF
C27
LS_GND
0
R12
LS_GND
22pF
C23
20k 1 00V/ns
70k 5 0V/ns
AGND
5V
AGND
5V
AGND
5V
Bot_FET_PWM
5V12V
Bot_FET_FAULT
Bot_FET_OC
Bot_FET_TEMP
1 2
3 4
5 6
7 8
9 10
11 12
J1
TSW-106-08-G-D-RA
AGND AGND
Top_FET_PWM
ISO_12V_L
LS_GND
LS_GND
LS_GND
0.022µF
C18
PGND
Bot_FET_FAULT
Bot_FET_OC
Bot_FET_TEMP
Top_FET_FAULT
Top_FET_OC
Top_FET_TEMP
RDRV_H
IN_H
TEMP_H
FAULT_H
OC_H
OC_L
FAULT_L
TEMP_L
VNEG_L
VNEG_H
DNP
LS_GND
PGND
DNP
Have R15 close to GaN FET
10uF
C11
LS_GND
0.1uF
C19
0.1uF
C38
HS_GND
SW
SW
Have R6 close to GaN FET
DNP
300
R15
300
R6 DNP
SDEM20161T-4R7MS
SDEM20161T-4R7MS
Max. 1A current on the FET
0.22µF
C12
0.22µF
C2
3
2
1
4
5
6
T2
750315371
5V
5V_H
LS_GND
5V_L
TP3PGND
TP6 S W
HV TP5
PGND
HVBUS
SW
2
4
1
3
~
~
+
-
D2
ISONC3
3
2
1
4
5
6
T1
750315371
2
4
1
3
~
~
+
-
D3
VCC1 1 VCC2
16
EN1 7 EN2
10
INA 3
INB 4
INC 5
IND
11
OUTA
14
OUTB
13
OUTC
12
OUTD 6
GND1 2
GND1 8
GND2
9GND2
15
ISO7741FDBQR
U3
VCC1 1 VCC2
16
EN1 7 EN2
10
INA 3
INB 4
INC 5
IND
11
OUTA
14
OUTB
13
OUTC
12
OUTD 6
GND1 2
GND1 8
GND2
9GND2
15
ISO7741FDBQR
U4
L1
L2
0
R10
1 2
34
L3
1 2
34
L4
Top_FET_PWM
Top_FET_FAULT
Top_FET_OC
Top_FET_TEMP
TH1 TH2 TH3 TH4
HS push-pin
NC1 NC2 NC3 NC4
TP2
LS_GND
TP4
PGND
25V
2.2uF
C3
25V
2.2uF
C13
20.0k
R5
20.0k
R14
DNP
DNP
Figure 3-1. LMG342XEVM-04X Schematic
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4 LMG342X-BB-EVM Schematic
AGND
AGND
AGND
AGND
Vin
HS_FET_PWM
LS_FET_PWM
PGND
VAUX 12V
AGND
PGND
PGND
PGND
PGNDAGND
12V
AGND
VIN
1
EN
3
SS
5GND 4
FB 6
RON
2
VOUT 7
EP 8
LMZ12001EXTTZ/NOPB
U4
AGND
AGND
AGND
AGND
630V
0.1uF
CIN3
630V
0.1uF
CIN4
1
2 3 4 5
J3
112404
1
2 3 4 5
J8
112404
D1
BAT54WS-7-F
71
SN74LVC3G14DCUTG4
U3A
53
SN74LVC3G14DCUTG4
U3B
26
SN74LVC3G14DCUTG4
U3C
GND 4 VCC
8
SN74LVC3G14DCUTG4
U3D
D3
BAT54WS-7-F
53
SN74LVC3G14DCUTG4
U5B
26
SN74LVC3G14DCUTG4
U5C
71
SN74LVC3G14DCUTG4
U5A
AGND
GND 4 VCC
8
SN74LVC3G14DCUTG4
U5D
7
1
2
U1A
3
5
6
U1B
VCC
8GND 4
U1C
AGND
1
3
5
7
9
11
J5A
HLE-106-02-G-DV-BE-A
2
4
6
8
10
12
J5B
HLE-106-02-G-DV-BE-A
1
2
J6
282834-2
630V
0.1uF
COUT3
630V
0.1uF
COUT4
0
R9
1
2
3
J7
TSW-103-07-G-S
SH-J1
SNT-100-BK-G
1.6k
R31
Green
12
5V_EN
LG L29K-G2J1-24-Z
12 34
47uH
47uH
L3
HS_FET_PWM
HS_FET_OCZ
HS_FET_TEMP
HS_FET_FAULTZ
AGND
LS_FET_PWM
LS_FET_OCZ
LS_FET_TEMP
LS_FET_FAULTZ
1.18k
R26
AGND
PGND
30k
R16
30k
R17
30k
R11
30k
R12
30k
R18
30k
R13
30k
R19
30k
R14
30k
R20
30k
R10
HVBUS
Red
12
HS_FLT
LS L29K-G1J2-1-Z
5
4
1
2
3
6
J2
TSW-106-07-G-S
5
4
1
2
3
6
J4
TSW-106-07-G-S
12VVAUX
ACMGND AGND2
AGND1
HVIN
HVOUT
PGND4
SW PGND5
PWM_HS
PWM_LS
HS_FET_PWM
LS_FET_PWM
5V
5V
5V
5V
5V
LS_FET_FAULTZ
SH-J2
SNT-100-BK-G
SH-J3
SNT-100-BK-G
LS_FET_TEMP_FILT
HS_FET_TEMP_FILT
3
5
6
U2B
VCC
8GND 4
U2C
AGND
AGND
5V
AGNDAGND
Red
12
LS_FLT
LS L29K-G1J2-1-Z
5V
AGNDAGND
5K
R3
3224X-1-502E
5K
R15
3224X-1-502E
5V
1
2
J12
282834-2
AGND
5V
AGND
25V
10uF
C15
6.3V
100uF
C17
22nF
50V
C16
33.2k
R28
22nF
50V
C20
AGND
600V
150uF
C25
3.3k
R1
3.3k
R5
LS_FET_OCZ
HS_FET_OCZ
7
1
2
U2A
HS_FET_FAULTZ
1
2
3
J14
TSW-103-07-G-S
SH-J5
SNT-100-BK-G
J17
3267
J16
3267
J18
3267
1
2
J10
TSW-102-07-G-S
1
2
J11
TSW-102-07-G-S
5V
100k
R6
100k
R22
3 1 2
4
900V
20µF
C22
Yellow
12
HS_OC
SML-E12Y8WT86
5V
AGNDAGND
3.3k
R29
HS_FET_OCZ
Yellow
12
LS_OC
SML-E12Y8WT86
5V
AGNDAGND
3.3k
R30
LS_FET_OCZ
0
R2
0
R4
Green
12
HVIN_EN
LG L29K-G2J1-24-Z
VAUX
HVBUS
HVOUT
PWM_HS
PWM_LS
PGND
SW
L2
12V aux
1µF
25V
C1
1µF
25V
C9
1µF
25V
C18
50V
39pF
C10
50V
39pF
C23
50V
39pF
C12
50V
39pF
C5
50V
39pF
C14
50V
39pF
C21
25V
10uF
C19
1
2
J1
0395443002
1
2
J9
0395443002
1
HVBUS1
1
SW1
1
PGND1
1
HVBUS2
1
SW2
1
PGND2
SH-J4
SNT-100-BK-G
1
2
J13
TSW-102-07-G-S
6.20k
R25
HS_FET_TEMP
AGND
HS_FET_TEMP_FILT
105k
R8
50V
1600pF
C2
HS_FET_OCZ
100
R7 HS_FET_FAULTZ
HS_FET_PWM
5V
AGND
1µF
25V
C8
12V
AGND
1µF
25V
C6
LS_FET_TEMP
AGND
LS_FET_TEMP_FILT
105k
R27
50V
1600pF
C3
LS_FET_OCZ
100
R21 LS_FET_FAULTZ
LS_FET_PWM
1
2
3
J15
TSW-103-07-G-S
AGND 12V
TACH
TACH
Figure 4-1. LMG342X-BB-EVM Schematic
LMG342X-BB-EVM Schematic www.ti.com
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5 Recommended Footprint
Figure 5-1. Recommended Footprint for LMG342XEVM-04X
www.ti.com Recommended Footprint
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6 Test Setup
6.1 Test Equipment
DC Voltage Source: Capable of supplying the input of the EVM up to 480 V.
DC Bias Source: Capable of 12-V output at up to 0.7 A.
Function Generator: Capable of 0-V to 5-V square wave output with adjustable duty cycle and frequency in the
operating range. TI recommends operating the LMG342XEVM-04X and LMG34XX-BB-EVM with a switching
frequency between 50 kHz to 200 kHz.
Note
TI provides a custom interposer board that must be used when the LMG342XEVM-04X is paried with
the LMG34XX-BB-EVM.
Oscilloscope: Capable of at least 200-MHz operation. A 1-GHz or greater oscilloscope and probes with short
ground springs are required for accurate measurements.
DC Multimeter(s): Capable of 600-V measurement, suitable for determining operation and efficiency (if desired).
DC Load: Capable of 600-V operation at up to 20 A in current-mode operation.
Fan: 200 LFM minimum airflow is recommended.
6.2 Recommended Test Setup With LMG34XX-BB-EVM
Figure 6-1 shows the LMG342XEVM-04X connected to the LMG34XX-BB-EVM.
Note
TI provides a custom interposer board that must be used when the LMG342XEVM-04X is paried with
the LMG34XX-BB-EVM.
Figure 6-1. LMG342XEVM-04X Connected to the LMG34XX-BB-EVM
Test Setup www.ti.com
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Figure 6-2 shows the LMG34XX-BB-EVM power and probe connection points.
Figure 6-2. Recommended Connection Points
PCB Notes:
• Probe points for gate drive logic
• 100-mil header for PWM input, PWM signals to LMG342XEVM-04X and FAULT output
• BNC connector for PWM input
• 12-V bias supply input
• FAULT protection option header
• Power stage high voltage input
• Probe point for power stage switch node
• Power stage high voltage output
WARNING
There are very high voltages present on the EVM. Some components reach temperatures above 50
°C. Take proper precautions when handling the board.
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6.3 List of Test Points
Key test points on this EVM are designed for oscilloscope probes with short ground springs. Using short ground
springs instead of alligator ground leads will minimize measurement error and produce a cleaner signal with the
fast switching GaN devices used on this EVM. The data in this user guide uses this measurement method.
Table 6-1. Test Point Functional Description
NAME DESCRIPTION
VAUX 12-V bias input connection before filter
ACMGND Ground for 12-V bias input before filter
5V 5-V bias
AGND1 Analog ground for logic
PWM Single input PWM signal
LDEAD1 Low-side PWM signal before dead time generation
AGND3 Analog ground for logic
HDEAD1 High-side PWM signal before dead time generation
AGND4 Analog ground for logic
LOW Low-side PWM signal with dead time
HIGH High-side PWM signal with dead time
AGND2 Analog ground for logic
12V 12-V bias after filter
PGND1 Power ground
HVIN DC input voltage
PGND2 Power ground
HVOUT DC output voltage
PGND3 Power ground
SW1 Switch node voltage
For this EVM version, not all the test points are available on the motherboard due to the size of the daughter
card. To probe the switching node, TI recommends using a pigtail on the daughter card on PGND pin. A probe
could use the PGND pigtail and SW test point on the daughter card to complete the measurement.
6.4 List of Terminals
Table 6-2. List of Terminals
TERMINAL NAME DESCRIPTION
J1 VIN Input DC voltage input
J5 VOUT Output DC voltage output
J6 12V AUX 12-V bias voltage input
J3 PWM INPUT Single 0-V to 5-V PWM input for gate
J4 LOGIC Header to connect PWM, FAULT logic
J2 HB Card PIN Connector to interface LMG342XEVM-04X board
Test Setup www.ti.com
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7 Test Procedure When Paired With LMG342X-BB-EVM
7.1 Setup
TI recommends the following procedure to set up the LMG342X-BB-EVM with the LMG342XEVM-04X. The
inductor on LMG342X-BB-EVM is capable of around 3-kW operation. For higher power levels, use an external
inductor.
Note
TI provides a custom interposer board that must be used when the LMG342XEVM-04X is paried with
the LMG34XX-BB-EVM.
To connect the LMG342XEVM-04X to the LMG342X-BB-EVM:
1. Install the LMG342X-BB-EVM inside the Ventilated HV safety box.
2. Ensure that the following connections are made on the motherboard. Pin 1 is placed at the top:
• Pins 2 and 3 are connected to J7
• Pins 2 and 3 are connected to J14
• No connection on the J10, J11 and J12 pins
• Pins 2 and 3 are connected to J13
3. Plug the LMG342xEVM-043 into the LMG342XX-BB-EVM. The area for connection is shown in Figure 7-2.
4. Set the function generator to 100-kHz output, 50% duty cycle, and 5-V (low 0-V, high 5-V) continuous pulse.
5. Connect the function generator output to the LMG342X-BB-EVM function generator PWM input at J8 as
shown in Figure 7-2.
6. Connect 12VDC 3-A power supply to the LMG342X-BB-EVM 12-V bias supply as shown in Figure 7-2.
7. Connect the 480 V DC power supply to the LMG342X-BB-EVM 480-V high voltage input for buck mode (High
Voltage) as shown in Figure 7-2.
8. Connect the 12-V bias supply to the fan attached on the EVM, or put a fan next to the test setup where the
fan is blowing directly on the daughter card heat sink. Fix the fan position to the board using double-sided
tape.
Figure 7-1. LMG342X-BB-EVM Motherboard With LMG342XEVM-04X
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Figure 7-2. Connector and LEDs on the LMG342X-BB-EVM
7.2 Start-Up and Operating Procedure
1. Turn on +12VDC to the LMG342X-BB_EVM. Watch the power supply for the DC current to settle down after
approximately 3 to 5 seconds.
2. Make sure all the fault LEDs are off and the 5-V LED is on.
3. Turn on +12VDC to enable the fan.
4. Turn on the function generator to output the continuous pulse.
5. Enable the 480-V voltage supply and make sure to ramp the voltage up gradually from 0 V to 480 V. As the
voltage is ramping up, the HV LED will turn on and become brighter.
WARNING
Do NOT turn on the device at the absolute maximum voltage. TI recommends to start the device at
or below 480 V. Slowly increase the input voltage and monitor the VSW to ensure the peak voltage
does not exceed the absolute maximum rating of 600 V.
7.3 Shutdown Procedure
1. Turn off input supply then PWM. Wait until red “HV Enable” LED turns off.
2. Disable the 12-V bias supply.
7.4 Additional Operating Notes
• Fault protection on the LMG342X-BB-EVM is not latching, therefore PWM will resume if a fault clears and the
LMG342X-BB- EVM is still operational.
Test Procedure When Paired With LMG342X-BB-EVM www.ti.com
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8 Test Procedure When Paired With LMG34XX-BB-EVM
8.1 Setup
The following procedure is recommended to set up the LMG34XX-BB-EVM with the LMG342XEVM-04X. The
inductor on the LMG34XX-BB-EVM is capable of around 1.7-kW operation. For a higher power level, use an
external inductor.
Note
TI provides a custom interposer board that must be used when the LMG342XEVM-04X is paried with
the LMG34XX-BB-EVM.
To connect the LMG342XEVM-04X to the LMG34XX-BB-EVM:
1. Connect the oscilloscope or multimeter probes to the desired test points in A or G.
2. Connect the 12-V bias supply, connect load to output, and connect the input supply to input.
3. Connect the function generator to either the BNC connector PWM input at C or 100-mil header connector
input at pin 6 (PWM) and pin 5 (GND) at B.
4. Connect 12-V bias supply to the fan attached on the EVM, or enable an external fan to direct airflow across
the heat sink attached to the LMG342XEVM-04X.
8.2 Start-Up and Operating Procedure
The following procedure is recommended to enable the LMG342XEVM-04X with the LMG342XEVM-04X:
1. Power up the 12-V bias supply. Ensure the top right green “Aux Enable” LED is illuminated.
2. Enable PWM on the function generator.
3. Power up the high voltage input supply. Ensure the red “HV Enable” LED is illuminated when the input supply
is above 20 V.
WARNING
Do NOT turn on device at absolute maximum voltage. TI recommends starting at voltages at or
below 480 V, and then increase the input voltage slowly while monitoring VSW to insure the peak
voltage does not exceed the absolute maximum rating of 600 V.
8.3 Shutdown Procedure
1. Turn off the input supply then PWM. Wait until the red “HV Enable” LED turns off.
2. Disable the 12-V bias supply.
8.4 Additional Operation Notes
• Fault protection on the LMG34XX-BB-EVM is not latching, therefore PWM will resume if a fault clears and the
LMG34XX-BB- EVM is still operational.
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9 Bill of Materials
Table 9-1. Bill of Materials for LMG342XEVM-04X
DESIGNATOR QTY DESCRIPTION PART NUMBER
C1, C11 2 CAP, CERM, 10 uF, 25 V, +/- 10%, X7R, 1206_190 C1206C106K3RACTU
C2, C12 2 CAP, CERM, 0.22 µF, 16 V,+/- 10%, X7R, 0402 CL05B224KO5NNNC
C3, C13 2 CAP, CERM, 2.2 uF, 25 V, +/- 10%, X5R, 0805 GRM219R61E225KA12D
C5, C23 2 CAP, CERM, 22 pF, 50 V, +/- 5%, C0G/NP0, 0402 C1005C0G1H220J050BA
C6, C14 2 CAP, CERM, 68 pF, 50 V, +/- 5%, C0G/NP0, 0402 C1005C0G1H680J050BA
C9, C26 2 CAP, CERM, 1 uF, 25 V, +/- 10%, X5R, 0402 C1005X5R1E105K050BC
C10, C27 2 CAP, CERM, 0.1 uF, 50 V, +/- 10%, X7R, 0402 C1005X7R1H104K050BB
C15, C16, C17, C18 4 CAP, CERM, 0.022 µF, 1000 V,+/- 10%, X7R, AEC-Q200 Grade 1, 1206 C1206C223KDRACTU
C19, C20, C21, C38 4 CAP, CERM, 0.1 uF, 1000 V, +/- 10%, X7R, 1812 C1812W104KDRACTU
C30, C31, C36, C37 4 CAP, CERM, 4.7 uF, 35 V, +/- 10%, X5R, 0603 C1608X5R1V475K080AC
C33, C35 2 CAP, CERM, 4.7 uF, 16 V, +/- 10%, X7R, AEC-Q200 Grade 1, 0805 GCM21BR71C475KA73L
D2, D3 2 Bridge Rectifier Single Phase Schottky 30V Surface Mount MBS KMB23STR
D6 1 Diode, Zener, 16 V, 500 mW, AEC-Q101, SOD-123 BZT52C16-7-F
H4 1 Thermal Interface Material GR80A-0H-50GY
H7 1 Heat Sink with 4 push pins and 4 springs S05MZZ12
HV, PGND, SW, TP3, TP5, TP6 6 3621-0-32-15-00-00-08-0
J1 1 Header, 100mil, 6x2, Gold, R/A, TH TSW-106-08-G-D-RA
L1, L2 2 4.7µH Unshielded Inductor 1.1A 426mOhm Max 0806 (2016 Metric) SDEM20161T-4R7MS
L3, L4 2 Coupled inductor, 0.2 A, 0.45 ohm, SMD ACM2520-601-2P-T002
LBL 1 Thermal Transfer Printable Labels, 0.650" W x 0.200" H - 10,000 per roll THT-14-423-10
R1 1 RES, 0, 5%, 0.125 W, 0603 MCT06030Z0000ZP500
R2 1 RES, 20, 5%, 0.1 W, AEC-Q200 Grade 0, 0603 CRCW060320R0JNEA
R5, R14 2 RES, 20.0 k, 1%, 0.063 W, 0402 CRCW040220K0FKED
R6, R15 2 RES, 300, 5%, 0.063 W, AEC-Q200 Grade 0, 0402 CRCW0402300RJNED
R7, R16 2 RES, 49.9, 1%, 0.063 W, 0402 RC0402FR-0749R9L
T1, T2 2 Transformer, 105uH, TH 750315371
TP1 1 Test Point, Compact, SMT 5016
U1, U2 1 600-V 30-mΩ Integrated GaN Power Stage with Smart Driver LMG3425R050
U3, U4 2 ISO7741FDBQR
U5, U6 2 Low-Noise 1 A, 420 kHz Transformer Driver, DBV0006A (SOT-23-6) SN6505BDBVR
D5 0 Diode, Zener, 16 V, 500 mW, AEC-Q101, SOD-123 BZT52C16-7-F
Bill of Materials www.ti.com
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Table 9-2. Bill of Materials for LMG342X-BB-EVM
DESIGNATOR QTY DESCRIPTION PART NUMBER
5V, 12V, HVIN, HVOUT, SW, TACH, VAUX 7 Test Point, Compact, Red, TH 5005
5V_EN, HVIN_EN 2 LED, Green, SMD LG L29K-G2J1-24-Z
ACMGND, AGND1, AGND2, PGND4, PGND5 5 Test Point, Compact, Black, TH 5006
C1, C6, C8, C9, C18 5 CAP, CERM, 1 µF, 25 V,+/- 10%, X7R, AEC-Q200 Grade 1, 0603 CGA3E1X7R1E105K080AD
C2, C3 2 CAP, CERM, 1600 pF, 50 V, +/- 5%, C0G/NP0, 0603 GRM1885C1H162JA01D
C5, C10, C12, C14, C21, C23 6 CAP, CERM, 39 pF, 50 V, +/- 5%, C0G/NP0, 0603 GRM1885C1H390JA01D
C15 1 CAP, CERM, 10 uF, 25 V, +/- 20%, X5R, 0603 GRT188R61E106ME13D
C16, C20 2 CAP, CERM, 0.022 uF, 50 V, +/- 10%, X7R, 0603 885012206091
C17 1 CAP, CERM, 100 uF, 6.3 V, +/- 20%, X5R, 0805 GRM21BR60J107M
C19 1 CAP, CERM, 10 uF, 25 V, +/- 10%, X5R, 0805 CL21A106KAFN3NE
C22 1 CAP, Film, 20 µF, 900 V,+/- 10%, 0.0055 ohm, TH FE37M6C0206KB
C25 1 CAP, AL, 150 uF, 600 V, +/- 20%, TH LGN2X151MELB50
CIN3, CIN4, COUT3, COUT4 4 CAP, CERM, 0.1 uF, 630 V, +/- 10%, X7R, 1812 GRM43DR72J104KW01L
D1, D3 2 Diode, Schottky, 30 V, 0.2 A, SOD-323 BAT54WS-7-F
H1, H8, H9, H10, H11, H12 6 3484
H2, H3, H4, H5, H6, H7 6 MACHINE SCREW PAN PHILLIPS 4-40 PMSSS 440 0025 PH
H13 1 Machine Screw, Round, #4-40 x 1/4, Nylon, Philips panhead NY PMS 440 0025 PH
H14 1 1902C
HS_FET_PWM, LS_FET_PWM, PWM_HS, PWM_LS 4 Test Point, Compact, White, TH 5007
HS_FLT, LS_FLT 2 LED, Red, SMD LS L29K-G1J2-1-Z
HS_OC, LS_OC 2 LED, Yellow, SMD SML-E12Y8WT86
HVBUS1, HVBUS2, PGND1, PGND2, SW1, SW2 6 Receptacle, 1 Pos, Gold, TH 0435-0-15-15-03-27-10-0
J1, J9 2 Terminal Block, 5.08mm, 2x1, TH 0395443002
J2, J4 2 Header, 100mil, 6x1, Gold, TH TSW-106-07-G-S
J3, J8 2 Connector, TH, BNC 112404
J5 1 12 Position Receptacle, Bottom Entry Connector Surface Mount HLE-106-02-G-DV-BE-A
J6, J12 2 Terminal Block, 2x1, 2.54mm, TH 282834-2
J7, J14, J15 3 Header, 100mil, 3x1, Gold, TH TSW-103-07-G-S
J10, J11, J13 3 Header, 100mil, 2x1, Gold, TH TSW-102-07-G-S
J16, J17, J18 3 Standard Banana Jack, Uninsulated 3267
L2 1 INDUCTOR 570uH 13A 750317345
L3 1 Coupled inductor, 47 uH, 1.14 A, 0.4825 ohm, SMD DRQ73-470-R
LBL1 1 Thermal Transfer Printable Labels, 1.250" W x 0.250" H - 10,000 per roll THT-13-457-10
R1, R5, R29, R30 4 RES, 3.3 k, 5%, 0.1 W, AEC-Q200 Grade 0, 0603 CRCW06033K30JNEA
R2, R4, R9 3 RES, 0, 5%, 0.1 W, AEC-Q200 Grade 0, 0603 CRCW06030000Z0EA
R3, R15 2 Trimmer, 5 K, 0.25 W, SMD 3224X-1-502E
R6, R22 2 RES, 100 k, 5%, 0.1 W, 0603 CRCW0603100KJNEAC
R7, R21 2 RES, 100, 5%, 0.1 W, AEC-Q200 Grade 0, 0603 CRCW0603100RJNEA
www.ti.com Bill of Materials
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Table 9-2. Bill of Materials for LMG342X-BB-EVM (continued)
DESIGNATOR QTY DESCRIPTION PART NUMBER
R8, R27 2 RES, 105 k, 1%, 0.1 W, 0603 RC0603FR-07105KL
R10, R11, R12, R13, R14, R16, R17, R18, R19, R20 10 RES, 30 k, 5%, 0.25 W, AEC-Q200 Grade 0, 1206 CRCW120630K0JNEA
R25 1 RES, 6.20 k, 1%, 0.1 W, 0603 RC0603FR-076K2L
R26 1 RES, 1.18 k, 1%, 0.1 W, 0603 RC0603FR-071K18L
R28 1 RES, 33.2 k, 0.1%, 0.1 W, 0603 RT0603BRD0733K2L
R31 1 RES, 1.6 k, 5%, 0.1 W, AEC-Q200 Grade 0, 0603 CRCW06031K60JNEA
SH-J1, SH-J2, SH-J3, SH-J4, SH-J5 5 Shunt, 100mil, Gold plated, Black SNT-100-BK-G
U1, U2 2 Automotive Catalog Dual 2-Input Positive-AND Gate, DCT0008A, LARGE
T&R
U3, U5 2 Triple Schmitt-Trigger Inverter, DCU0008A (VSSOP-8) SN74LVC3G14DCUTG4
U4 1 1A SIMPLE SWITCHER® Power Module with 20V Maximum Input
Voltage for Military and Rugged Applications, 7 pin TO-PMOD
LMZ12001EXTTZ/NOPB
Bill of Materials www.ti.com
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