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Texas Instruments TPS65280EVM User manual

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User's Guide
SLVU722–June 2012
TPS65280EVM User’s Guide
Contents
1 INTRODUCTION ............................................................................................................ 2
2 BACKGROUND ............................................................................................................. 2
3 BOARD LAYOUT ........................................................................................................... 3
4 BENCH TEST SETUP CONDITIONS .................................................................................... 6
4.1 Headers Description and Jumper Placement .................................................................. 6
4.2 Jumpers and Switches ............................................................................................ 6
5 POWER-UP PROCEDURE ................................................................................................ 7
6 SCHEMATIC AND BILL OF MATERIALS ............................................................................... 7
List of Figures
1 Placement (Top Layer)..................................................................................................... 3
2 Board Layout (Top Layer).................................................................................................. 4
3 Board Layout (Second Layer – Ground Plane) ......................................................................... 4
4 Board Layout (Third Layer – VIN and Signal Routing).................................................................. 5
5 Board Layout (Bottom Layer – Ground Plane).......................................................................... 5
6 Headers Description and Jumper Placement ........................................................................... 6
7 TPS65280EVM Schematic ................................................................................................ 7
1
SLVU722–June 2012 TPS65280EVM User’s Guide
Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated
INTRODUCTION
www.ti.com
1 INTRODUCTION
This document presents the information required to operate the TPS65280 PMIC as well as the support
documentation including schematic and bill of materials.
2 BACKGROUND
The TPS65280 PMIC contains a buck converter and two power switches. The buck converter is designed
to provide a 5-V voltage with maximum 4-A continuous currents. The two power switches are designed to
provide current limit at typical 1.2 A while 0.5 A/1 A/2.1 A is available with manufacture trim options.
As there are many possible options to set the converters, Table 1 presents the performance specification
summary for the EVM.
Table 1. Summary of Performance
TEST CONDITIONS PERFORMANCE
VIN = 4.5 V to 18 V Buck : 5.0 V, up to 4 A
fSW = 600 kHz Power Switch 1: 5.0 V, up to 2.1 A
(25°C ambient) Power Switch 2: 5.0 V, up to 2.1 A
The evaluation module is designed to provide access to the features of the TPS65280. Some
modifications can be made to this module to test performance at different input and output voltages,
current and switching frequency. Please contact TI Field Applications Group for advice on these matters.
2TPS65280EVM User’s Guide SLVU722–June 2012
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
www.ti.com
BOARD LAYOUT
3 BOARD LAYOUT
Figure 1. Placement (Top Layer)
3
SLVU722–June 2012 TPS65280EVM User’s Guide
Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated
BOARD LAYOUT
www.ti.com
Figure 2. Board Layout (Top Layer)
Figure 3. Board Layout (Second Layer – Ground Plane)
4TPS65280EVM User’s Guide SLVU722–June 2012
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
www.ti.com
BOARD LAYOUT
Figure 4. Board Layout (Third Layer – VIN and Signal Routing)
Figure 5. Board Layout (Bottom Layer – Ground Plane)
5
SLVU722–June 2012 TPS65280EVM User’s Guide
Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated
VSW_OUT 1
VIN
12V
GND
VSW_IN
VSW_OUT 2
VOUT
Nfault_1Nfault_2
JP6:ENSW1
JP5:ENSW2
JP3, 4:
ROSC
JP2:SS
JP1:EN
JP7:MODE
A
BENCH TEST SETUP CONDITIONS
www.ti.com
4 BENCH TEST SETUP CONDITIONS
4.1 Headers Description and Jumper Placement
Figure 6. Headers Description and Jumper Placement
Test points:
(A) LX of VOUT
4.2 Jumpers and Switches
Table 2. Jumpers and Switches
NO. FUNCTION PLACEMENT COMMENT
Connect EN1 to GND to disable VOUT1, connect EN1 to Vin
JP1 Buck Enable (EN) through a resistor to enable VOUT1; Leave open to enable
VOUT1.
Connect a external cap to this pin to program the soft start time
JP2 Soft Start (SS) of the buck converter; leave this pin open to have default 1 ms
soft start time.
Connect a resistor to this pin to set the switching frequency;
JP3, 4 Switching Frequency leave it open to set fSW to 600 kHz; connect it to ground to set
fSW to 300 kHz.
Connect this pin to high enable power switch 2; connect it to
JP5 Switch 2 Enable ground to disable power switch 2; Leave it open to enable Not recommend to leave open
power switch through internal 1.25-MΩpull up resistor
Connect this pin to high enable power switch 1; connect it to
JP6 Switch 1 Enable ground to disable power switch 1; Leave it open to enable Not recommend to leave open
power switch through internal 1.25-MΩpull up resistor.
Connect this pin to ground force the buck converter to run in
JP7 Sync/Mode PWM mode; connect an external clock signal to this pin force
the buck converter to synchronize to the clock.
6TPS65280EVM User’s Guide SLVU722–June 2012
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Copyright © 2012, Texas Instruments Incorporated
www.ti.com
POWER-UP PROCEDURE
5 POWER-UP PROCEDURE
1. Apply 4.5 V - 18 V to JP7.
2. Toggle JP1 to enable VOUT1.
3. Toggle JP6 and JP5 to enable switch 1 and Switch 2 respectively.
4. Apply loads to the output connectors.
6 SCHEMATIC AND BILL OF MATERIALS
Figure 7. TPS65280EVM Schematic
7
SLVU722–June 2012 TPS65280EVM User’s Guide
Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated
SCHEMATIC AND BILL OF MATERIALS
www.ti.com
Table 3. TPS65280EVM Bill of Materials
Item No. Qty Designator Value Footprint Manufacturer Part No. Description Comment
1 1 U1 NA QFN24 RGE Texas TPS65280RGET IC
Instruments
2 3 R1,R4,R5 100k 0603 Generic RES 100k 1/10W 0603
SMD
3 1 R2 5k 0603 Generic RES 10k 1/10W 0603 SMD
4 1 R3 51k 0603 Generic RES 51k 1/10W 0603 SMD
5 1 R6 15k 0603 Generic RES 51k 1/10W 0603 SMD Do not install
6 2 R7,R9 0 0603 Generic RES 0.0 OHM 1/10W 5%
0603 SMD
7 2 R10,R11 0 0603 Generic RES 0.0 OHM 1/10W 5%
0603 SMD
8 1 R12 40.2K 0603 Generic RES 40.2K OHM 1/10W
1% 0603 SMD
9 1 R13 7.68k 0603 Generic RES 7.68k 1/10W 0603
SMD
10 1 R14 47 0603 Generic RES 47 1/10W 0603 SMD
11 1 C1 100pF 0603 Generic CAP CERAMIC 100PF 50V Do not install
0603 SMD
12 2 C2,C6 4.7nF 0603 Generic CAP 4700PF 50V
CERAMIC X7R 0603
13 1 C3 2.2nF 0603 Generic CAP 2200PF 50V
CERAMIC X7R 0603
14 2 C4,C5 120uF 6.3mmX11.2mm Generic CAP 120UF 16V ELECT Do not install
FM RADIAL
15 2 C4a,C5a 22uF 1210 Generic CAP CERAMIC 22UF 16V
X5R 1210
16 2 C7,C8 22uF 1210 Generic CAP CERAMIC 22UF 16V
X5R 1210
17 1 C9 47nF 0603 Generic CAP 47000PF 25V CERM
X7R 0603
18 1 C10 10uF 1210 Generic CAP CER 10UF 35V X7R
10% 1210
19 1 C11 10uF 0603 Generic CAP CERAMIC 10UF 10V
0603 X5R
20 1 C13 1uF 0603 Generic CAP CERAMIC 1UF 25V
X5R 0603
21 5 J1,J2,J3,J4, ED555/2DS TB_2X3.5MM On Shore ED555/2DS TERMINAL BLOCK 3.5MM
J5 Technology 2POS PCB
22(1) 2 JP2,JP3 NA JMP0.2 Mil-Max 800-10-064-10- SIP HEADER 64 POS
001000 STRAIGHT PCB
23(2) 5 JP1,JP4, NA JMP0.3 Mil-Max 800-10-064-10- SIP HEADER 64 POS
JP5,JP6,JP7 001000 STRAIGHT PCB
24 1 L1 4.7uH 7mmX7mm Wurth 744311470 INDUCTOR POWER
Electronics 4.7UH 6A SMD
25 8 TP1,TP2, NA TEST POINT Keystone 5002 TEST POINT PC MINI
TP3,TP4, 0.042 Electronics .040"D WHITE
TP5,TP6,
TP7,TP8
26 5 TP9,TP10, NA TEST POINT Keystone 5001 TEST POINT PC MINI
TP11,TP12, 0.042 Electronics .040"D BLACK
TP13
27(3) 4 NA 3M SJ-5303 BUMPON HEMISPHERE
(CLEAR) .44X.20 CLEAR
28(4) NA 6 NA NA Sullins NA SPC02SYAN, CONN
Connector JUMPER SHORTING
Solutions GOLD FLASH
(1) Item 22: split into 2 pins
(2) Item 23: split into 3 pins
(3) Install item 27 on bottom at corners
(4) Install item 28 on item 22, 23 no order - be consistent
8TPS65280EVM User’s Guide SLVU722–June 2012
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
www.ti.com
SCHEMATIC AND BILL OF MATERIALS
9
SLVU722–June 2012 TPS65280EVM User’s Guide
Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated
EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS
Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions:
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims
arising from the handling or use of the goods.
Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from
the date of delivery for a full refund. THE FOREGOING LIMITED WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO
BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF
MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH
ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
DAMAGES.
Please read the User's Guide and, specifically, the Warnings and Restrictions notice in the User's Guide prior to handling the product. This
notice contains important safety information about temperatures and voltages. For additional information on TI's environmental and/or safety
programs, please visit www.ti.com/esh or contact TI.
No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or
combination in which such TI products or services might be or are used. TI currently deals with a variety of customers for products, and
therefore our arrangement with the user is not exclusive. TI assumes no liability for applications assistance, customer product design,
software performance, or infringement of patents or services described herein.
REGULATORY COMPLIANCE INFORMATION
As noted in the EVM User’s Guide and/or EVM itself, this EVM and/or accompanying hardware may or may not be subject to the Federal
Communications Commission (FCC) and Industry Canada (IC) rules.
For EVMs not subject to the above rules, this evaluation board/kit/module is intended for use for ENGINEERING DEVELOPMENT,
DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end product fit for general consumer
use. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing
devices pursuant to part 15 of FCC or ICES-003 rules, which are designed to provide reasonable protection against radio frequency
interference. Operation of the equipment may cause interference with radio communications, in which case the user at his own expense will
be required to take whatever measures may be required to correct this interference.
General Statement for EVMs including a radio
User Power/Frequency Use Obligations: This radio is intended for development/professional use only in legally allocated frequency and
power limits. Any use of radio frequencies and/or power availability of this EVM and its development application(s) must comply with local
laws governing radio spectrum allocation and power limits for this evaluation module. It is the user’s sole responsibility to only operate this
radio in legally acceptable frequency space and within legally mandated power limitations. Any exceptions to this are strictly prohibited and
unauthorized by Texas Instruments unless user has obtained appropriate experimental/development licenses from local regulatory
authorities, which is responsibility of user including its acceptable authorization.
For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant
Caution
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause
harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the
equipment.
FCC Interference Statement for Class A EVM devices
This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules.
These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the
instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to
cause harmful interference in which case the user will be required to correct the interference at his own expense.