Texas Instruments TPS2661EVM User manual

User’s Guide
TPS2661EVM: Evaluation Module for TPS2661x
Current-Loop Protector
ABSTRACT
This user’s guide describes the evaluation module (EVM) for the Texas instruments TPS2661x current-loop
protector. The document provides EVM configuration information and test setup details for evaluating the
TPS26610 and TPS26612 devices. The EVM schematic, board layout, and bill of materials (BOM) are also
included.
Note
The TPS26611, TPS26613 and TPS26614 devices can also be evaluated on this EVM by replacing
the TPS26610 (U1) device.
Table of Contents
1 Introduction.............................................................................................................................................................................2
2 Description.............................................................................................................................................................................. 3
3 Schematic................................................................................................................................................................................4
4 General Configurations..........................................................................................................................................................5
5 Test Setup and Procedures....................................................................................................................................................7
6 EVAL Board Assembly Drawings and Layout Guidelines................................................................................................ 22
7 Bill Of Materials (BoM)..........................................................................................................................................................24
8 Revision History................................................................................................................................................................... 26
List of Figures
Figure 3-1. TPS2661EVM eFuse Evaluation Board Schematic.................................................................................................. 4
Figure 5-1. TPS2661EVM Setup With Test Equipment............................................................................................................... 7
Figure 5-2. Current Limit Behavior of TPS26610 for IOUT > 2 × IOLWith MODE = 180 kΩ ......................................................... 8
Figure 5-3. Current Limit Behavior of TPS26610 for IOUT > 2 × IOL With MODE = 180 kΩ (Zoomed).........................................9
Figure 5-4. TPS26610 Response During Recovery From Overload Fault.................................................................................. 9
Figure 5-5. Output Short-Circuit Response of TPS26610 Device............................................................................................. 10
Figure 5-6. Output Short-Circuit Response of TPS26610 Device (Zoomed)............................................................................. 11
Figure 5-7. Input Undervoltage Protection Response of TPS26610 Device..............................................................................12
Figure 5-8. Output Undervoltage Protection Response of TPS26610 Device...........................................................................13
Figure 5-9. Output Overvoltage Protection Response of TPS26610 Device.............................................................................14
Figure 5-10. Current-Limit Behavior of TPS26612.................................................................................................................... 15
Figure 5-11. Current-Limit Behavior of TPS26612 Under Sustained Overload......................................................................... 16
Figure 5-12. Current Limit Behavior of TPS26613 for VIN < –Vs ...............................................................................................17
Figure 5-13. IEC61000-4-5 (+1 kV, 42 Ω) Signal Line Surge Immunity With TVS3301 at Input of CH1....................................18
Figure 5-14. IEC61000-4-5 (–1 kV, 42 Ω) Signal Line Surge Immunity With TVS3301 at Input of CH1....................................19
Figure 5-15. IEC61000-4-5 (+1 kV, 42 Ω) Signal Line Surge Immunity With TVS3301 at Output of CH2.................................20
Figure 5-16. IEC61000-4-5 (–1 kV, 42 Ω) Signal Line Surge Immunity With TVS3301 at Output of CH2.................................21
Figure 6-1. TPS2661EVM Board Assembly.............................................................................................................................. 22
Figure 6-2. TPS2661EVM Board Top Layer.............................................................................................................................. 22
Figure 6-3. TPS2661EVM Board Bottom Layer.........................................................................................................................23
List of Tables
Table 2-1. TPS2661EVM eFuse Evaluation Board Options and Setting..................................................................................... 3
Table 4-1. Input and Output Connector Functionality.................................................................................................................. 5
Table 4-2. Test Points Description............................................................................................................................................... 5
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Table 4-3. Jumper and LED Descriptions.................................................................................................................................... 5
Table 5-1. Default Jumper Setting for TPS2661EVM eFuse Evaluation Board........................................................................... 7
Table 7-1. TPS2661EVM Bill of Materials..................................................................................................................................24
Trademarks
All trademarks are the property of their respective owners.
1 Introduction
The TPS2661EVM allows reference circuit evaluation of the TPS26610 and TPS26612 current-loop protector
from TI. The TPS2661x device is a 50-V, universal (±20 mA, 0 to 20 mA, 4–20 mA) current-loop protector with
integrated fixed bipolar 30-mA current limit and output overvoltage protection. The device provides protection
against miswiring conditions on input/output and offers robust signal-line protection in industrial and process
automation systems.
1.1 EVM Features
TPS2661EVM board features include:
• Bidirectional current input for CH1, range: ±20 mA
• Onboard selectable 3 burden resistors for CH1: 50 Ω, 100 Ω, 250 Ω
• Voltage Input on CH2
• Onboard Power Amplifier OPA551 on CH2 for providing power for Analog output on CH2
• Gain options of 1, 2.5, and 4 for CH2 with provision to compensate for ON resistance of the TPS2661x
• Selectable overload response using jumpers on MODE pin
• IEC61000-4-5 Signal Line Surge (±1 kV, 42 Ω) Immunity with TVS3301 on Input (CH1) and Output (CH2)
• External LED to indicate status of the system
1.2 EVM Applications
Use this EVM on the following applications:
• Factory automation and control – PLCs- analog input/output module
• Motor drives control
• HART
• HVAC controllers
• Thermal controller
• UART IO protection
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2 Description
The TPS2661EVM evaluation board enables evaluation of TPS26610 and TPS26612 current loop protectors.
The input signal is applied between connectors J1 and J13 while J3 and J9 provides the output connection to the
load; see the schematic in Figure 3-1, and EVM test setup in Figure 5-1. U1 in channel-1 provides current input
protection and U3 in channel-2 provides output analog output protection and sensor supply protection.
LEDs D1 (D5) provide visual indication when the device U1 (U3) operates outside normal operating conditions.
Table 2-1 details the eFuse options and settings.
Table 2-1. TPS2661EVM eFuse Evaluation Board Options and Setting
Part Number EVM Function Channel IN Range Overload Response Application
TPS2661EVM
Evaluation Board
Current input protection
on CH1, analog output
protection and sensor
supply protection on
CH2
CH1 – TPS26610 Current input
range: ±20 mA Depends on MODE
pin selection. See
Section 8.4 in the
data sheet for the
details
Analog input protection
for current inputs
CH2 – TPS26612 Voltage input
range: 0 to +Vs
Analog module output
port protection
Note
TVS diodes U6 and U7 are required when burden resistor (R8–R11) is floating, jumpers J17 and J19
are open (burden resistor is not connected to GND).
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3 Schematic
Figure 3-1 illustrates the EVM schematic.
AGND_1 AGND_1
J5
AGND_1
J3
AGND_1
AGND_1AGND_1AGND_1
1
2
3
J4
AGND_1
AGND_2 AGND_2AGND_2
J9
AGND_2
AGND_2AGND_2AGND_2AGND_2
1
2
3
J10
100nF
C6
AGND_2
1
2
D9
24.3k
R10
TP12
AGND_2
TP13
AGND_2
0
R2
0
R5
2
1
D1
2
1
D5
J11
1.00k
R1
1.00k
R4
AGND_2 AGND_2
100pF
C4
100pF
C9
180k
R3
180k
R6
IN 1 IN 2 IN 3 IN 4
GND
5
GND
6
GND
7
GND
8
NC
9
TVS3301DRBR
U2
33V
D3
SMBJ33CA-13-F
DNP
10nF
50V
C5
DNP
GND 1 MODE
2
-VS 3
I_IN
4I_OUT 5
+VS
6
EN
7
SGOOD 8
TPS26612DDFR
U3
10nF
50V
C3
DNP
12
34 56
J6
J1
J7
33V
D6
SMBJ33CA-13-F
DNP
IN 1 IN 2 IN 3 IN 4
GND
5
GND
6
GND
7
GND
8
NC
9
TVS3301DRBR
U5
AGND_2AGND_2
1
2
6
3
5
7
4, 8
OPA551FAKTWT
U4
10nF
50V
C10
DNP
10nF
50V
C8
DNP
1
2
3
J8
282841-3
AGND_2
1
2
3
J14
1 2 3
J15
AGND_2 AGND_2
49.9
R8
100
R9
249
R11
100k
R12
+VS2
-VS2
+VS2
+VS2
+VS2
-VS2
-VS2 J12
+VS2
100nF
C7
AGND_2
-VS2
+VS2
-VS2
AGND_2
-VS2
100nF
C1
AGND_1
1
2
D4
24.3k
R7
1
2
3
J2
282841-3
AGND_1
+VS1
-VS1
+VS1
100nF
C2
AGND_1
-VS1
+VS1
-VS1
+VS1
-VS1
D2
J17 J19
AGND_1
J16
J18
-VS1
IN 1 IN 2 IN 3 IN 4
GND
5
GND
6
GND
7
GND
8
NC
9
TVS3301DRBR
U7
DNP
IN
1
IN
2
IN
3
IN
4GND 5
GND 6 GND 7 GND 8
NC 9
TVS3301DRBR
U6
DNP
AGND_1
AGND_1
J20
TP1
+VS1
TP5
-VS1
TP9
+VS2
TP15
-VS2
TP7
AGND_1
TP8
AGND_1
TP4
I_IN_1
TP3
I_OUT_1
TP2
SGOODb_1
TP10
SGOODb_2
TP11
I_OUT_2
TP16
I_IN_2
TP14
EN_2
TP6
EN_1
AGND_1
+VS1
12.1k
R13
8.06k
R14
4.02k
R15
2M
R16
2M
R17 1.00M
R21
6.04M
R20
47.0k
R18
6.73k
R19
SGOOD 8 +Vs
6
-Vs 3
IN
4
MODE
2
NC
7
OUT 5
GND 1
TPS26610DDFR
U1
1
2
3 4 5
J13
Figure 3-1. TPS2661EVM eFuse Evaluation Board Schematic
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4 General Configurations
4.1 Physical Access
Table 4-1 lists the TPS2661EVM evaluation board input and output connector functionality. Table 4-2 and Table
4-3 describe the test point availability and the jumper functionality.
Table 4-1. Input and Output Connector Functionality
Connector Channel Label Description
J1 CH1 I_IN_1, AGND_1 CH1 - Signal input connector
J3 CH1 I_OUT_1,
AGND_1 CH1 - Signal output connector
J2 CH1 +VS1, AGND_1, -
VS1 CH1 - Supply for powering the device
J13 CH2 I_IN_2, AGND_2 CH2 - Signal input connector
J9 CH2 I_OUT_2,
AGND_2 CH2 - Signal output connector
J8 CH2 +VS2, AGND_2, -
VS2 CH2 - Supply for powering the device
Table 4-2. Test Points Description
Test Points Label Description
TP1 +VS1 Positive supply for U1
TP2 SGOODb_1 Signal good indicator for CH1
TP3 I_OUT_1 Signal output for CH1
TP4 I_IN_1 Signal input for CH1
TP5 -VS1 Negative supply for U1
TP6 EN_1 Enable control for CH1
TP7, TP8 AGND_1 Reference ground for CH1
TP9 +VS2 Positive supply for U3
TP10 SGOODb_2 Signal good indicator for CH2
TP11 I_OUT_2 Signal output for CH2
TP12, TP13 AGND_2 Reference ground for CH2
TP14 EN_2 Enable control for CH2
TP15 -VS2 Negative supply for U3
TP16 I_IN_2 Signal input for CH2
Table 4-3. Jumper and LED Descriptions
Jumper Label Description
J4, J10 MODE
Overload Response Setting
Leaving J4 OPEN sets MODE = OPEN
1–2 Position connects MODE pin to GND
2–3 Position connects 180 kΩ from MODE pin to GND
J5, J11 EN EN has internal pullup and it can be left floating to enable the device
Pull EN low to turn off the device
J6 R_burden
Jumper to select burden resistor
1–2 Position connects 49.9 Ω as burden resistor
3–4 Position connects 100 Ω as burden resistor
5–6 Position connects 249 Ω as burden resistor
Leave J6 OPEN to connect load externally
J7 –VS1 Install to use U1 in single supply configuration
J12 –VS2 Install to use U3 in single supply configuration
J14 Feedback selection jumper
Jumper to select the feedback point
1–2 Position does not compensation the voltage drop in the eFuse
2–3 Position compensates the voltage drop in the eFuse
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Table 4-3. Jumper and LED Descriptions (continued)
Jumper Label Description
J15 Feedback gain selection
Jumper to select the feedback gain
1–2 Position sets gain of 4
2–3 Position sets gain of 2.5
J16, J18 Bias resistors Install to connect bias resistors on the signal lines
J17, J19 AGND_1 Install to connect signal return to the ground
J20 — Install to configure the device U3 as power supply protection for 2-wire transmitter
4.2 Test Equipment and Setup
4.2.1 Power Supplies
One dual polarity regulated power supply: +15 V : 0 V : –15 V, 500-mA current limit.
One source meter of 200 mA, 50-V rated
4.2.2 Meters
One DMM minimum needed.
4.2.3 Oscilloscope
A DPO2024 or equivalent, three 10 × voltage probes, and a DC current probe.
4.2.4 Loads
One decade resistance box or equivalent which can tolerate 50 V and capable of the output short.
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5 Test Setup and Procedures
In this user's guide, the test procedure is described for the TPS26610 and TPS26612 devices.
Make sure the evaluation board has default jumper settings as shown in Table 5-1.
Table 5-1. Default Jumper Setting for TPS2661EVM eFuse Evaluation Board
J4 J5 J6 J7 J10 J11 J12 J14 J15 J16 J17 J18 J19 J20
1–2 Open 1-2 Open 2-3 Open Open 2-3 2-3 Open Install Open Install Open
Figure 5-1. TPS2661EVM Setup With Test Equipment
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5.1 Overload Protection Test
Use the following instructions to evaluate current limit behavior of the TPS26610 (U1):
1. Set the jumper setting J4 in 2–3 position to set MODE = 180 kΩ
2. Install jumper J6 in 1-2 position to connect 49.9 Ω as burden resistor
3. Set dual polarity regulated power supply to +15 V : 0 V : –15 V and apply the power at connector J2
4. Apply a voltage of 1.6 V at I_IN_1 and then step-up to 8 V to emulate overload situation on TPS26610
5. The device limits the current to 60 mA for approximately 50 ms and after that the current is limited to 30 mA
for approximately 100-ms time and then auto retries for every 1.6 s
6. Step-down the voltage at I_IN_1 to 1.6 V to remove the overload fault
Figure 5-2 and Figure 5-3 show current limit behavior captured on the TPS2661EVM eFuse Evaluation Board.
Figure 5-4 shows device response during recovery from overload fault.
Figure 5-2. Current Limit Behavior of TPS26610 for IOUT > 2 × IOLWith MODE = 180 kΩ
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Figure 5-3. Current Limit Behavior of TPS26610 for IOUT > 2 × IOL With MODE = 180 kΩ (Zoomed)
Figure 5-4. TPS26610 Response During Recovery From Overload Fault
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5.2 Output Short-Circuit Test
Use the following instructions to perform an output short-circuit test on TPS26610 (U1):
1. Set the jumper setting J4 in 2–3 position to set MODE = 180 kΩ
2. Open jumper J6
3. Set dual polarity regulated power supply to +15 V : 0 V : –15 V and apply the power at connector J2
4. Apply a voltage of 12 V at I_IN_1
5. Short the output of the device for example, I_OUT_1 to AGND_1 with a shorter cable
6. Observe the waveforms using an oscilloscope
Figure 5-5 and Figure 5-6 show test waveforms of output hot-short on the TPS2661 eFuse evaluation board.
Figure 5-5. Output Short-Circuit Response of TPS26610 Device
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Figure 5-6. Output Short-Circuit Response of TPS26610 Device (Zoomed)
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5.3 Input Undervoltage Protection Test
Use the following instructions to perform input undervoltage protection test:
1. Set dual polarity regulated power supply to +15 V : 0 V : –15 V and apply the power at connector J2
2. OPEN jumper J6
3. Connect a load of 3 kΩ between I_OUT_1 and AGND_1 at connector J3
4. Apply a voltage of 0 V at I_IN_1 and gradually decrease the voltage to –15.4 V to trigger the input
undervoltage fault
5. Observe the waveforms using an oscilloscope
Figure 5-7 shows input undervoltage protection response of TPS26610 on TPS2661EVM eFuse Evaluation
Board.
Figure 5-7. Input Undervoltage Protection Response of TPS26610 Device
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5.4 Output Undervoltage Protection Test
Use the following instructions to perform output undervoltage protection test:
1. Set dual polarity regulated power supply to +15 V : 0 V : –15 V and apply the power at connector J2
2. Connect a load of 3 kΩ between I_IN_1 and AGND_1 at connector J1
3. Apply a voltage of 0 V at I_OUT_1 and gradually decrease the voltage to –15.4 V to trigger the output
undervoltage fault
4. Observe the waveforms using an oscilloscope
Figure 5-8 shows output undervoltage protection response of TPS26610 on TPS2661EVM eFuse Evaluation
Board.
Figure 5-8. Output Undervoltage Protection Response of TPS26610 Device
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5.5 Output Overvoltage Protection Test
Use the following instructions to perform output overvoltage protection test:
1. Set dual polarity regulated power supply to +15 V : 0 V : –15 V and apply the power at connector J2
2. Connect a load of 3 kΩ between I_IN_1 and AGND_1 at connector J1
3. Apply a voltage of 0 V at I_OUT_1 and gradually increase the voltage to 15.3 V to trigger the output
overvoltage fault
4. Observe the waveforms using an oscilloscope
Figure 5-9 shows output overvoltage protection response of TPS26610 on TPS2661EVM eFuse evaluation
board.
Figure 5-9. Output Overvoltage Protection Response of TPS26610 Device
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5.6 TPS26612 Overload Protection Test
Use the following instructions to evaluate current limit behavior of TPS26612 (U3):
1. Set the jumper setting J10 in 1–2 position to set MODE = OPEN
2. Connect a load resistance of 1 kΩ between I_OUT_2 and AGND_2 at connector J9
3. Adjust potentiometer R12 to set 6V at I_IN_2 (J13/ TP16). This action results in a voltage of 15 V at the input
of TPS26612 eFuse (U3)
4. Now apply load of 5 Ω between I_OUT_2 and AGND_2 to trigger overload fault
5. Observe the waveforms using an oscilloscope
Figure 5-10 and Figure 5-11 show current limit behavior of TPS26612 captured on the TPS2661EVM eFuse
evaluation board.
Figure 5-10. Current-Limit Behavior of TPS26612
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Figure 5-11. Current-Limit Behavior of TPS26612 Under Sustained Overload
5.7 Current Limiting for VIN < –Vs
Use the following instructions to evaluate current limit behavior for input voltages lower than negative bias supply
(–Vs):
1. Replace the TPS26610 with TPS26613 in U1 position
2. The current limiting behavior is independent of MODE setting for VIN < –Vs, so jumper setting J4 can be in
any position
3. Open jumper J6
4. Connect 600 Ω at terminal J3
5. Set dual polarity regulated power supply to +20 V : 0 V : –20 V and apply the power at connector J2
6. Apply a voltage of –24 V at I_IN_1
7. The device limits the current to 32 mA for approximately 100 ms and then auto retries for every 800 ms
Figure 5-12 shows current limit behavior captured on the TPS2661EVM with TPS26613 in U1 position.
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VIN
VOUT
I_IN
SGOODb
Figure 5-12. Current Limit Behavior of TPS26613 for VIN < –Vs
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5.8 Surge Protection Test (Current Input, CH1)
Use the following instructions to perform surge test on the current input channel-1:
1. Set dual polarity regulated power supply to +15 V : 0 V : –15 V and apply the power at connector J2
2. Install jumper J6 in 5–6 position to connect 249 Ω as burden resistor
3. Set the source meter to 20 mA and connector to PSIL116 at J1
4. Use UCS500N to generate surge pulses. Set the test voltage to ±1 kV and coupling impedance to 42 Ω as
specified by IEC61000-4-5 to check the signal line transient immunity
5. Connect the surge pulse generator UCS500N at J1 and enable it
6. Observe the waveforms using an oscilloscope
Figure 5-13 and Figure 5-14 show surge performance for current inputs with TPS26610 on the TPS2661EVM
eFuse evaluation board.
Figure 5-13. IEC61000-4-5 (+1 kV, 42 Ω) Signal Line Surge Immunity With TVS3301 at Input of CH1
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Figure 5-14. IEC61000-4-5 (–1 kV, 42 Ω) Signal Line Surge Immunity With TVS3301 at Input of CH1
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5.9 Surge Protection Test (Analog Output, CH2)
Use the following instructions to perform surge test on the analog output in channel-2:
1. Set dual polarity regulated power supply to +15 V : 0 V : –15 V and apply the power at connector J8
2. Connect load resistor of 2 kΩ at the output
3. Adjust the potentiometer R12 to set 10 V at the input of TPS26612
4. Use UCS500N to generate surge pulses. Set the test voltage to ±1 kV and coupling impedance to 42 Ω as
specified by IEC61000-4-5 to check the signal line transient immunity
5. Connect the surge pulse generator UCS500N at J9 and enable it
6. Observe the waveforms using an oscilloscope
Figure 5-15 and Figure 5-16 show surge performance for current inputs with TPS26610 on the TPS2661EVM
eFuse evaluation board.
Figure 5-15. IEC61000-4-5 (+1 kV, 42 Ω) Signal Line Surge Immunity With TVS3301 at Output of CH2
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