Texas Instruments SimpleLink SWRS225D User manual

SimpleLink™ Wi-Fi CC3135MOD Dual-Band Network Processor Module
1 Features
• Fully integrated and green/RoHS module includes
all required clocks, serial peripheral interface (SPI)
flash, and passives
• Integrated Wi-Fi® and internet protocols
• 802.11a/b/g/n: 2.4 GHz and 5 GHz
• FCC, IC/ISED, ETSI/CE, and MIC certified
• FIPS 140-2 Level 1 validated IC inside
• Rich set of IoT security features helps developers
protect data
• Low-power modes for battery powered application
• Coexistence with 2.4 GHz radios
• Industrial temperature: –40°C to +85°C
•Wi-Fi network processor subsystem:
– Wi-Fi core:
• 802.11 a/b/g/n 2.4 GHz and 5 GHz
• Modes:
– Access Point (AP)
– Station (STA)
– Wi-Fi Direct® (only supported on 2.4
GHz)
• Security:
– WEP
– WPA™/ WPA2™ PSK
– WPA2 Enterprise
– WPA3™ Personal
– WPA3™ Enterprise
– Internet and application protocols:
• HTTPs server, mDNS, DNS-SD, DHCP
• IPv4 and IPv6 TCP/IP stack
• 16 BSD sockets (fully secured TLS v1.2 and
SSL 3.0)
– Built-in power management subsystem:
• Configurable low-power profiles (always on,
intermittently connected, tag)
• Advanced low-power modes
• Integrated DC/DC regulators
• Application throughput
– UDP: 16 Mbps
– TCP: 13 Mbps
•Multilayered Security Features:
– Separate execution environments
– Networking security
– Device identity and key
– Hardware accelerator cryptographic engines
(AES, DES, SHA/MD5, CRC)
– File system security (encryption, authentication,
access control)
– Initial secure programming
– Software tamper detection
– Secure boot
– Certificate signing request (CSR)
– Unique per device key pair
• Recovery mechanism – ability to recover to factory
defaults
•Power-Management Subsystem:
– Integrated DC/DC converters support a wide
range of supply voltage:
• Single wide-voltage supply, VBAT: 2.3 V to
3.6 V
– Advanced low-power modes:
• Shutdown: 1 µA, hibernate: 5.5 µA
• Low-power deep sleep (LPDS): 115 µA
• Idle connected (MCU in LPDS): 710 µA
• RX traffic (MCU active): 53 mA
• TX traffic (MCU active): 223 mA
• Wi-Fi TX power
– 2.4 GHz: 16 dBm at 1 DSSS
– 5 GHz: 15.1 dBm at 6 OFDM
• Wi-Fi RX sensitivity
– 2.4 GHz: –94.5 dBm at 1 DSSS
– 5 GHz: –89 dBm at 6 OFDM
• Additional integrated components on module
– 40.0 MHz crystal with internal oscillator
– 32.768 kHz crystal (RTC)
– 32 Mbit SPI Serial Flash
– RF filters, diplexer, and passive components
• QFM package
– 1.27-mm pitch, 63-pin, 20.5-mm × 17.5-mm
QFM package for easy assembly and low-cost
PCB design
• Module supports SimpleLink Developers
Ecosystem
CC3135MOD
SWRS225D – FEBRUARY 2019 – REVISED MAY 2021
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

2 Applications
• For Internet of Things applications, such as:
–Medical and Healthcare
•Multiparameter Patient Monitor
•Electrocardiogram (ECG)
•Electronic Hospital Bed & Bed Control
•Telehealth Systems
–Building and Home Automation:
•HVAC Systems & Thermostat
•Video Surveillance, Video Doorbells, and
Low-Power Camera
•Building Security Systems and E-locks
–Appliances
–Asset Tracking
–Factory Automation
–Grid Infrastructure
3 Description
The CC3135MOD is an FCC, IC/ISED, ETSI/CE, MIC, and Wi-Fi CERTIFIED™ module that dramatically
simplifies the implementation of Internet connectivity. This dual-band Wi-Fi® network processor module can be
added to any low-cost, low-power microcontroller unit (MCU); it integrates all protocols for Wi-Fi® and Internet,
which greatly minimize host MCU software requirements.
This ROM-based subsystem includes an 802.11 a/b/g/n dual-band 2.4 GHz and 5 GHz radio, baseband, and
MAC with powerful hardware cryptographic engine. With built-in security protocols, the CC3135MOD solution
provides a robust and simple security experience. The CC3135MOD is available in an LGA package that is
easy to lay out with all required components including serial Flash, RF filters, diplexer, crystal, and passive
components that are fully integrated.
This generation introduces new capabilities that further simplify the connectivity of things to the Internet. The
main new features of CC3135MOD include:
• 802.11 a/b/g/n: 2.4 GHz and 5 GHz support
• 2.4 GHz Coexistence with Bluetooth® low energy radio
• Antenna diversity
• Enhanced security with FIPS 140-2 level 1 validated IC inside: certification
• More concurrent secure sockets, up to 16
• Unique device identifier with ability to generate certificate signing request (CSR)
• Online certificate status protocol (OCSP)
• Wi-Fi Alliance® certified for IoT low power capabilities
• Hostless mode for offloading template packet transmissions
• Improved fast scan
The CC3135MOD device is part of the SimpleLink™ MCU platform—a common, easy-to-use development
environment based on a single-core software development kit (SDK) with a rich tool set and reference designs.
The E2E™ community supports Wi-Fi®, Bluetooth ® low energy, Sub-1 GHz, and host MCUs. For more
information, visit www.ti.com/SimpleLink.
Table 3-1. Module Information(1)
PART NUMBER PACKAGE BODY SIZE
CC3135MODRNMMOBR QFM (63) 20.5 mm × 17.5 mm
(1) For more information, see Section 13.
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4 Functional Block Diagrams
Figure 4-1 shows the functional block diagram of the CC3135MOD module.
CC3135
MAC/PHY
WRF_BGN F
BGN
RF_ABG
32-Mbit
SFlash
External SPI
Programming
40 MHz
32.768 kHz
UART
SPI
nReset
PM
2.3 V to 3.6 V
VBAT
Aband
F
D
5 GHz
SPDT
WRF_A
HiB
Figure 4-1. CC3135MOD Module Functional Block Diagram
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Figure 4-2 shows the CC3135 hardware overview.
NETWORK PROCESSOR
Wi-Fi Driver
TCP/IP Stack
ARM Cortex
Application
Protocols
RAM
ROM
MAC
Processor
Baseband
Radio
Synthesizer
External MCU
Crypto Engines
POWER
MANAGEMENT
Oscillators
DC-DC
RTC
Wi-Fi Network Processor
Hardware
1x SPI 1x UART
Host Interface
Dual Band
Wi-Fi
Figure 4-2. CC3135 Hardware Overview
Figure 4-3 shows an overview of the CC3135 embedded software.
Host Interface
Network Apps
TCP/IP Stack
WLAN Security
and Management
WLAN MAC and PHY
Customer Application
SimpleLink Driver APIs
Copyright © 2017, Texas Instruments Incorporated
NetApp BSD Socket Wi-Fi
Figure 4-3. CC3135 Embedded Software Overview
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Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 2
3 Description.......................................................................2
4 Functional Block Diagrams............................................ 3
5 Revision History.............................................................. 6
6 Device Comparison......................................................... 7
6.1 Related Products........................................................ 8
7 Terminal Configuration and Functions..........................9
7.1 CC3135MOD Pin Diagram..........................................9
7.2 Pin Attributes.............................................................10
7.3 Signal Descriptions................................................... 14
7.4 Connections for Unused Pins................................... 16
8 Specifications................................................................ 17
8.1 Absolute Maximum Ratings...................................... 17
8.2 ESD Ratings............................................................. 17
8.3 Recommended Operating Conditions.......................17
8.4 Current Consumption Summary: 2.4 GHz RF
Band............................................................................ 18
8.5 Current Consumption Summary: 5 GHz RF Band.... 18
8.6 TX Power Control for 2.4 GHz Band.........................19
8.7 TX Power Control for 5 GHz Band............................21
8.8 Brownout and Blackout Conditions........................... 22
8.9 Electrical Characteristics for DIO Pins...................... 23
8.10 WLAN Receiver Characteristics..............................24
8.11 WLAN Transmitter Characteristics.......................... 25
8.12 BLE and WLAN Coexistence Requirements...........26
8.13 Reset Requirement................................................. 26
8.14 Thermal Resistance Characteristics for MOB
Package...................................................................... 26
8.15 Timing and Switching Characteristics..................... 27
8.16 External Interfaces.................................................. 29
9 Detailed Description......................................................33
9.1 Overview................................................................... 33
9.2 Module Features....................................................... 33
9.3 Power-Management Subsystem...............................37
9.4 Low-Power Operating Modes................................... 37
9.5 Restoring Factory Default Configuration...................38
9.6 Hostless Mode.......................................................... 38
9.7 Device Certification and Qualification....................... 39
9.8 Module Markings.......................................................41
9.9 End Product Labeling................................................42
9.10 Manual Information to the End User....................... 42
10 Applications, Implementation, and Layout............... 43
10.1 Application Information........................................... 43
10.2 PCB Layout Guidelines...........................................47
11 Environmental Requirements and SMT
Specifications................................................................53
11.1 Temperature............................................................ 53
11.2 Handling Environment.............................................53
11.3 Storage Condition................................................... 53
11.4 PCB Assembly Guide..............................................53
11.5 Baking Conditions................................................... 54
11.6 Soldering and Reflow Condition..............................55
12 Device and Documentation Support..........................56
12.1 Device Nomenclature..............................................56
12.2 Development Tools and Software........................... 56
12.3 Firmware Updates...................................................58
12.4 Documentation Support.......................................... 58
12.5 Trademarks............................................................. 59
12.6 Electrostatic Discharge Caution..............................59
12.7 Export Control Notice..............................................60
12.8 Glossary..................................................................60
13 Mechanical, Packaging, and Orderable
Information.................................................................... 61
13.1 Mechanical, Land, and Solder Paste Drawings...... 61
13.2 Package Option Addendum.................................... 61
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5 Revision History
Changes from September 28, 2020 to May 13, 2021 (from Revision C (September 2020) to
Revision D (May 2021)) Page
• Updated the numbering format for tables, figures, and cross-references throughout the document..................1
• Added "WPA3™ Enterprise" in Section 1 Features ............................................................................................1
• Added "WPA3 personal" to list of supported features in Section 9.1 ...............................................................33
• Added footnote to Section 9.1 ......................................................................................................................... 33
• Added "WPA3 personal and enterprise security" to Section 9.1 ......................................................................33
• Added "WPA3 Personal" to list of on-chip security accelerators in Section 9.2.1 ............................................33
• Added "WPA3 Enterprise" to list of on-chip security accelerators in Section 9.2.1 ..........................................33
• Added "WPA3 personal" to list of Wi-Fi security features in Table 9-1 ............................................................ 34
• Added footnote to Section 9.2.2 ...................................................................................................................... 34
• Added "WPA3 personal and enterprise" to Table 9-1 ...................................................................................... 34
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6 Device Comparison
Table 6-1 shows the features supported across different CC3x35 modules.
Table 6-1. Device Features Comparison
FEATURE DEVICE
CC3135MOD CC3235MODS CC3235MODSF
Onboard Chip CC3135 CC3235S CC3235SF
Onboard ANT No No No
sFlash 32-Mbit 32-Mbit 32-Mbit
Regulatory Certification FCC, IC/ISED, ETSI/CE, MIC FCC, IC/ISED, ETSI/CE, MIC FCC, IC/ISED, ETSI/CE, MIC
Wi-Fi Alliance® Certification Yes Yes Yes
Input Voltage 2.3 V to 3.6 V 2.3 V to 3.6 V 2.3 V to 3.6 V
Package 17.5 mm × 20.5 mm LGA 17.5 mm × 20.5 mm LGA 17.5 mm × 20.5 mm LGA
Operating Temperature Range –40° to 85°C –40° to 85°C –40° to 85°C
Classification Wi-Fi Network Processor Wireless Microcontroller Wireless Microcontroller
Standard 802.11 a/b/g/n 802.11 a/b/g/n 802.11 a/b/g/n
Frequency 2.4 GHz, 5 GHz 2.4 GHz, 5 GHz 2.4 GHz, 5 GHz
TCP / IP Stack IPv4, IPv6 IPv4, IPv6 IPv4, IPv6
Secured sockets 16 16 16
Integrated MCU - Arm® Cortex®-M4 at 80 MHz Arm® Cortex®-M4 at 80 MHz
On-Chip Memory
RAM - 256KB 256KB
Flash - - 1MB
Peripherals and Interfaces
Universal Asynchronous Receiver
and Transmitter (UART) 1 2 2
Serial Port Interface (SPI) 1 1 1
Multi-Channel Audio Serial Port
(McASP)- I2S or PCM - 2-ch 2-ch
Inter-Integrated Circuit (I2C) - 1 1
Analog to Digital Converter (ADC) - 4-ch, 12-bit 4-ch, 12-bit
Parallel Interface (8-bit PI) - 1 1
General Purposes Timers - 4 4
Multimedia Card (MMC / SD) - 1 1
Security Features
Additional Networking Security
Unique Device Identity
Trusted Root-Certificate Catalog
TI Root-of-Trust Public key
Unique Device Identity
Trusted Root-Certificate Catalog
TI Root-of-Trust Public key
Unique Device Identity
Trusted Root-Certificate Catalog
TI Root-of-Trust Public key
Hardware Acceleration Hardware Crypto Engines Hardware Crypto Engines Hardware Crypto Engines
Secure Boot - Yes Yes
Enhanced Application Level
Security -
File system security
Secure key storage
Software tamper detection
Cloning protection
Initial secure programming
File system security
Secure key storage
Software tamper detection
Cloning protection
Initial secure programming
FIPS 140-2 Level 1 Certification Yes Yes Yes
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6.1 Related Products
For information about other devices in this family of products or related products see the links below.
The SimpleLink™
MCU Portfolio
Offers a single development environment that delivers flexible hardware, software, and
tool options for customers developing wired and wireless applications. With 100%
code reuse across host MCUs, Wi-Fi, Bluetooth low energy, Sub-1 GHz devices and
more, choose the MCU or connectivity standard that fits your design. A one-time
investment with the SimpleLink software development kit (SDK) allows you to reuse
often, opening the door to create unlimited applications. For more information, visit
www.ti.com/simplelink.
SimpleLink™ Wi-Fi®
Family
Offers several Internet-on-a chip solutions, which address the need of battery
operated, security enabled products. Texas Instruments offers a single chip wireless
microcontroller and a wireless network processor which can be paired with any MCU, to
allow developers to design new Wi-Fi products, or upgrade existing products with Wi-Fi
capabilities. For more information, visit www.ti.com/simplelinkwifi.
MSP432™ Host
MCU
The MSP432P401R MCU features the Arm® Cortex®-M4 processor offering ample
processing capability with floating point unit and memory footprint for advanced
processing algorithm, communication protocols as well as application needs, while
incorporating a 14-bit 1-msps ADC14 that provides a flexible and low-power analog
with best-in-class performance to enable developers to add differentiated sensing
and measurement capabilities to their Wi-Fi applications. For more information, visit
www.ti.com/product/MSP432P401R.
Reference Designs
for CC3135 and
CC3235 Modules
The TI Designs Reference Design Library is a robust reference design library spanning
analog, embedded processor, and connectivity. Created by TI experts to help you
jump start your system design, all TI Designs include schematic or block diagrams,
BOMs, and design files to speed your time to market. Search and download designs at
www.ti.com/tidesigns.
CC3135 SDK Plug In The CC3135 SDK Plug In contains drivers, many sample applications for Wi-Fi features
and Internet, and documentation needed to use the CC3135 solution. Learn more at
http://www.ti.com/tool/simplelink-sdk-wifi-plugin.
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7 Terminal Configuration and Functions
7.1 CC3135MOD Pin Diagram
Figure 7-1 shows the pin diagram for the CC3135MOD module.
UART1_nRTS
NC UART1_TX
UART1_RX
TEST_58
TEST_59 TEST_60 UART1_nCTS TEST_62
DIO8 DIO9
GND GND GND
SOP1 SOP2
DIO29
RESERVED
NC
DIO28 DIO24
FLASH_SPI_MOSI
VBAT2
GND
GND
GND
RF_ABG
GND
NC
SOP0
nRESET
VBAT_RESET
VBAT1
GND
NC
NC
DIO30
GND
GND
FLASH_SPI_CLK
FLASH_SPI_nCS_IN
FLASH_SPI_MISO
DIO23
HOST_INTR
DIO13
DIO14
HOST_SPI_nCS
HOST_SPI_DOUT
HOST_SPI_DIN
HOST_SPI_CLK
nHIB
DIO10
GND
GND
CC3135MOD
57
59
60 63
56
61
58
62
55
26232221 27252420191817
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
145484950 44464751525354
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
Figure 7-1 shows the approximate location of pins on the module.
Figure 7-1. CC3135MOD Pin Diagram Bottom View
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7.2 Pin Attributes
Table 7-1 describes the CC3135MOD pins.
Note
Digital IOs on the CC3135MOD refer to hostless mode, BLE/2.4 GHz coexistence, and antenna select IOs, not general-purpose IOs.
If an external device drives a positive voltage to signal pads when the CC3135MOD is not powered, DC current is drawn from the other device.
If the drive strength of the external device is adequate, an unintentional wakeup and boot of the CC3135MOD device can occur. To prevent
current draw, TI recommends one of the following:
• All devices interfaced to the CC3135MOD must be powered from the same power rail as the CC3135MOD device.
• Use level shifters between the CC3135MOD and any external devices fed from other independent rails.
• The nRESET pin of the CC3135MOD device must be held low until the VBAT supply to the device is driven and stable.
Table 7-1. Pin Description and Attributes
PIN DEFAULT FUNCTION
DIGITAL I/O
STATE AT
RESET AND
HIBERNATE
I/O TYPE (1) CC3135 DEVICE
PIN NO. DESCRIPTION
HOSTLESS
MODE
BLE COEX
CC_COEX_
OUT
CC_COEX_
IN
1 GND N/A N/A N/A – Power - GND
2 GND N/A N/A N/A – Power - GND
3 DIO10 Y Y Y – I/O 1 Digital input or output
4 nHIB - - - Hi-Z I 2
Hibernate signal input to the NWP subsystem
(active low). This is connected to the MCU GPIO.
If the GPIO from the MCU can float while the
MCU enters low power, consider adding a pullup
resistor on the board to avoid floating.
5 HOST_SPI_CLK - - - Hi-Z I 5 Host interface SPI clock
6 HOST_SPI_MOSI - - - Hi-Z I 6 Host interface SPI data input
7 HOST_SPI_MISO - - - Hi-Z O 7 Host interface SPI data output
8 HOST_SPI_nCS - - - Hi-Z I 8 Host interface SPI chip select (active low)
9 DIO12 Y Y Y – O 3 Digital input or output
10 DIO13 Y Y Y – – 4 Digital input or output
11 HOST_INTR - - - Hi-Z O 15 Interrupt output (active high)
12 DIO23 Y Y Y Hi-Z 16 Digital input or output
13 FLASH _SPI_MISO N/A N/A N/A Hi-Z O - External Serial Flash Programming: SPI data out
14 FLASH _SPI_CS N/A N/A N/A Hi-Z I - External Serial Flash Programming: SPI chip
select (active low)
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Table 7-1. Pin Description and Attributes (continued)
PIN DEFAULT FUNCTION
DIGITAL I/O
STATE AT
RESET AND
HIBERNATE
I/O TYPE (1) CC3135 DEVICE
PIN NO. DESCRIPTION
HOSTLESS
MODE
BLE COEX
CC_COEX_
OUT
CC_COEX_
IN
15 FLASH_SPI_CLK N/A N/A N/A Hi-Z I - External Serial Flash Programming: SPI clock
16 GND N/A N/A N/A – Power - Ground
17 FLASH_SPI_MOSI N/A N/A N/A Hi-Z I - External Serial Flash Programming: SPI data in
18 DIO24 Y Y Y Hi-Z 17 Digital input or output
19 DIO28 Y Y Y – – 18 Digital input or output
20 NC N/A N/A N/A – – - No Connect
21 Reserved - - - Hi-Z – - No Connect
22 DIO29 Y Y Y Hi-Z 20 Digital input or output
23 SOP2 Y (2) Y - Hi-Z O 21 A 100 kΩ pull down resistor is internally tied to
this SOP pin.
24 SOP1 N/A N/A N/A Hi-Z – 34
A 100 kΩ pull down resistor is internally tied to
this SOP pin. SOP[2:0] used for factory restore.
See Section 9.5.
25 GND N/A N/A N/A – Power - GND
26 GND N/A N/A N/A – Power - GND
27 GND N/A N/A N/A – Power - GND
28 GND N/A N/A N/A – Power - GND
29 GND N/A N/A N/A – Power - GND
30 GND N/A N/A N/A – Power - GND
31 RF_ABG N/A N/A N/A Hi-Z RF 27, 28, 31 2.4 GHz & 5 GHz RF TX, RX
32 GND N/A N/A N/A – Power - GND
33 NC N/A N/A N/A – – - No Connect
34 SOP0 N/A N/A N/A Hi-Z – 35
A 100 kΩ pull down resistor is internally tied to
this SOP pin. SOP[2:0] used for factory restore.
See Section 9.5.
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Table 7-1. Pin Description and Attributes (continued)
PIN DEFAULT FUNCTION
DIGITAL I/O
STATE AT
RESET AND
HIBERNATE
I/O TYPE (1) CC3135 DEVICE
PIN NO. DESCRIPTION
HOSTLESS
MODE
BLE COEX
CC_COEX_
OUT
CC_COEX_
IN
35 nRESET N/A N/A N/A Hi-Z I 32 There is an internal 100 kΩ pull-up resistor
option from the nRESET pin to VBAT_RESET.
Note: VBAT_RESET is not connected to VBAT1
or VBAT2 within the module. The following
connection schemes are recommended:
• Connect nRESET to a GPIO from the
host only if nRESET will be in a defined
state under all operating conditions. Leave
VBAT_RESET unconnected to save power.
• If nRESET cannot be in a defined state
under all operating conditions, connect
VBAT_RESET to the main module power
supply (VBAT1 and VBAT2). Due to the
internal pull-up resistor, a leakage current of
3.3 V / 100 kΩ is expected.
36 VBAT_RESET N/A N/A N/A Hi-Z - 37
37 VBAT1 N/A N/A N/A Hi-Z - 39 Power supply for the module, must be connected
to battery (2.3 V to 3.6 V)
38 GND N/A N/A N/A – Power - GND
39 NC N/A N/A N/A – – - No Connect
40 VBAT2 N/A N/A N/A Hi-Z - 10, 44, 54 Power supply for the module, must be connected
to battery (2.3 V to 3.6 V)
41 NC N/A N/A N/A – – - No Connect
42 DIO30 Y Y Y Hi-Z – 53 Network Scripter I/O
43 GND N/A N/A N/A – Power - GND
44 UART1_nRTS - - - Hi-Z O 50 UART interface to host (request to send)
45 NC N/A N/A N/A – – - No Connect
46 UART1_TX - - - Hi-Z O 55 UART interface to host (transmit)
47 UART1_RX - - - Hi-Z I 57 UART interface to host (receive)
48 TEST_58 Y Y Y Hi-Z O 58 Test signal; connect to an external test point.
49 TEST_59 Y Y Y Hi-Z I 59 Test signal; connect to an external test point.
50 TEST_60 Y Y Y Hi-Z O 60 Test signal; connect to an external test point.
51 UART1_nCTS - - - Hi-Z I 61 UART interface to host (clear to send)
52 TEST_62 - - - Hi-Z O 62 Test signal; connect to an external test point.
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Table 7-1. Pin Description and Attributes (continued)
PIN DEFAULT FUNCTION
DIGITAL I/O
STATE AT
RESET AND
HIBERNATE
I/O TYPE (1) CC3135 DEVICE
PIN NO. DESCRIPTION
HOSTLESS
MODE
BLE COEX
CC_COEX_
OUT
CC_COEX_
IN
53 DIO8 Y Y Y Hi-Z 63 Digital input or output
54 DIO9 Y Y Y Hi-Z – 64 Digital input or output
(1) I = input, O = output, RF = radio frequency, I/O = bidirectional
(2) Output Only
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7.3 Signal Descriptions
Table 7-2. Signal Descriptions
FUNCTION SIGNAL NAME PIN
NO.
PIN
TYPE
SIGNAL
DIRECTION DESCRIPTION
Antenna
selection
DIO10 3 I/O O
Antenna selection control
DIO12 9 I/O O
DIO13 10 I/O O
DIO23 12 I/O O
DIO24 18 I/O O
DIO28 19(1) I/O O
DIO29 22 I/O O
DIO25 23 O O
DIO30 42(1) I/O O
DIO3 48 I/O O
DIO4 49 I/O O
DIO5 50 I/O O
DIO8 53 I/O O
DIO9 54 I/O O
Bluetooth Low
Energy/2.4 GHz
Radio
coexistence(2)
DIO10 3 I/O I/O
Coexistence inputs and outputs
DIO12 9 I/O I/O
DIO13 10 I/O I/O
DIO23 12 I/O I/O
DIO24 18 I/O I/O
DIO28 19(1) I/O I/O
DIO29 22 I/O I/O
DIO30 42(1) I/O I/O
DIO3 48 I/O I/O
DIO4 49 I/O I/O
DIO5 50 I/O I/O
DIO8 53 I/O I/O
DIO9 54 I/O I/O
Hostless Mode
DIO10 3 I/O I/O
Hostless mode inputs and outputs
DIO12 9 I/O I/O
DIO13 10 I/O I/O
DIO23 12 I/O I/O
DIO24 18 I/O I/O
DIO28 19(1) I/O I/O
DIO29 22 I/O I/O
DIO25 23 O O
DIO30 42(1) I/O I/O
DIO3 48 I/O I/O
DIO4 49 I/O I/O
DIO5 50 I/O I/O
DIO8 53 I/O I/O
DIO9 54 I/O I/O
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Table 7-2. Signal Descriptions (continued)
FUNCTION SIGNAL NAME PIN
NO.
PIN
TYPE
SIGNAL
DIRECTION DESCRIPTION
HOST SPI
HOST_SPI_CLK 5 I/O I Host SPI clock input
HOST_SPI_MOSI 6 I/O I Data from Host
HOST_SPI_MISO 7 I/O O Data to Host
HOST_SPI_nCS 8 I/O I Device select (active low)
FLASH SPI
FLASH_SPI_MISO 13 O I External serial Flash interface: SPI data out
FLASH_SPI_CS 14 I O External serial Flash interface: SPI chip select (active
low)
FLASH_SPI_CLK 15 I O External serial Flash interface: SPI clock
FLASH_SPI_MOSI 17 I O External serial Flash interface: SPI data in
UART
UART1_nRTS 44 I/O O UART1 request-to-send (active low)
UART1_TX 46 I/O I UART TX data
UART1_RX 47 I/O O UART RX data
UART1_nCTS 51 I/O I UART1 clear-to-send (active low)
Sense-On-Power
SOP2 23(3) O I Sense-on-power 2
SOP1 24 I I Configuration sense-on-power 1
SOP0 34 I I Configuration sense-on-power 0
Power VBAT1 37 - - Power supply for the module
VBAT2 40 - - Power supply for the module
nHIB nHIB 4 I I Hibernate signal input to the NWP subsystem (active
low)
RF RF_ABG 31 I/O I/O WLAN analog RF 802.11 a/b/g/n bands
Test Port
TEST_58 48 O O Test Signal
TEST_59 49 I I Test Signal
TEST_60 50 O O Test Signal
TEST_62 52 O O Test Signal
(1) LPDS retention unavailable.
(2) The CC3135MOD modules are compatible with TI BLE modules using an external RF switch.
(3) This pin has dual functions: as a SOP[2] (device operation mode), and as an external TCXO enable. As a TXCO enable, the pin is an
output on power up and driven logic high. During hibernate low-power mode, the pin is in a Hi-Z state but is pulled down for SOP mode
to disable TCXO. Because of the SOP functionality, the pin must be used as an output only.
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7.4 Connections for Unused Pins
All unused pins must be left as no connect (NC) pins. Table 7-3 provides a list of NC pins.
Table 7-3. Connections for Unused Pins
FUNCTION SIGNAL DESCRIPTION PIN NUMBER ACCEPTABLE PRACTICE
DIO Digital input or output 3, 9, 10, 12, 18,
19, 22, 42, 53, 54
Wake up I/O source should not be floating
during hibernate. All the I/O pins will float
while in Hibernate and Reset states. Ensure
pullup and pulldown resistors are available on
board to maintain the state of the I/O. Leave
unused GPIOs as NC
No Connect NC 20, 21, 33, 39,
41, 45 Unused pin, leave as NC.
SOP Configuration sense-on-power 23, 24, 34
Leave as NC (Modules contain internal 100
kΩ pull down resistors on the SOP lines). An
external 10 kΩ pull up resistor is required for
factory restore. See Section 9.5.
Reset RESET input for the device 35, 36
There is an internal 100 kΩ pull-up
resistor option from the nRESET pin to
VBAT_RESET. Note: VBAT_RESET is not
connected to VBAT1 or VBAT2 within the
module. The following connection schemes
are recommended:
• Connect nRESET to a GPIO from the
host only if nRESET will be in a defined
state under all operating conditions.
Leave VBAT_RESET unconnected to
save power.
• If nRESET cannot be in a defined state
under all operating conditions, connect
VBAT_RESET to the main module power
supply (VBAT1 and VBAT2). Due to the
internal pull-up resistor, a leakage current
of 3.3 V / 100 kΩ is expected.
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8 Specifications
All measurements are references of the module pins, unless otherwise indicated. All specifications are over
process and voltage, unless otherwise indicated.
8.1 Absolute Maximum Ratings
These specifications indicate levels where permanent damage to the module can occur. Functional operation is not ensured
under these conditions. Operation at absolute maximum conditions for extended periods can adversely affect long-term
reliability of the module (1) (2).
MIN MAX UNIT
VBAT –0.5 3.8 V
Digital I/O –0.5 VBAT + 0.5 V
RF pin –0.5 2.1 V
Analog pins –0.5 2.1 V
Operating temperature, TA–40 85 °C
Storage temperature, Tstg –40 85 °C
Junction temperature, Tj (3) 120 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to VSS, unless otherwise noted.
(3) Junction temperature is for the CC3135RNMARGK device that is contained within the module.
8.2 ESD Ratings
VALUE UNIT
VESD
Electrostatic discharge (ESD)
performance
Human body model (HBM), per ANSI/ESDA/JEDEC JS001(1) ±2000
V
Charged device model (CDM),
per JESD22-C101(2) All pins ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
8.3 Recommended Operating Conditions
Function operation is not ensured outside this limit, and operation outside this limit for extended periods can adversely affect
long-term reliability of the module(1) (2) (3).
MIN TYP MAX UNIT
VBAT 2.3 3.3 3.6 V
Operating temperature –40 25 85 °C
Ambient thermal slew –20 20 °C/minute
(1) When operating at an ambient temperature of over 75°C, the transmit duty cycle must remain below 50% to avoid the auto-protect
feature of the power amplifier. If the auto-protect feature triggers, the device takes a maximum of 60 seconds to restart the
transmission.
(2) To ensure WLAN performance, ripple on the 2.3-V to 3.6-V supply must be less than ±300 mV.
(3) The minimum voltage specified includes the ripple on the supply voltage and all other transient dips. The brownout condition is 2.1 V,
and care must be taken when operating at the minimum specified voltage.
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8.4 Current Consumption Summary: 2.4 GHz RF Band
TA = 25°C, VBAT = 3.6 V
PARAMETER TEST CONDITIONS(1) (2) MIN TYP MAX UNIT
TX
1 DSSS TX power level = 0 272
mA
TX power level = 4 188
6 OFDM TX power level = 0 248
TX power level = 4 179
54 OFDM TX power level = 0 223
TX power level = 4 160
RX(3) 1 DSSS 53 mA
54 OFDM 53
Idle connected(4) 690 µA
LPDS 115 µA
Hibernate 5.5 µA
Shutdown 1 µA
Peak calibration current(5) (3)
VBAT = 3.6 V 420
mAVBAT = 3.3 V 450
VBAT = 2.3 V 610
(1) TX power level = 0 implies maximum power (see Figure 8-1, Figure 8-2, and Figure 8-3). TX power level = 4 implies output power
backed off approximately 4 dB.
(2) The CC3135MOD system is a constant power-source system. The active current numbers scale based on the VBAT voltage supplied.
(3) The RX current is measured with a 1-Mbps throughput rate.
(4) DTIM = 1
(5) The complete calibration can take up to 17 mJ of energy from the battery over a time of 24 ms. In default mode, calibration is
performed sparingly, and typically occurs when re-enabling the NWP and when the temperature has changed by more than 20°C.
There are two additional calibration modes that may be used to reduced or completely eliminate the calibration event. For further
details, see CC31XX CC32XX SimpleLink™ Wi-Fi® and IoT Network Processor Programmer's Guide.
8.5 Current Consumption Summary: 5 GHz RF Band
TA = 25°C, VBAT = 3.6 V
PARAMETER TEST CONDITIONS(1) (2) MIN TYP MAX UNIT
TX 6 OFDM 318 mA
54 OFDM 293
RX(3) 54 OFDM 61 mA
Idle connected(4) 690 µA
LPDS 115 µA
Hibernate 5.5 µA
Shutdown 1 µA
Peak calibration current(5) (3)
VBAT = 3.6 V 290
mA
VBAT = 3.3 V 310
VBAT = 2.7 V 310
VBAT = 2.3 V 365
(1) TX power level = 0 implies maximum power (see Figure 8-1, Figure 8-2, and Figure 8-3). TX power level = 4 implies output power
backed off approximately 4 dB.
(2) The CC3135MOD system is a constant power-source system. The active current numbers scale based on the VBAT voltage supplied.
(3) The RX current is measured with a 1-Mbps throughput rate.
(4) DTIM = 1
(5) The complete calibration can take up to 17 mJ of energy from the battery over a time of 24 ms. In default mode, calibration is
performed sparingly, and typically occurs when re-enabling the NWP and when the temperature has changed by more than 20°C.
There are two additional calibration modes that may be used to reduced or completely eliminate the calibration event. For further
details, see CC31XX, CC32XX SimpleLink™ Wi-Fi® and IoT Network Processor Programmer's Guide.
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8.6 TX Power Control for 2.4 GHz Band
The CC3135MOD has several options for modifying the output power of the device when required. For the 2.4
GHz band it is possible to lower the overall output power at a global level using the global TX power level setting.
In addition, the 2.4 GHz band allows the user to enter additional back-offs 1, per channel, region 2and modulation
rates 3 4, via Image creator (see the UniFlash CC31xx, CC32xx SimpleLink™ Wi-Fi® and Internet-on-a chip™
Solution ImageCreator and Programming Tool User's Guide for more details).
Figure 8-1, Figure 8-2, and Figure 8-3 show TX Power and IBAT versus TX power level settings for modulations
of 1 DSSS, 6 OFDM, and 54 OFDM, respectively.4
In Figure 8-1, the area enclosed in the circle represents a significant reduction in current during transition from
TX power level 3 to level 4. In the case of lower range requirements (14-dBm output power), TI recommends
using TX power level 4 to reduce the current.
Figure 8-1. TX Power and IBAT vs TX Power Level Settings (1 DSSS)
1The back-off range is between -6 dB to +6 dB in 0.25 dB increments.
2FCC, IC/ISED, ETSI/CE (Europe), and MIC (Japan) are supported.
3Back-off rates are grouped into 11b rates, high modulation rates (MCS7, 54 OFDM and 48 OFDM), and lower modulation rates (all
other rates).
4Please note that there will be a delta between the CC3235MODx module and CC3235x IC's TX power levels.
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Figure 8-2. TX Power and IBAT vs TX Power Level Settings (6 OFDM)
Figure 8-3. TX Power and IBAT vs TX Power Level Settings (54 OFDM)
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