Ublox NINA-W1 Series Quick setup guide

UBX-17005730 - R15
C1 - Public www.u-blox.com
NINA-W1 series
Stand-alone Wi-Fi and multiradio modules
System integration manual

Abstract
This document describes the system integration of NINA-W1 series stand-
alone modules, which
includes the NINA-W13 (Wi-Fi) and NINA-W10 and NINA-W15 series (multiradio) modules. These
modules feature a number of useful embedded security features, including secure boot that ensures
that only authenticated software can run on the module. NINA-W1 modules are
ideal for critical IoT
applications where security is important. The modules connect to a host system u
sing UART,
high-speed RMII, or GPIO interfaces.

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Document information
Title NINA-W1 series
Subtitle Stand-alone Wi-Fi and multiradio modules
Document type System integration manual
Document number UBX-17005730
Revision and date R15 27-Oct-2021
Disclosure Restriction C1 - Public
Document status descriptions
Draft For functional testing. Revised and supplementary data will be published later.
Objective Specification Target values. Revised and supplementary data will be published later.
Advance Information Data based on early testing. Revised and supplementary data will be published later.
Early Production Information Data from product verification. Revised and supplementary data may be published later.
Production Information Document contains the final product specification.
This document applies to the following products:
Product name Document status
NINA-W101 Early Production Information
NINA-W102 Early Production Information
NINA-W106 Early Production Information
NINA-W131 Early Production Information
NINA-W132 Early Production Information
NINA-W151 Early Production Information
NINA-W152 Early Production Information
NINA-W156 Early Production Information
☞For information about the hardware, software, and current status of the available product types,
see the NINA-W10, NINA-W13 and NINA-W15 data sheets [3], [2] and [4].
u-blox or third parties may hold intellectual property rights in the products, names, logos and designs included in this
document. Copying, reproduction, modification or disclosure to third parties of this document or any part thereof is only
permitted with the
express written permission of u-blox.
The information contained herein is provided “as is” and u
-blox assumes no liability for its use. No warranty, either express or
implied, is given, including but not limited
to, with respect to the accuracy, correctness, reliability and fitness for a particular
purpose of the information. This document may be revised by u
-blox at any time without notice. For the most recent
documents, visit www.u
-blox.com.
Copyright © u
-blox AG.

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Contents
Document information .............................................................................................................................2
Contents .......................................................................................................................................................3
System description ............................................................................................................................5
1.1 Overview........................................................................................................................................................5
1.2 Architecture .................................................................................................................................................6
1.2.1 Block diagrams....................................................................................................................................6
1.3 CPU.................................................................................................................................................................7
1.4 Operating modes.........................................................................................................................................7
1.4.1 Power modes .......................................................................................................................................7
1.4.2 Low power modes with LPO..............................................................................................................8
1.5 Supply interfaces ........................................................................................................................................9
1.5.1 Module supply design (VCC).............................................................................................................9
1.5.2 Digital I/O interfaces reference voltage (VCC_IO)........................................................................9
1.5.3 VCC application circuits ....................................................................................................................9
1.6 System function interfaces ....................................................................................................................10
1.6.1 Boot strapping pins..........................................................................................................................10
1.7 Data interfaces..........................................................................................................................................10
1.7.1 Universal asynchronous serial interface (UART) .......................................................................10
1.7.2 Ethernet (RMII+SMI) ........................................................................................................................11
1.7.3 Serial peripheral interface (SPI).....................................................................................................13
1.8 Antenna interfaces...................................................................................................................................13
1.8.1 Antenna pin – NINA-W1x1 ..............................................................................................................13
1.8.2 NINA-W1x2 and W1x6 integrated antennas..............................................................................14
1.9 Reserved pins (RSVD) ..............................................................................................................................14
1.10GND pins .....................................................................................................................................................14
Software ............................................................................................................................................. 15
2.1 NINA-W13 and NINA-W15 u-connectXpress software ....................................................................15
2.2 s-center evaluation software..................................................................................................................16
2.3 SDK for open-CPU modules ....................................................................................................................16
2.4 Updating NINA-W13 and NINA-W15....................................................................................................16
2.4.1 Updating over UART ........................................................................................................................17
2.5 Developing and flashing NINA-W10 open-CPU software .................................................................21
2.5.1 Set up Toolchain and ESP-IDF v4 source files ............................................................................22
2.5.2 Setup path to ESP-IDF.....................................................................................................................22
2.5.3 Build and flash ...................................................................................................................................23
2.5.4 ESP-IDF Partition table....................................................................................................................24
2.5.5 Automatic bootloader on NINA-W10 EVK...................................................................................24
2.6 Arduino support for NINA-W10..............................................................................................................24
2.6.1 Downloading the Arduino IDE.........................................................................................................24
2.6.2 Downloading from the GIT repository...........................................................................................25
2.6.3 Downloading the toolchain .............................................................................................................26
2.7 Output power configuration ...................................................................................................................29

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2.7.1 NINA-W10 series ..............................................................................................................................29
2.7.2 NINA-W13/W15 series ....................................................................................................................29
2.8 NINA-W10 OTP and production information ......................................................................................29
Design-in............................................................................................................................................. 30
3.1 Overview......................................................................................................................................................30
3.2 Supply interfaces ......................................................................................................................................30
3.2.1 Module supply (VCC) design...........................................................................................................30
3.2.2 Digital I/O interfaces reference voltage (VCC_IO)......................................................................31
3.3 Antenna interface.....................................................................................................................................31
3.3.1 RF transmission line design (NINA-W1x1)..................................................................................31
3.3.2 Antenna design (NINA-W1x1)........................................................................................................33
3.3.3 On-board antenna design ...............................................................................................................36
3.4 Data communication interfaces ............................................................................................................38
3.4.1 Asynchronous serial interface (UART) design............................................................................38
3.4.2 Ethernet (RMII+SMI) ........................................................................................................................38
3.5 General high-speed layout guidelines...................................................................................................38
3.5.1 General considerations for schematic design and PCB floor-planning.................................39
3.5.2 Module placement ............................................................................................................................39
3.5.3 Layout and manufacturing.............................................................................................................39
3.6 Module footprint and paste mask .........................................................................................................39
3.7 Thermal guidelines ...................................................................................................................................40
3.8 ESD guidelines ...........................................................................................................................................40
Handling and soldering................................................................................................................... 42
4.1 ESD handling precautions.......................................................................................................................42
4.2 Packaging, shipping, storage, and moisture preconditioning .........................................................42
4.3 Reflow soldering process.........................................................................................................................43
4.3.1 Cleaning ..............................................................................................................................................44
4.3.2 Other remarks ...................................................................................................................................44
Approvals............................................................................................................................................ 45
5.1 General requirements ..............................................................................................................................45
5.2 FCC/IC End-product regulatory compliance........................................................................................45
5.2.1 NINA-W101 and NINA-W102 FCC ID and IC certification number ........................................45
5.2.2 NINA-W13/W15 series FCC ID and IC certification number....................................................45
5.2.3 Antenna requirements ....................................................................................................................46
Product testing................................................................................................................................. 47
6.1 u-blox in-line production test..................................................................................................................47
6.2 OEM manufacturer production test .....................................................................................................48
6.2.1 “Go/No go” tests for integrated devices ......................................................................................48
Appendix .................................................................................................................................................... 49
AGlossary .............................................................................................................................................. 49
Related documents ................................................................................................................................ 51
Revision history ....................................................................................................................................... 52
Contact....................................................................................................................................................... 54

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System description
1.1 Overview
The NINA-W1 series of wireless and multiradio MCU IoT is suitable for industrial markets where
security is important. NINA-W1 includes the following stand-alone modules:
Model Description
NINA-W13 series
Wireless MCU modules integrate a powerful microcontroller (MCU) and a Wi-Fi
radio for wireless
communication. NINA-W13x modules come with pre-flashed application software and
support
802.11b/g/n in the 2.4 GHz ISM band. Host systems set up and control the modules through an
AT
command interface to reduce the time and complexity of including Wi-Fi connectivity
into your application
designs. NINA-W13x modules offer top-grade security with secure boot
functionality that ensures that
applications start only with the original u-blox software, u-connectXpress.
NINA-W10 series Multiradio MCU modules
integrate a powerful microcontroller (MCU) and radio for wireless
communication. With open CPU architecture, NINA-W10 series modules are ideal for
advanced
applications that run on dual core 32-bit MCUs. The radio provides support for Wi-
Fi 802.11b/g/n in the
2.4 GHz ISM band, Bluetooth BR/EDR, and Bluetooth low energy communication. Leveraging
integrated
cryptographic hardware accelerators, NINA-W10 series modules offer top-grade security capable
of
secure boot.
NINA-W15 series NINA-W15x modules have similar performance as NINA-W10x modules but come with pre-
flashed
application software. Serving as a multiradio gateway, these modules provide support for Wi-
Fi
802.11b/g/n and dual-mode Bluetooth (Bluetooth BR/EDR low energy v4.2). Host systems
set up and
control the modules through an AT command interface to reduce the time and complexity
of including
Wi-Fi connectivity into your application designs. NINA-W15x series modules offer top-grade security
with
secure boot functionality that ensures that applications start only with the original u-blox software
,
u-connectXpress.
The modules are qualified for professional grade and support an extended temperature range of 40 °C
to +85 °C.

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1.2 Architecture
1.2.1 Block diagrams
Figure 1: NINA-W13 series block diagram
* Only on NINA-W101 and NINA-W102.
** 16 Mbit NINA-W101 and NINA-W102; 32 Mbit NINA-W106-00B; 64Mbit NINA-W106-10B
Figure 2: NINA-W10 series block diagram
(NINA-
W131)
Flash (16 Mbit)
Linear voltage regulators
RF
ROM
Wi-Fi
baseband
IO buffers
2xXtensa 32-bit LX6 MCU
SRAM (4Mbit)
Cryptographic
hardware
accelerations
PIFA antenna
(NINA-W132)
PLL
Quad SPI
VCC_IO
VCC (3.0
-3.6 V)
40 MHz
Reset
UART
RMII
EFUSE
GPIO
BPF
ANT
SPI
Flash (16/32/64 Mbit)**
Linear voltage regulators
RF
ROM
Wi-Fi
baseband
Bluetooth
Baseband
IO buffers
2xXtensa 32-bit LX6 MCU
SRAM
(4Mbit)
Cryptographic
hardware
accelerators
PIFA antenna
(NINA-W102)
PLL
Quad SPI
VCC_IO
VCC (3.0–3.6 V)
40 MHz
Reset
ANT (NINA-W101)
UART
RMII
I2C
SPI
SDIO
Quad SPI
JTAG
GPIO
ADC/DAC
EFUSE
CAN
BPF*
LPO
(NINA-W106)
PCB trace antenna

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* Only on NINA-W152 and NINA-W152
** Only on NINA-W156. Support in u-connectXpress – pending implementation
Figure 3: NINA-W15 series block diagram
1.3 CPU
NINA-W1 series modules use a dual-core system that includes two Harvard Architecture Xtensa LX6
CPUs with maximum 240 MHz internal clock frequency. The internal memory of NINA-W1 supports:
•448 kB ROM for booting and core functions
•520 kB SRAM for data and instruction
•16 or 32 Mbit FLASH memory for code storage, including hardware encryption to protect programs
and data.
•1 kbit EFUSE (non- erasable memory) for MAC addresses, module configuration, flash-encryption,
and Chip-ID.
Open CPU variants (NINA-W10) also support external FLASH and SRAM memory through a Quad SPI
interface.
1.4 Operating modes
1.4.1 Power modes
NINA-W1 series modules are power efficient devices capable of operating in different power saving
modes and configurations. Different sections of the modules can be powered off when they are not
needed, and complex wake up events can be generated from different external and internal inputs.
For details on the available power modes, see the data sheet for the corresponding module [2][3][4].
Flash (16 Mbit)
Linear voltage regulators
RF
ROM
Wi-Fi
baseband
IO buffers
2xXtensa 32-bit LX6 MCU
SRAM (4Mbit)
Cryptographic
hardware
accelerations
PIFA antenna
(NINA-W152)
PLL
Quad SPI
VCC_IO
VCC (3.0
-3.6 V)
40 MHz
Reset
UART
RMII
EFUSE
GPIO
BPF*
(NINA-W15
1)
ANT
Wi-Fi
baseband
(NINA-W156)
PCB trace antenna
SPI
LPO*
*

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1.4.2 Low power modes with LPO
An external 32.768 kHz LPO (Low Power Oscillator) signal is required for NINA-W10 series modules to
enable the lowest possible power consumption, frequency stability, and RTC accuracy in the various
ESP32 sleep and hibernate modes.
☞Support for LPO in u-connectXpress is pending implementation.
On NINA-W106 series modules, the LPO can be implemented using an external oscillator. The
oscillator must be connected to the LPO_IN signal on pin 5. Also, a > 200 nF capacitor must be placed
between pin 7 and ground. The amplitude range is 0.6 V < Vpp < VCC. If the input signal is square
wave, the bottom voltage should be higher than 200 mV.
☞Pin 7cannot be used as GPIO when LPO is used on NINA-W106 series modules.
For more information on the LPO, see the Espressif ESP32 datasheet [12], Espressif ESP32 Technical
reference manual [13], and Espressif ESP32 Hardware design guidelines [14].
☞On NINA-W101 and NINA-W102, the functions of pin 5and pin 7are reversed.
It is possible to wake-up the module using several methods, out of which “wake-up on external GPIO”
requires attention.
On NINA-W10 series modules, isolate the ESP32 GPIO pin 12 using rtc_gpio_isolate() to avoid
current leakage prior to the invocation of esp_deep_sleep_start():
void cbPWR_MGR_enterDeepSleep()
{
rtc_gpio_isolate(GPIO_NUM_12);
esp_deep_sleep_start();
}
The rtc_gpio_isolate() function disables input, output, pullup, pulldown, and enables the hold
feature for an RTC I/O pin. Use this function if any other RTC I/O pin also needs to be disconnected
from ESP32-internal circuits in deep sleep and hibernation modes. Disconnecting minimizes leakage
currents. The use of this function is typically necessary when an external pull-up or pull-down is used
on a pin that also contains a pull-up or pull-down.
In other cases, it might be possible to manually use the internal pull-ups and pull-downs of the ESP32
using the specific enable/disable functions, followed by rtc_gpio_hold_en().
void cbPWR_MGR_enterDeepSleep()
{
rtc_gpio_set_direction(EXT_WAKEUP_1_GPIO, RTC_GPIO_MODE_INPUT_ONLY);
rtc_gpio_pullup_dis(EXT_WAKEUP_1_GPIO);
rtc_gpio_pulldown_en(EXT_WAKEUP_1_GPIO);
rtc_gpio_hold_en(EXT_WAKEUP_1_GPIO);
esp_deep_sleep_start();
}
The rtc_gpio_hold_en()preserves the last known value during deep sleep and hibernate modes.
See the Espressif ESP32 data sheet [12] for more information about ESP32-internal circuits and
external GPIOs capable of waking up the module.
The power consumption in the various sleep modes is affected by the RTC clock source. Define the
appropriate RTC clock source, used during the sleep modes, by setting the CONFIG_ESP32_RTC_CLK_SRC
configuration option accordingly.

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When using an LPO, also enable boot-time calibration by setting CONFIG_ESP32_RTC_CLK_CAL_CYCLES
to at least 3000. The higher the number, the better accuracy, on the expense of boot time.
Frequency stability and system time accuracy is decreased when using sleep modes. To increase
accuracy, use an LPO and enable both high-resolution and RTC timers by setting
CONFIG_ESP32_TIME_SYSCALL accordingly.
If the ULP (ultra-low-power) co-processor is not required, the ULP functionality can be disabled by
unsetting the CONFIG_ESP32_ULP_COPROC_ENABLED option.
If the LPO detection fails, increase the CONFIG_ESP32_RTC_XTAL_CAL_RETRY option.
If “flash read err, 1000” messages are printed to the console after deep sleep reset, increase the
CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY value from its default 2000 µs.
See the Espressif ESP32 SDK [8] for more information on how these, and additional configuration
options and API functions, affect power consumption, frequency stability, and boot-time behavior.
1.5 Supply interfaces
1.5.1 Module supply design (VCC)
NINA-W1 series modules include an integrated Linear Voltage converter that transforms the supply
voltage. The output of the converter, presented at the VCC pin, provides a stable system voltage.
1.5.2 Digital I/O interfaces reference voltage (VCC_IO)
NINA-W1 series modules include an additional voltage supply input for setting the I/O voltage level.
A separate VCC_IO pin enables module integration in many applications with different voltage supply
levels (1.8 V or 3.3 V for example) without level converters. NINA-W1 series modules currently support
3.3 V IO levels only.
1.5.3 VCC application circuits
The power for NINA-W1 series modules is applied through the VCC pins. These supplies are taken
from either of the following sources:
•Switching Mode Power Supply (SMPS)
•Low Drop Out (LDO) regulator
An SMPS is the ideal design choice when the available primary supply source is of a higher value than
the operating supply voltage of the module. This offers the best power efficiency for the application
design and minimizes the amount of current drawn from the main supply source.
⚠When taking VCC supplies from an SMPS make sure that the AC ripple voltage is kept as low as
possible at the switching frequency. Design layouts should focus on minimizing the impact of any
high-frequency ringing.
Use an LDO linear regulator for primary VCC supplies that have a relatively low voltage. As LDO linear
regulators dissipate a considerable amount of energy, LDOs are not recommended for the step down
of high voltages.
DC/DC efficiency should be regarded as a trade-off between the active and idle duty cycles of an
application. Although some DC/DC devices achieve high efficiency at light loads, these efficiencies
typically degrade as soon as the idle current drops below a few milliamps. This can have a negative
impact on the life of the battery.

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If decoupling capacitors are needed on the supply rails, it is best practice to position these as close as
possible to the NINA-W1 series module. The power routing of some host system designs makes
decoupling capacitance unnecessary.
For electrical specifications, refer to the appropriate NINA-W1 series data sheet [2] [3] [4].
1.6 System function interfaces
1.6.1 Boot strapping pins
There are several boot configuration pins available on the module that must be set correctly during
boot, or the module may not boot properly. Table 1 shows the condition of the bootstrap signals that
determine the behavior of the module during the system startup.
☞Boot strap pins are configured to the default state internally on the module and must NOT be
configured externally, unless otherwise stated.
Pin State during boot Default Behavior Description
27 0 ESP boot mode (factory boot) ESP Factory boot
Mode/RMII clock line.
1 Pull-up Normal Boot from internal Flash
32 0 Silent Printout on UART0 TXD
during boot
1 Pull-up UART0 TXD Toggling
36 0 VDD_SDIO=3.3V (Not allowed) Internal flash voltage
1 10 kΩpull-up VDD_SDIO=1.8V
(VDD_SDIO should always be at 1.8 V)
Table 1: NINA-W1 series boot strapping pins
☞Additional requirements apply to pin 27, depending on the intended use-case for the module:
oOn NINA-W13/W15 modules, pin 27 must be in default state during the boot.
oCare must be taken if an RMII interface is to be included in the application design. As pin 27
connect to the RMII, it is important that the pin is in the correct state during the module boot
and before the RMII interface turns on. See also RMII Startup precautions.
oOn NINA-W10 modules, pin 27 is used to enter the ESP bootloader. Consequently, this pin
must be exposed on a pin header (or similar) to flash the module.
☞During boot, pin 32 controls if additional system information should be transmitted on the UART
interface during startup. After the system has booted, it is reconfigured to SPI_CS,the SPI chip
select signal.
☞During boot, pin 36 controls the voltage level of the internal flash during startup. After the system
has booted, it is reconfigured to SPI_MISO, the SPI slave data output signal. It must NOT be pulled
down by an external MCU or circuitry.
For the timing and algorithm for the detection of the SPI and RMII interfaces, see also the “Data and
command interfaces” section in the NINA-W13 and NINA-W15 data sheets [2] [4].
1.7 Data interfaces
1.7.1 Universal asynchronous serial interface (UART)
For data communication and firmware upgrade purposes, NINA-W1 series modules support an
interface comprised of three UARTs. Each UART supports the following signals:
•Data lines (RXD as input, TXD as output)
•Hardware flow control lines (CTS as input, RTS as output)
•DSR and DTS set and indicate the system modes