2-1
SECTION II CHANNEL SELECTION CIRCUIT
1. OUTLINE OF CHANNEL SELECTION
SYSTEM
ThechannelselectioncircuitintheN5MM1chassisemploys
abussystemwhichperformsacentralcontrolbyconnecting
a channel selection microcomputer to a control IC in each
circuit block through control lines called a bus.
InthebussystemwhichcontrolseachIC,theI2C-bussystem
(two line bus system) promoted by Philips Co., Ltd. in the
Netherlands has been employed.
TheICscontrolledbytheI2C-buscontrolsystemare:ICG01
for audio system process, ICA02 for non-volatile memory,
H001 for main U/V tuners, IC302 for deflection distortion
corrections.
2. OPERATION OF THE CHANNEL
SELECTION CIRCUIT
2-1 Channel Selection Control Microcomputer
(ICA01 Toshiba TMP87CM34N-3101)
8 bit microcomputer, TLCS-870 series for TV receivers,
TMP87CM34N(42pins,built-inCCD)developedbyToshiba
is employed. With this microcomputer each IC and circuit
shown below are controlled.
2-1-1 Non-volatile Memory IC
(ICA02 NEC µPD672CX)
(1) Memorizes data for video and audio signal adjustment
values,soundvolume,wooferadjustmentvalue,external
input status, etc.
(2) Memorizesadjustmentdataforwhitebalance(RGBcut
off, GB drive), sub-brightness, sub color, sub-tint, etc.
(3) Memorizes deflection distortion correction value data
adjusted for each unit.
2-1-2 U/V Tuner Unit
(H001 Toshiba EL911L)
(1) A desired station can be received by transferring a
channel selection frequency data (division data) to the
I2C-bus type frequency synthesizer provided in the
tunerandbysettingabandswitchdatawhichselectsthe
UHF or VHF band.
2-1-3 Deflection Distortion Correction IC
(IC302 Toshiba TA8859AP)
(1) Sets adjustment memory values for vertical amplitude,
linearity,horizontalamplitude,parabola,corner,pedestal
distortion, etc.
2-1-4 Audio System Process IC
(ICG01, SONY CXA1784S)