Trenton T4G Use and care manual

T4G
6130-xxx
No. 87-006133-000 Revision A
TECHNICAL REFERENCE
Pentium®4
or
Celeron®
PROCESSOR-BASED
SBC

WARRANTY The product is warranted against material and manufacturing defects for two years from
date of delivery. Buyer agrees that if this product proves defective Trenton Technology
Inc. is only obligated to repair, replace or refund the purchase price of this product at
Trenton Technology’s discretion. The warranty is void if the product has been subjected
to alteration, neglect, misuse or abuse; if any repairs have been attempted by anyone
other than Trenton Technology Inc.; or if failure is caused by accident, acts of God, or
other causes beyond the control of Trenton Technology Inc. Trenton Technology Inc.
reserves the right to make changes or improvements in any product without incurring any
obligation to similarly alter products previously purchased.
In no event shall Trenton Technology Inc. be liable for any defect in hardware or
software or loss or inadequacy of data of any kind, or for any direct, indirect, incidental
or consequential damages arising out of or in connection with the performance or use of
the product or information provided. Trenton Technology Inc.’s liability shall in no
event exceed the purchase price of the product purchased hereunder. The foregoing
limitation of liability shall be equally applicable to any service provided by Trenton
Technology Inc.
RETURN POLICY Products returned for repair must be accompanied by a Return Material Authorization
(RMA) number, obtained from Trenton Technology prior to return. Freight on all
returned items must be prepaid by the customer, and the customer is responsible for any
loss or damage caused by common carrier in transit. Items will be returned from Trenton
Technology via Ground, unless prior arrangements are made by the customer for an alter-
native shipping method
To obtain an RMA number, call us at [phone] or [phone]. We will need
the following information:
Return company address and contact
Model name and model # from the label on the back of the board
Serial number from the label on the back of the board
Description of the failure
An RMA number will be issued. Mark the RMA number clearly on the outside of each
box, include a failure report for each board and return the product(s) to our Utica, NY
facility:
TRENTON Technology Inc.
1001 Broad Street
Utica, NY 13501
Attn: Repair Department

TRADEMARKS IBM, PC, VGA, EGA, OS/2 and PS/2 are trademarks or registered
trademarks of International Business Machines Corp.
AMI, AMIBIOS and AMIBIOS8 are trademarks or registered trademarks of American
Megatrends Inc.
Intel and Pentium are registered trademarks of Intel Corporation.
MS-DOS and Microsoft are registered trademarks of Microsoft Corp.
PICMG and the PICMG logo are registered trademarks of the PCI
Industrial Computer Manufacturers Group.
All other brand and product names may be trademarks or registered
trademarks of their respective companies.
LIABILITY
DISCLAIMER This manual is as complete and factual as possible at the time of printing; however, the
information in this manual may have been updated since that time. Trenton Technology
Inc. reserves the right to change the functions, features or specifications of their products
at any time, without notice.
Copyright ©2003 by Trenton Technology Inc. All rights reserved.
E-mail: [e-mail]
Web: www.TrentonTechnology.com
TRENTON Technology Inc.
2350 Centennial Drive •Gainesville, Georgia 30504
Sales: [phone] •Phone: [phone] •Fax: [phone]

T4G Technical Reference
TRENTON Technology Inc. i
Table of Contents
Before You Begin
Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1
Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1
SBC Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-3
SBC Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-4
Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-5
Bus Interfaces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-5
Data Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-5
Bus Speed - ISA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-5
Bus Speed - PCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-5
Bus Speed - System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-5
Memory Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-5
System Bus. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-5
DMA Channels. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-5
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-5
BIOS (Flash). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-5
Cache Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-5
NetBurst Micro-Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-6
DDR Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-6
PCI Local Bus Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-7
Universal Serial Bus (USB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-7
Video Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-7
System Hardware Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-8
PCI Ethernet Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-8
Hub Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9
PCI Enhanced IDE Interfaces (Dual). . . . . . . . . . . . . . . . . . . . . . . .1-9
Floppy Drive Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9
Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9
Enhanced Parallel Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9
PS/2 Mouse Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9
Keyboard Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9
Watchdog Timer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9
Thermal Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-10
Power Fail Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-11
Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-11

T4G Technical Reference
TRENTON Technology Inc.ii
Table of Contents
Specifications (continued)
Power Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-11
Temperature/Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-12
Mean Time Between Failures (MTBF) . . . . . . . . . . . . . . . . . . . . .1-12
UL Recognition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-12
Configuration Jumpers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-13
Ethernet LEDs and Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . .1-14
System BIOS Setup Utility. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-15
Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-16
ISA/PCI Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1
ISA Bus Pin Numbering. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1
ISA Bus Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2
ISA Bus Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-3
I/O Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-7
Interrupt Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-7
PCI Local Bus Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-8
PCI Local Bus Signal Definition . . . . . . . . . . . . . . . . . . . . . . . . . . .2-9
PCI Local Bus Pin Numbering. . . . . . . . . . . . . . . . . . . . . . . . . . . .2-10
PCI Local Bus Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . .2-11
PCI Local Bus Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . .2-14
PICMG Edge Connector Pin Assignments . . . . . . . . . . . . . . . . . .2-18
System BIOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1
BIOS Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1
Password Entry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-2
BIOS Errors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-3
Running AMIBIOS Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-5
BIOS Setup Utility Main Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-6
BIOS Setup Utility Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-7
Security Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-11
Change Supervisor Password . . . . . . . . . . . . . . . . . . . . . . . . . .3-11
Disabling Supervisor Password. . . . . . . . . . . . . . . . . . . . . . . . .3-14
Change User Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-14
Clear User Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-14
Boot Sector Virus Protection. . . . . . . . . . . . . . . . . . . . . . . . . . .3-14
Exit Menu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-17

T4G Technical Reference
TRENTON Technology Inc. iii
Table of Contents
Advanced Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1
CPU Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-5
IDE Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-7
IDE Device Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-11
Floppy Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-15
SuperIO Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-17
DMI Event Logging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-21
Remote Access Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-23
USB Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-25
PCI Plug and Play Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1
Chipset Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-1
Intel Brookdale-G NorthBridge Configuration . . . . . . . . . . . . . . . .6-3
Intel ICH4 SouthBridge Configuration . . . . . . . . . . . . . . . . . . . . . .6-5
Boot Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-1
Boot Settings Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-5
Boot Device Priority. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-9
Hard Disk Drives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-11
Removable Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-13
ATAPI CDROM Drives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-15
Appendix A - BIOS Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1
BIOS Beep Codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1
BIOS Error Messages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2
Bootblock Initialization Code Checkpoints . . . . . . . . . . . . . . . . . . A-6
Bootblock Recovery Code Checkpoints. . . . . . . . . . . . . . . . . . . . . A-7
Post Code Checkpoints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-8
DIM Code Checkpoints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-10
Additional Checkpoints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-11

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TRENTON Technology Inc.iv
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Copyright 2003 by Trenton Technology Inc. All rights reserved.

T4G Technical Reference
TRENTON Technology Inc. v
HANDLING
PRECAUTIONS _______________________________________________________________________
WARNING: This product has components which may be damaged by electrostatic
discharge.
_______________________________________________________________________
To protect your single board computer (SBC) from electrostatic damage, be sure to
observe the following precautions when handling or storing the board:
•Keep the SBC in its static-shielded bag until you are ready to perform your
installation.
•Handle the SBC by its edges.
•Do not touch the I/O connector pins. Do not apply pressure or attach labels
to the SBC.
•Use a grounded wrist strap at your workstation or ground yourself
frequently by touching the metal chassis of the system before handling any
components. The system must be plugged into an outlet that is connected to
an earth ground.
•Use antistatic padding on all work surfaces.
•Avoid static-inducing carpeted areas.
SOLDER-SIDE
COMPONENTS This SBC has components on both sides of the PCB. It is important for you to observe
the following precautions when handling or storing the board to prevent solder-side
components from being damaged or broken off:
•Handle the board only by its edges.
•Store the board in padded shipping material or in an anti-static board rack.
•Do not place an unprotected board on a flat surface.

T4G Technical Reference
TRENTON Technology Inc.vi
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Before You BeginT4G Technical Reference
TRENTON Technology Inc. 87-006133-001; 03213
Before you Begin
INTRODUCTION It is important to be aware of the system considerations listed below before installing
your T4G SBC. Overall system performance may be affected by incorrect usage of these
features.
DDR MEMORY The T4G requires that memory modules be non-ECC, unbuffered, non-stacked DIMMs.
Memory modules can be installed in one or both DIMM sockets. If only one DIMM
module is used, it should be populated in the top DIMM socket (Bank 2 - BK2). If two
modules of different speeds are used, the 845GV chipset sets the memory interface speed
to the speed of the slower DIMM module. Registered DIMMs are not supported. All
memory modules must have gold contacts.
In addition, the DIMMs must have the following features:
•184-pin with gold-plated contacts
•Non-ECC (64-bit) DDR memory
•Unbuffered configuration
•x8, x16 construction
•Non-stacked (NS)
______________________________________________________________________
NOTE: Intel’s DDR memory interface design guidelines for the 845GV chipset validate
the use of non-stacked DIMM modules. Therefore, the T4G, which uses the 845GV
chipset, supports only non-stacked DIMMs in its standard system BIOS.
______________________________________________________________________
POWER
REQUIREMENTS The following are typical values:
Processor
Speed +5V * +12V ** +3.3V * -12V *
Pentium®4/533MHz FSB:
2.8GHz
2.4GHz 3.01 Amps 2.95 Amps 4.65 Amps 3.90 Amps 2.01 Amps 1.99 Amps < 100 mAmps < 100 mAmps
Pentium 4/400MHz FSB:
2.6GHz
2.0GHz 2.95 Amps 2.95 Amps 4.38 Amps 3.28 Amps 2.00 Amps 2.00Amps < 100 mAmps < 100 mAmps
Celeron®/400MHz FSB:
2.0GHz 2.85 Amps 3.45 Amps 1.98 Amps < 100 mAmps
* From backplane via PICMG connector.
** From ATX12V power supply or equivalent via P24 connector.

Before You Begin T4G Technical Reference
TRENTON Technology Inc.
______________________________________________________________________
NOTE: The T4G requires an additional on-board power connector due to the power
requirements of the Intel®Pentium®4 processor. This 4-pin connector (P24) requires
+12V from an external power supply that conforms to the ATX12V power specification.
The external power supply must have a wattage rating of 250W or higher. The T4G also
requires that +3.3V be applied to the backplane from the power supply.
______________________________________________________________________
FOR MORE
INFORMATION For more information on any of these features, refer to the appropriate sections of the
T4G Technical Reference Manual (#87-006133-000). The latest revision of this manual
may be found on Trenton’s website - www.TrentonTechnology.com.
Copyright 2003 by Trenton Technology Inc. All rights reserved.

SpecificationsT4G Technical Reference
TRENTON Technology Inc. 1-1
Chapter 1 Specifications
INTRODUCTION The T4G full-featured PCI/ISA processors are single board computers (SBCs) which
feature the Intel®Pentium®4 or Intel®Celeron®microprocessor, 400/533MHz system
bus, Intel integrated video interface, up to 2GB DDR memory, PCI Local Bus, cache
memory, floppy controller, dual EIDE (Ultra ATA/100) interfaces, 10/100Base-T
Ethernet interface, two serial ports, parallel port, speaker port, mouse port and keyboard
port on a single ISA-size card. These single-slot, high performance SBCs plug into
PICMG®PCI/ISA backplanes and provide full PC compatibility for the system
expansion slots.
MODELS
where xM indicates memory size (0M = 0MB memory,
8M =8MB memory, etc.)
FEATURES •Intel®Pentium®4 microprocessor
•2.8GHz, 2.66GHz, 2.53GHz, 2.4GHz or 2.26GHz with 512K cache and a
533MHz Front Side Bus (FSB)
•2.6GHz, 2.5GHz, 2.4GHz, 2.2GHz, 2.0GHz or 1.8GHz with 512K cache
and a 400MHz FSB
or Intel®Celeron®microprocessor
•2.2GHz, 2.1GHz, 2.0GHz or 1.8GHz with 128K cache and a 400MHz FSB
•Intel 845GV chipset with 400/533MHz system bus
•PCI Local Bus operating in 32-bit/33MHz mode
Model # Model Name Speed
Pentium 4 Processor - 533MHz FSB/512K cache:
6130-107-xM
6130-106-xM
6130-105-xM
6130-104-xM
6130-103-xM
T4G/2.8
T4G/2.66
T4G/2.53
T4G/2.4
T4G/2.26
2.8GHz
2.66GHz
2.53GHz
2.4GHz
2.26GHz
Pentium 4 Processor - 400MHz FSB/512K cache:
6130-006-xM
6130-005-xM
6130-004-xM
6130-003-xM
6130-002-xM
6130-001-xM
T4G/2.6
T4G/2.5
T4G/2.4A
T4G/2.2
T4G/2.0A
T4G/1.8A
2.6GHz
2.5GHz
2.4GHz
2.2GHz
2.0GHz
1.8GHz
Celeron Processor - 400MHz FSB/128K cache:
6130-504-xM
6130-503-xM
6130-502-xM
6130-501-xM
T4G/2.2C
T4G/2.1C
T4G/2.0C
T4G/1.8C
2.2GHz
2.1GHz
2.0GHz
1.8GHz

Specifications T4G Technical Reference
TRENTON Technology Inc.1-2
FEATURES
(CONTINUED)•Integrated on-board video interface provided by the Intel 845GV chipset
•PCI Local Bus supports off-board PCI option cards
•Compatible with PCI Industrial Computer Manufacturers Group (PICMG) 1.0
Specification
•Supports up to 2GB of Double Data Rate (DDR) on-board memory
•Floppy drive and dual PCI EIDE Ultra ATA/100 drive interfaces
•Two serial ports and one parallel port
•Dual Universal Serial Bus (USB 2.0) support
•Automatic or manual peripheral configuration
•Watchdog timer
•System hardware monitor
•Full PC compatibility

SpecificationsT4G Technical Reference
TRENTON Technology Inc. 1-3
SBC BLOCK
DIAGRAM

Specifications T4G Technical Reference
TRENTON Technology Inc.1-4
SBC BOARD
LAYOUT

SpecificationsT4G Technical Reference
TRENTON Technology Inc. 1-5
PROCESSOR •Intel®Pentium®4 microprocessor
•2.8GHz, 2.66GHz, 2.53GHz, 2.4GHz or 2.26GHz with 512K cache and a
533MHz Front Side Bus (FSB)
•2.6GHz, 2.5GHz, 2.4GHz, 2.2GHz, 2.0GHz or 1.8GHz with 512K cache
and a 400MHz FSB
or Intel®Celeron®microprocessor
•2.2GHz, 2.1GHz, 2.0GHz or 1.8GHz with 128K cache and a 400MHz FSB
•Processor uses the mPGA 478 packaging
BUS INTERFACES ISA and PCI Local Bus compatible
DATA PATH DDR Memory - 64-bit
ISA Bus - 16-bit
PCI Bus - 32-bit
Video - 32-bit
BUS SPEED - ISA 8.33MHz
BUS SPEED - PCI 33MHz
BUS SPEED -
SYSTEM 400/533MHz Front Side Bus
MEMORY
INTERFACE Double Data Rate (DDR) memory for 1600MB/s or 2100MB/s memory bandwidth
SYSTEM BUS The Intel 845GV chipset supports the system bus at 400MHz or 533MHz, which
provides a higher bandwidth path for transferring data between main memory/chipset
and the processor.
DMA CHANNELS The SBC is fully PC compatible with seven DMA channels, each supporting type F
transfers.
INTERRUPTS The SBC is fully PC compatible with interrupt steering for PCI plug and play compati-
bility.
BIOS (FLASH)The BIOS is an AMIBIOS8®with built-in advanced CMOS setup for system parameters,
peripheral management for configuring on-board peripherals, PCI-to-PCI bridge support
and PCI interrupt steering. The Flash BIOS resides in the Intel 82802 Firmware Hub
(FWH). The BIOS may be upgraded from floppy disk by pressing <Ctrl> + <Home>
immediately after reset or power-up with the floppy disk in drive A:. Custom BIOSs are
available.
CACHE MEMORY The Pentium 4 and Celeron processors include integrated on-die level two (L2) cache,
which implements the Advanced Transfer Cache architecture. The Pentium 4 has 512K

Specifications T4G Technical Reference
TRENTON Technology Inc.1-6
L2 cache; the Celeron has 128K L2 cache. The processors also includes a 12K level one
(L1) Execution Trace Cache and 8K L1 data cache. These cache arrays run at the full
speed of the processor core.
NETBURST™
MICRO-
ARCHITECTURE
NetBurst micro-architecture defines the techniques Intel uses to enhance the processor’s
execution of the BIOS, operating system and application software. These techniques
include hyper pipelined technology, a rapid execution engine, advanced dynamic
execution, enhanced floating point and multimedia unit and Streaming SIMD
Extensions 2 (SSE2). The processor’s system bus speed and memory cache are also part
of the NetBurst microarchitecture.
Hyper pipelined technology doubles the pipeline depth inside the processor, which
enables more instructions to be loaded, resulting in higher core frequencies. Advanced
dynamic execution includes an improved speculative execution algorithm that minimizes
processor instruction misdirects and results in faster instruction execution.
The rapid execution engine enables the two arithmetic logic units (ALUs) of the
processor to operate at twice the core frequency. Many integer instructions can now
execute in half the internal core clock period, resulting in improved software execution
speeds.
NetBurst micro-architecture improvements in the floating point and multimedia unit
include making the registers 128 bits wide and adding a separate register for moving
data.
The SSE2 has 144 instructions which improve performance in secure transactions and
multimedia processing. These instructions are used for double-precision floating point,
SIMD integer and memory management improvements.
DDR MEMORY The Double Data Rate (DDR) memory interface consists of a single channel which
terminates in two dual in-line memory module (DIMM) sockets and supports auto
detection of up to 2GB of memory. The System BIOS automatically detects memory
type, size and speed.
The SBC uses industry standard 64-bit wide gold finger PC1600 or PC2100 memory
modules in 184-pin DIMM sockets.
______________________________________________________________________
NOTE: Memory modules can be installed in one or both DIMM sockets. If only one
DIMM module is used, it should be populated in the top DIMM socket (Bank 2 - BK2).
If two modules of different speeds are used, the 845GV chipset sets the memory
interface speed to the speed of the slower DIMM module. Registered DIMMs are not
supported. All memory modules must have gold contacts.
______________________________________________________________________
The SBC supports DIMMs which are PC1600/PC2100 compliant and have the following
features:
•184-pin with gold-plated contacts
•Non-ECC (64-bit) DDR memory
•Unbuffered configuration

SpecificationsT4G Technical Reference
TRENTON Technology Inc. 1-7
•x8, x16 construction
•Non-stacked (NS)
______________________________________________________________________
NOTE: Intel’s DDR memory interface design guidelines for the 845GV chipset validate
the use of non-stacked DIMM modules. Therefore, the T4G, which uses the 845GV
chipset, supports only non-stacked DIMMs in its standard system BIOS.
______________________________________________________________________
The following DIMM sizes are supported:
PCI LOCAL BUS
INTERFACE The SBC is fully compliant with the PCI Local Bus 2.1 Specification. The PCI Local
Bus is 32 bits wide and runs at 33MHz. It interfaces to standard PCI option cards in the
backplane and to the on-board PCI-to-ISA bridge interface. The PCI Local Bus interface
to the backplane is compliant with the PCI Industrial Computer Manufacturers Group
(PICMG) 1.0 Specification.
UNIVERSAL SERIAL
BUS (USB) The SBC supports two high-speed USB 2.0 ports for data transfers up to 480Mbit/sec.
It also supports USB 1.1 devices for data transfers at 12 or 1.5Mbit/sec. The Universal
Serial Bus (USB) is an interface allowing for connectivity to many standard PC periph-
erals via an external port.
VIDEO INTERFACE The analog video interface of the 845GV supports pixel resolutions up to 2048 x 1536
(QXGA) at a refresh rate of 60Hz. The graphics and memory controller hub (GMCH) of
the 845GV has an integrated graphics accelerator that supports high performance 3D/2D
graphics and video.
The amount of system memory used for video is determined by the SBC’s BIOS and by
the 845GV’s Dynamic Video Memory Technology (DVMT) feature. In the BIOS, the
user can allocate up to 8MB of system memory to support video; DVMT can dynami-
cally allocate up to 64MB. DVMT memory allocations take the form of allocation
requests from the graphics driver to the operating system based on the needs of the
application software. DVMT returns the memory to the operating system when the
application no longer needs the additional video memory support. The specific amount
of system memory used by the chipset’s integrated video interface depends on the pixel
resolution, color depth setting and graphic demands of the application.
Software drivers for enhanced performance and resolution are available for most popular
operating systems.
DIMM
Size DIMM Type Non-ECC Component
Construction
64MB
128MB
256MB
512MB
1GB
Unbuffered
Unbuffered
Unbuffered
Unbuffered
Unbuffered
8M x 64
16M x 64
32M x 64
64M x 64
128M x 64
x8, x16, NS
x8, x16, NS
x8, x16, NS
x8, x16, NS
x8, x16, NS

Specifications T4G Technical Reference
TRENTON Technology Inc.1-8
SYSTEM
HARDWARE
MONITOR
The system hardware monitoring system monitors system voltages, temperature and fan
speeds.
The circuitry is based on Winbond’s W83783S hardware monitoring IC that is interfaced
via the system’s SMBus. System voltages of +12V, +5V, +3.3V, +2.5V, VCCORE
(processor voltage) and -12V are monitored. Each of these six voltages has program-
mable “high” and “low” watchdog limits. Also monitored are the processor die temper-
ature and the fan speed associated with the processor’s active heatsink thermal solution.
Programmable watchdog limits are also associated with fan speed RPMs. When any of
these programmed limits are exceeded, monitor software can be used to report the out-
of-limit condition.
The System Hardware Monitor connector (P18) provides an external interface for user
functionality. Pin assignments for this connector are as follows:
PCI ETHERNET
INTERFACE The PCI Ethernet interface is implemented using an Intel 82562ET 10/100Base-T
Ethernet controller which supports 10Base-T and 100Base-TX Fast Ethernet modes.
The interface is compliant with IEEE 802.3.
The main components of this interface are:
•Intel 82801DB for 10/100-Mb/s media access control (MAC), a serial ROM
port and a PCI Bus Master interface
Pin #/Definition Description
Pin 1 - GND System Ground
Pin 2 - GPO General Purpose Output
Active low open drain output. This multi-
function output is controlled by the W38383S’s
configuration register at offset 40(h) and the
control register at 4D(h). It can be used as a
general-purpose output or programmed to
provide a beep function that can be used as a
watchdog warning signal. This output is open
drain.
Pin 3 - CI Chassis Intrusion Input
Active low input from an external circuit, which
can be used to indicate a chassis intrusion event.
This input line is connected directly to the
ICH’s System Management Interface’s
INTRUDER# input. It can be set to disable the
system if the chassis is open or can be used as a
general-purpose input if intruder detection is
not used.
Pin 4 - OVT Over Temperature
This active low, open drain output can be used
to indicate that an over-temperature condition
exists.