Ublox LILY-W1 Series Quick setup guide

LILY-W1 series
Host-based Wi-Fi modules
System integration manual

Abstract
This document describes LILY-W1 series short range Wi-Fi front end modules. These host-
based
modules are ultra-compact cost efficient IEEE 802.11b/g/n Wi-Fi front end modules in the LILY form
factor. This module series includes variants w
ith or without internal antenna and LTE filter. It
includes an integrated MAC/Baseband processor and RF front end components. It can connect to a
host through its SDIO or USB interface.
www.u-blox.com
UBX-15027600 - R09

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Document information
Title LILY-W1 series
Subtitle Host-based Wi-Fi modules
Document type System integration manual
Document number UBX-15027600
Revision and date R09 29-Jun-2020
Disclosure restriction C1 - Public
Product status Corresponding content status
Functional sample Draft For functional testing. Revised and supplementary data will be published later.
In development /
Prototype
Objective specification Target values. Revised and supplementary data will be published later.
Engineering sample Advance information Data based on early testing. Revised and supplementary data will be published later.
Initial production Early production information Data from product verification. Revised and supplementary data may be published later.
Mass production /
End of life
Production information Document contains the final product specification.
This document applies to the following products:
Product name Type number Firmware version PCN reference Product status
LILY-W131 LILY-W131-00B-00 SDIO driver:
Package: SD-UAPSTA-8801-FC18-
MMC-14.85.36.p101-C3X14160_B0-
GPL
Firmware version: 14.85.36.p101
USB driver:
Package: USB-UAPSTA-8801-FC18-
X86-14.85.36.p101-C3X14160_B0-
GPL
Firmware version: 14.85.36.p101
N/A Mass Production
LILY-W132 LILY-W132-00B-00 N/A
u-blox or third parties may hold intellectual property rights in the products, names, logos and designs included in this
document. Copying, reproduction, modification or disclosure to third parties of this document or any part thereof is only
permitted wit
h the express written permission of u-blox.
The information contained herein is provided “as is” and u
-blox assumes no liability for its use. No warranty, either express or
implied, is given, including but not limited
to, with respect to the accuracy, correctness, reliability and fitness for a particular
purpose of the information. This document may be revised by u
-blox at any time without notice. For the most recent
documents, visit www.u
-blox.com.
Copyright © u
-blox AG.

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Contents
Document information................................................................................................................................2
Contents ..........................................................................................................................................................3
1System description...............................................................................................................................6
1.1 Overview and applications ........................................................................................................................6
1.1.1 Module architecture........................................................................................................................... 7
1.1.2 Radio interface .................................................................................................................................... 7
1.1.3 Operation modes ................................................................................................................................ 7
1.2 Pin configuration and function................................................................................................................. 8
1.2.1 Pin attributes....................................................................................................................................... 8
1.2.2 Pin list....................................................................................................................................................9
1.3 Supply interfaces ......................................................................................................................................10
1.3.1 Main supply inputs ...........................................................................................................................10
1.3.2 Power-up sequence ..........................................................................................................................11
1.4 System function interfaces ....................................................................................................................11
1.4.1 Module power-on ..............................................................................................................................11
1.4.2 Module power-off..............................................................................................................................12
1.4.3 Wake-Up signals ...............................................................................................................................12
1.4.4 Configuration signals.......................................................................................................................12
1.5 Data communication interfaces ............................................................................................................12
1.5.1 SDIO interface ...................................................................................................................................12
1.5.2 USB 2.0 interface..............................................................................................................................13
1.6 Antenna interfaces...................................................................................................................................14
1.6.1 Approved antenna designs.............................................................................................................14
1.7 Other remarks............................................................................................................................................14
1.7.1 Unused pins .......................................................................................................................................14
2Design-in................................................................................................................................................ 15
2.1 Overview......................................................................................................................................................15
2.2 Antenna interface .....................................................................................................................................15
2.2.1 RF transmission line design (LILY-W131 only) ..........................................................................16
2.2.2 Antenna design (LILY-W131 only) ................................................................................................17
2.2.3 On-board antenna design (LILY-W132 only) ..............................................................................21
2.3 Supply interfaces ......................................................................................................................................22
2.3.1 Module supply design ......................................................................................................................22
2.4 Data communication interfaces ............................................................................................................24
2.4.1 SDIO.....................................................................................................................................................24
2.4.2 USB 2.0 ...............................................................................................................................................24
2.5 Other interfaces and notes.....................................................................................................................25
2.6 General high speed layout guidelines ...................................................................................................25
2.6.1 General considerations for schematic design and PCB floor-planning: ................................25
2.6.2 Component placement ....................................................................................................................26

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2.6.3 Layout and manufacturing.............................................................................................................26
2.7 Module footprint and paste mask .........................................................................................................26
2.8 Thermal guidelines ...................................................................................................................................27
2.9 ESD guidelines ...........................................................................................................................................28
2.10 Design-in checklist....................................................................................................................................29
2.10.1 Schematic checklist.........................................................................................................................29
2.10.2 Layout checklist................................................................................................................................29
3Software ................................................................................................................................................ 30
3.1 Driver versions ...........................................................................................................................................30
3.2 Supported kernel versions ......................................................................................................................30
3.3 Driver and firmware architecture...........................................................................................................31
3.4 Compiling the drivers ...............................................................................................................................32
3.4.1 Prerequisites......................................................................................................................................32
3.4.2 Extracting the package content....................................................................................................32
3.4.3 Compile-time configuration............................................................................................................33
3.4.4 Building ...............................................................................................................................................33
3.5 Deploying the software ............................................................................................................................34
3.5.1 Blacklisting the mwifiex driver .......................................................................................................34
3.5.2 Additional software requirements ................................................................................................35
3.6 Loading the drivers ...................................................................................................................................35
3.6.1 SDIO driver .........................................................................................................................................35
3.6.2 USB driver...........................................................................................................................................36
3.6.3 Unloading the drivers.......................................................................................................................37
3.7 Reserving MAC addresses ......................................................................................................................37
3.8 Prevent high current in deep sleep........................................................................................................38
3.9 Configuration of transmit power limits................................................................................................38
3.9.1 Purpose ...............................................................................................................................................38
3.9.2 Transmit power limit configuration file format..........................................................................38
3.9.3 Applying the transmit power limit configuration.......................................................................39
3.10 Adaptivity configuration (Energy Detection) ......................................................................................40
3.11 Usage examples ........................................................................................................................................40
3.11.1 Wi-Fi access point mode .................................................................................................................40
3.11.2 Wi-Fi station mode ...........................................................................................................................41
3.12 The “iwconfig mlan0” command can be used to display parameters and statistics of the
wireless network interface.Driver debugging ..............................................................................................41
3.12.1 Compile-time debug options ..........................................................................................................42
3.12.2 Runtime debug options ...................................................................................................................42
4Handling and soldering ..................................................................................................................... 43
4.1 Packaging, shipping, storage and moisture preconditioning ..........................................................43
4.2 ESD handling precautions.......................................................................................................................43
4.3 Reflow soldering process.........................................................................................................................43
4.3.1 Cleaning ..............................................................................................................................................44
4.3.2 Other notes ........................................................................................................................................45

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5Regulatory compliance ..................................................................................................................... 46
5.1 General requirements ..............................................................................................................................46
5.2 FCC/IC End-product regulatory compliance........................................................................................46
5.2.1 Referring to the u-blox FCC/IC certification ID ...........................................................................47
5.2.2 Obtaining own FCC/IC certification ID..........................................................................................47
5.2.3 Antenna requirements ....................................................................................................................48
5.2.4 Software configuration and control..............................................................................................48
5.2.5 Operating frequencies .....................................................................................................................48
5.2.6 End product labeling requirements ..............................................................................................49
5.2.7 Original FCC and IC grant................................................................................................................50
5.3CE End-product regulatory compliance ...............................................................................................50
5.3.1 Safety standard ................................................................................................................................50
5.3.2 CE Equipment classes .....................................................................................................................50
5.4 NCC end-product regulatory compliance.............................................................................................50
5.4.1 Modular transmitter requirements...............................................................................................51
5.4.2 End product labeling requirements ..............................................................................................51
5.5 Japan End-product regulatory compliance .........................................................................................51
6Product testing ................................................................................................................................... 53
6.1 u-blox in-series production test .............................................................................................................53
6.2 OEM manufacturer production test .....................................................................................................53
6.2.1 “Go/No go” tests for integrated devices ......................................................................................54
6.2.2 RF functional tests...........................................................................................................................54
Appendix ....................................................................................................................................................... 56
AGlossary ................................................................................................................................................. 56
BAntenna reference designs ............................................................................................................. 58
B.1 Reference design for external antennas (U.FL connector) ...............................................................58
B.1.1 Floor plan and PCB stack-up .............................................................................................................59
B.1.2 PCB stack-up ........................................................................................................................................59
B.1.3 RF trace specification.........................................................................................................................60
CWi-Fi Tx output power limits .......................................................................................................... 61
Related documents ................................................................................................................................... 62
Revision history.......................................................................................................................................... 63
Contact.......................................................................................................................................................... 64

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1System description
1.1 Overview and applications
The LILY-W1 series modules are ultra-compact Wi-Fi front end modules that include variants with or
without an internal antenna and LTE filter to enable in-device co-existence without jeopardizing Wi-
Fi performance. They are designed for integration with an LTE radio application. LILY-W1 supports
IEEE 802.11b/g/n standards. The modules include an integrated MAC/Baseband processor, RF front-
end components and band pass filter. The LILY-W132 with internal antenna includes a BAW filter
specially designed for optimal LTE and Wi-Fi coexistence applications. The modules are developed for
reliable, high demanding industrial devices and applications and deliver high performance
connectivity.
The modules are radio type approved for Europe (ETSI RED), US (FCC CFR 47 part 15 unlicensed
modular transmitter approval), Canada (ISEDC RSS), Taiwan (NCC), and Japan (Giteki). The main
features and interfaces of LILY-W1 series are summarized in Table 1.
Table 1: Key features of LILY-W1 series

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Applications
•Industrial automation and cable replacement
•Smart gateway and POS
•Wireless surveillance and sensors
•Home automation and appliances
•Transport and logistics devices
1.1.1 Module architecture
The block diagram of the LILY-W1 series module is provided in this section and is valid for both
variants.
Figure 1: LILY-W1 block diagram
1.1.2 Radio interface
The LILY-W1 series modules support Wi-Fi 802.11b/g/n operation in the 2.4 GHz radio band and are
available in the following two variants:
•LILY-W131 – Single stream with an antenna pin for external antenna; supports antenna diversity
via control signals (external RF switch required).
•LILY-W132 – Single stream with an internal PIFA antenna and LTE filter.
1.1.3 Operation modes
The LILY-W1 series modules have several operation modes, which are defined in Table 2 along with
related guidelines.
General Status Operating Mode Description
Power-down Not Powered VCC and VCC_IO supply not present or below the operating range: module is
switched off.
Power Down VCC and VCC_IO supply within the operating range and PD-n pin is asserted. This
is the lowest power condition with active voltage rails. All internal clocks are shut
down; register and memory states are not maintained. Upon exiting power down
mode, a reset is automatically performed and a firmware re-download is required to
re-enter any of the above-mentioned operation modes.
Normal Operation Deep Sleep This is a low-power state used in the sleep state of many power save modes. It is a
low-power state where the external reference clock and many blocks in the chip are

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switched off. Only a slow sleep clock is used to maintain register and memory
states. Wake-up does not require a firmware re-download.
IEEE Power Save
(Station mode
only)
The device automatically wakes up on beacons. This is dependent on the DTIM
value of the AP it is connected to. If the DTIM value is 1 along with a beacon interval
of 100 ms, the device wakes up every 100 ms. Similarly, for DTIM =2, the device
wakes up at every 200 ms, and so on.
Receive Idle /
AP Beaconing
DUT is powered on and had completed firmware download. DUT is ready to receive
packets, but is not actively decoding any because none are being transmitted to it.
Active Tx/Rx data connection enabled and system runs at specified power consumption.
Table 2: Description of operation modes for LILY-W1 series
1.2 Pin configuration and function
1.2.1 Pin attributes
The pin attributes described in Table 3 are:
1. Function:Pin function.
2. Pin name:The name of the package pin or terminal.
3. Pin number:Package pin numbers associated with each signals.
4. Power: The voltage domain that powers the pin
5. Type:Signal type description:
-I = Input
-O = Output
-I/O = Input and Output
-D = Open drain
-DS = Differential
-PWR = Power
-GND = Ground
-PU = Internal Pull-Up
-PD = Internal Pull-Down
-H = High-Impedance pin
-RF = Radio interface
6. Signal name:The signal name for that pin in the mode being used.
7. Remarks:Pin description and notes.

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1.2.2 Pin list
Figure 2 and Table 3 list the pin-out of the LILY-W1 module, with pins grouped by function.
Figure 2: LILY-W1 pin assignment (top view)
Function Pin Name Pin No. Power Type Signal Name Remarks
Power VCC 9 VCC PWR Module supply input Voltage supply range: 3.0V – 3.6V
VCC_IO 8 VCC_IO PWR IO Voltage supply
input
Nominal supply range: 1.8V or 3.3V
GND 6, 10,
11, 13,
21, 25,
26-37
GND GND Module ground
Digital SDIO_CLK 5 VCC_IO I SDIO Clock SDIO 4-bit Mode: Clock input
SDIO 1-bit Mode: Clock input
SDIO SPI Mode: Clock input
SDIO_CMD
USB_VBUS_ON
4 VCC_IO I/O SDIO Command SDIO 4-bit Mode: Command/response
SDIO 1-bit Mode: Command line
SDIO SPI Mode: Data input
USB Mode: USB_VBUS_ON
SDIO_D0 3 VCC_IO I/O SDIO data 0 SDIO 4-bit Mode: Data line Bit[0]
SDIO 1-bit Mode: Data line
SDIO SPI Mode: Data output
SDIO_D1 1 VCC_IO I/O SDIO data 1 DIO 4-bit Mode: Data line Bit[1]
SDIO 1-bit Mode: Interrupt
SDIO SPI Mode: Interrupt
SDIO_D2 7 VCC_IO I/O SDIO data 2 SDIO 4-bit Mode: Data line Bit[2] or read
wait (optional)
SDIO 1-bit Mode: Read wait (optional)
SDIO SPI Mode: Reserved
SDIO_D3 2 VCC_IO I/O SDIO data 3 SDIO 4-bit Mode: Data line Bit[3]
SDIO 1-bit Mode: Reserved
SDIO SPI Mode: Card select (active low)
USB_DP 23 VCC DS USB Differential Data
+

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Function Pin Name Pin No. Power Type Signal Name Remarks
USB_DM 24 VCC DS USB Differential Data -
Control PD-n 14 VCC I,PU Power down Active low
HOST_WKUP 19 VCC_IO O Host Wake-Up Module to Host
WAKE_UP 17 1.8V
(int.)
I,PU/PD Radio Wake-Up Host to Module, programmable Pull
resistor.
1.8V CMOS input
USB/SDIO-n 22 1.8V
(int.)
I,PU Host interface
selection
Low level activates the SDIO interface.
1.8V CMOS input1
Radio ANT 12 VCC RF Antenna signal Only available in LILY-W131
ANT_SEL 15 VCC O Antenna diversity
selection
Only available on LILY-W131. Inverted
version of ANT_SEL-n
ANT_SEL-n 16 VCC O Antenna diversity
selection
Only available on LILY-W131. Inverted
version of ANT_SEL
Other NC 18, 20 - - Reserved Do not connect
Table 3: LILY-W1 module pin definition, grouped by function
⚠Do not apply any voltage to digital, control and radio signal groups while in Not Powered mode to
avoid damaging the module.
1.3 Supply interfaces
1.3.1 Main supply inputs
The power for the LILY-W1 series modules must be supplied via the VCC and VCC_IO pin. All supply
voltages used inside the modules are generated from the VCC through internal LDOs.
The current drawn by the LILY-W1 series through the VCC pins can vary by several orders of
magnitude depending on operation mode and state. It can change from the high current consumption
during Wi-Fi transmission at maximum RF power level in connected-mode, to the low current
consumption during low power idle-mode with the power saving configuration enabled.
Detailed description on the electrical requirements of the supply voltages can be found in the
LILY-W1 series Data Sheet [1] .
Rail Allowable Ripple (peak to peak)2
over DC supply
Current consumption, active
mode
Notes
10-100 kHz 100 kHz-1 MHz >1 MHz
VCC
50

40

20
 340 mA MCS0, +17 dBm
VCC_IO
50

40

20
 1.5 mA
Table 4: Summary of voltage supply requirements
The LILY-W1 series modules are powered by one of the following DC supplies:
•Switching Mode Power Supply (SMPS)
•Low Drop Out (LDO) regulator
The SMPS is the ideal choice when the available primary supply source has higher value than the
operating supply voltage of the LILY-W1 series modules. The use of SMPS provides the best power
efficiency for the overall application and minimizes current drawn from the main supply source.
1When choosing SDIO bus for host communication, power consumption could be significantly lower compared to USB mode.
2Ripple measured on u-blox EVK’s power connectors.

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⚠While selecting SMPS, ensure that AC voltage ripple at switching frequency does not violate the
requirements specified in Table 4. Layout shall be implemented to minimize impact of high
frequency ringing. See section 2.3.1.1 for additional information.
The use of an LDO linear regulator is convenient for a primary supply with a relatively low voltage
where the typical 85-90% efficiency of the switching regulator leads to minimal current saving. Linear
regulators are not recommended for high voltage step-down as they will dissipate a considerable
amount of energy.
Independent of the selected DC power supply for VCC, it is crucial that it can handle the high peak
current generated by the module. It is recommended to provide at least 20% margin over stated active
current when designing the power supply for this module.
1.3.2 Power-up sequence
Figure 3 shows the recommended power sequence of the module. If the PD-n pin is driven by the host,
it is recommended to apply 1 ms delay with respect to VCC/VCC_IO ramp-up. Otherwise, the PD-n
can be left open; in this case, the module will handle power-on sequence by itself.
During power up of the LILY-W1 series module, it is a good practice to enable VCC first, followed by
VCC_IO shortly after to reduce the inrush current from the main supply. It is suggested that the PD-
nis held low during start up and be released when the power is stable or later, when the module must
be turned on.
The PD-n signal is powered by VCC voltage domain.
Figure 3: Recommended power sequence of LILY-W1 module
☞Power down mode can only be entered by PD-n assertion from the host.
⚠No specific sequence is required between VCC and VCC_IO rails. If the VCC supply cannot be
enabled before the VCC_IO supply, then PD-n must be pulled low until all supplies are stable. It is
recommended not to apply power to a single rail for an extended period of time.
1.4 System function interfaces
1.4.1 Module power-on
The power-on sequence of LILY-W1 series module can be initiated by applying the respective voltage
to VCC/VCC_IO supply pins and releasing PD-n signal. An internal 47 kΩpull-up resistor is available
on this pin. Firmware download is required each time PD-n is de-asserted.

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1.4.2 Module power-off
LILY-W1 modules can enter Power Down mode by asserting PD-n signal (logic level 0) or power on
VCC/VCC_IO can be removed to enter Power Off mode.
1.4.3 Wake-Up signals
LILY-W1 modules provide two wake-up signals to handle the low power modes:
•WAKE_UP: Host-to-module Wake-Up signal from Deep Sleep mode (input).
•HOST_WKUP: Module-to-host Wake-Up signal can be used to exit host from Deep Sleep modes
(output).
HOST_WKUP signal is powered by VCC_IO voltage domain.
WAKE_UP signal is powered by the internal 1,8V voltage domain.
Name I/O Description Remark
WAKE_UP I Host-to-Module Wake-Up signal Referenced to internal power domain.
HOST_WKUP O Module-to-Host Wake-Up signal
Table 5: Wake-up signal definition
1.4.4 Configuration signals
LILY-W1 series module uses the USB/SDIO-n pin as host interface configuration input to set the
desired operation mode following a Power on sequence. Strap configuration options are listed in Table
6.
USB/SDIO-n signal is powered by the internal 1.8 V voltage domain and is used to determine
communication busses configuration and host-side drivers.
•USB mode (USB/SDIO-n pin not connected): Commands and data regarding Wi-Fi traffic will be
transferred via the USB bus.
•SDIO mode (USB/SDIO-n pin grounded): Commands and data regarding Wi-Fi traffic will be
transferred via the SDIO bus.
The designer must guarantee that the pin is properly set before the PD-n release.
Name I/O Description Remarks
USB/SDIO-n I Interface selection pin Referenced to internal power domain. Connect to ground for
SDIO. Leave open for USB.
Table 6: LILY-W1 host interface selection
1.5 Data communication interfaces
The LILY-W1 modules support SDIO Full-Speed or USB 2.0 Device as host interfaces and the Wi-Fi
traffic will always be communicated via one of these interfaces depending on the sampled value of
USB/SDIO-n during module boot. See section 1.4.4 for additional information.
1.5.1 SDIO interface
LILY-W1 modules support a SDIO device interface that conforms to the industry standard SDIO Full-
Speed card specification and allows a host controller using the SDIO bus protocol to access the
wireless module. A module acts as a device on the SDIO bus.
Main features of the SDIO device interface are:
•On-chip memory used for CIS
•Supports 1-bit and 4-bit SDIO transfer modes at the full clock range of 0 to 50 MHz
•Special interrupt register for information exchange

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•Allows card to interrupt host
Table 7 summarizes the bus speed modes supported by the module.
Bus Speed Mode Max. Bus Speed [MB/s] Max. Clock Frequency [MHz]
High Speed 25 50
Default Speed 12.5 25
Table 7: SDIO supported rates
Pull-up resistors are required for all SDIO data and command lines. These pull-up resistors can be
provided either externally on the host PCB or internally in the host application processor. Depending
on the routing of the SDIO lines on the host, termination resistors in series to the lines might also be
needed. See section 2.4.1 for more information.
Name I/O Description Remarks
SD_CLK I SDIO Clock input
SD_CMD I/O SDIO Command line External PU required
SD_D0 I/O SDIO Data line bit [0] External PU required
SD_D1 I/O SDIO Data line bit [1] External PU required
SD_D2 I/O SDIO Data line bit [2] External PU required
SD_D3 I/O SDIO Data line bit [3] External PU required
Table 8: SDIO signal definition
The module's SDIO host interface pins are powered by the VCC_IO voltage domain.
1.5.2 USB 2.0 interface
The USB device interface is compliant with the USB 2.0 Specification [6] . The main features of the
USB interface are:
•High/Full speed operation (480/12 Mbps)
•Suspend/host resume/device resume (remote wake-up)
•Built-in DMA engine to reduce interrupt loads on embedded processor and optimize bus
bandwidth
•Support for Link Power Management (LPM), corresponding host resume, or device resume
(remote wakeup) to exit from L1 sleep state.
Disturbance from the USB data signals routed on the host board can have influence on the RF
performance and additional filtering may be needed. See section 2.4.2 for more info.
Name I/O Description Remarks
USB_DP I/O USB Serial Data + Differential signal
USB_DN I/O USB Serial Data - Differential signal
USB_VBUS_ON I USB VBUS reference Connect to VCC through a 33 kΩ
resistor
Table 9: USB signal definition
⚠If the USB interface is selected, VCC_IO only supports 3.3 V nominal supply range and must be
tied to VCC.
The module's USB host interface pins are powered by the VCC voltage domain.

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1.6 Antenna interfaces
The LILY-W1 module series provides two different antenna interfaces based on part number
selection. The designer must follow the application notes in the Appendix B section for both versions
of the module:
•LILY-W131 has a dedicated antenna pin that can be used to connect up to two antennas in
diversity mode.
•LILY-W132 implements an internal antenna. ANT pin is not connected in LILY-W132 and antenna
diversity is not supported.
The following recommendations apply while developing an antenna interface for the LILY-W1 module:
•Where possible, consider integrating in the end product the u-blox reference design to minimize
the effort on the certification process. See Appendix B for the full list of available reference
designs.
•Good isolation must be provided between the various antennas in the system. Special care should
be taken to maximize isolation between antennas operating in the same or nearby bands.
See section 2.2 for information on how to properly design circuits that are compliant with these
requirements.
1.6.1 Approved antenna designs
LILY-W1 modules come with a pre-certified design that can be used to save costs and time during the
certification process. To minimize this effort, the customer is required to implement antenna layout
according to u-blox reference designs provided in Appendix B. u-blox can provide reference design
source files on request.
The module has been tested and approved for use with the antennas listed in the
LILY-W1 series Data
Sheet [1].
The module may be integrated with other antennas. In this case, the OEM installer must certify his
design with respective regulatory agencies.
See section 5 for more information about the certification process.
1.7 Other remarks
1.7.1 Unused pins
LILY-W1 modules have pins reserved for future use (NC) that must be left unconnected on the
application board.

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2Design-in
2.1 Overview
For an optimal integration of LILY-W1 series modules in the final application board, it is recommended
to follow the design guidelines stated in this chapter. Every application circuit must be properly
designed to guarantee the correct functionality of the related interface, however a number of points
require high attention during the design of the application device.
The following list provides a rank of importance in the application design, starting from the highest
relevance:
•Module antenna connection and layout: ANT pin for LILY-W131 and component/ground clearance
for LILY-W132.
Antenna circuit affects the RF compliance of the device integrating LILY-W1 modules with
applicable certification schemes. Follow the recommendations provided in section 2.2 for
schematic and layout design.
•Module supply: VCC, VCC_IO, and GND pins.
The supply circuit performance may affect the RF compliance of a device integrating LILY-W1
modules with applicable certification schemes. Follow the recommendations provided in section
2.3 for schematic and layout design.
•High speed interfaces: SDIO and USB pins.
High speed interfaces can be a source of radiated noise and can affect the compliance with
regulatory standards for radiated emissions. Follow the recommendations provided in section 2.4
for schematic and layout design.
•System functions: PD-n and pins indicated as Configuration signals.
Accurate design is required to guarantee that the voltage level is well defined during module boot.
Follow the recommendations provided in section 2.6 for schematic and layout design.
•Other pins: specific signals and NC pins.
Accurate design is required to guarantee proper functionality. Follow the recommendations
provided in section 2.5 and 2.6 for schematic and layout design.
2.2 Antenna interface
LILY-W1 modules provide the following two RF interfaces for connecting the external antennas:
•The ANT port offers Wi-Fi connectivity in LILY-W131.
•LILY-W132 integrates an antenna on module with LTE coexistence filter.
The ANT port has a nominal characteristic impedance of 50 Ωand must be connected to the related
antenna or RF switch through a 50 Ωtransmission line to allow proper impedance matching along the
RF path. A bad termination of the ANT pin may result in poor performance of the module.
For the diversity antenna configuration, the isolation between the two antennas should be maximized
and the requirements specified in Table 10 and Table 11 should be followed to ensure good
performance.
⚠According to FCC regulations, the transmission line from the module’s antenna pin to the antenna
or antenna connector on the host PCB is considered part of the approved antenna design.

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Therefore, module integrators must either follow exactly one of the antenna reference design used
in the module’s FCC type approval and detailed in Annex B or certify their own designs.
2.2.1 RF transmission line design (LILY-W131 only)
RF transmission lines such as the one from the ANT pin up to the related antenna connectors must
be designed so that the characteristic impedance is as close as possible to 50 Ω. Figure 4 illustrates
the design options and the main parameters to be taken into account when implementing a
transmission line on a PCB:
•The micro strip (a track coupled to a single ground plane, separated by dielectric material),
•The coplanar micro strip (a track coupled to ground plane and side conductors, separated by
dielectric material).
•The strip line (a track sandwiched between two parallel ground planes, separated by dielectric
material).
The coplanar micro strip is the most common configuration for a printed circuit board (PCB).
Figure 4: Transmission line trace design
To properly design a 50 Ωtransmission line, the following remarks should be taken into account:
•The designer should provide enough clearance from surrounding traces and ground in the same
layer; in general a trace to ground clearance of at least two times the trace width should be
considered and the transmission line should be ”guarded” by ground plane area on each side.
•The characteristic impedance can be calculated as first iteration using tools provided by the layout
software. It is advisable to ask the PCB manufacturer to provide the final values that are usually
calculated using dedicated software and available stack-ups from production. It could also be
possible to request an impedance coupon on panel’s side to measure the real impedance of the
traces.
•FR-4 dielectric material, although its high losses at high frequencies can be considered in RF
designs providing that :
oRF trace length must be minimized to reduce dielectric losses.
oIf traces longer than few centimeters are needed, it is recommended to use a coaxial
connector and cable to reduce losses.
oStack-up should allow for wide 50 Ωtraces and at least 200 µm trace width is
recommended to assure good impedance control over the PCB manufacturing process.

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oFR-4 material exhibits poor thickness stability and thus less control of impedance over
the trace length. Contact the PCB manufacturer for specific tolerance of controlled
impedance traces.
•For PCBs using components bigger than 0402 and dielectric thickness below 200 µm, it is
recommended to add a keep-out (that is, clearance, a void area) on the ground reference layer
below any pin present on the RF transmission lines to reduce parasitic capacitance to ground.
•The transmission lines width and spacing to GND must be uniform and routed as smoothly as
possible: route RF lines in 45 ° angle.
•Add GND stitching vias around transmission lines as shown in Figure 5.
•Ensure solid metal connection of the adjacent metal layer on the PCB stack-up to main ground
layer, providing enough vias on the adjacent metal layer as shown in Figure 5.
•Route RF transmission lines far from any noise source (as switching supplies and digital lines) and
from any sensitive circuit to avoid crosstalk between RF traces and Hi-impedance or analog
signals.
•Avoid stubs on the transmission lines, any component on the transmission line should be placed
with the connected pin over the trace. Also avoid any unnecessary component on RF traces.
Figure 5: Example of RF trace and ground design from LILY-W1 Evaluation Kit (EVK)
2.2.2 Antenna design (LILY-W131 only)
Designers must take care of the antennas from all perspective at the very start of the design phase
when the physical dimensions of the application board are under analysis/decision, since the RF
compliance of the device integrating LILY-W1 module with all the applicable required certification
schemes heavily depends on antennas radiating performance.
•External antennas such as linear dipole:
oExternal antennas basically do not imply physical restriction to the design of the PCB
where the module is mounted.
oThe radiation performance mainly depends on the antennas. It is required to select
antennas with optimal radiating performance in the operating bands.
oRF cables should be carefully selected with minimum insertion losses. Additional
insertion loss will be introduced by low quality or long cable. Large insertion loss
reduces radiation performance.
oA high quality 50 Ωcoaxial connector provides proper PCB-to-RF cable transition.
•Integrated antennas such as patch-like antennas:
oInternal integrated antennas imply physical restriction to the PCB design:
Integrated antenna excites RF currents on its counterpoise, typically the PCB ground
plane of the device that becomes part of the antenna; its dimension defines the
minimum frequency that can be radiated. Therefore, the ground plane can be reduced
down to a minimum size that should be similar to the quarter of the wavelength of the

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minimum frequency that has to be radiated, given that the orientation of the ground
plane related to the antenna element must be considered.
The RF isolation between antennas in the system has to be as high as possible and the
correlation between the 3D radiation patterns of the two antennas has to be as low as
possible. In general, an RF separation3of at least a quarter wavelength between the
two antennas is required to achieve a minimum isolation and low pattern correlation;
increased separation should be considered if possible, to maximize the performance
and fulfil the requirements in Table 11.
A numerical example to estimate the physical restriction on a PCB is shown below:
Frequency = 2.4 GHz Wavelength = 12.5 cm Quarter wavelength = 3.125 cm4
•Radiation performance depends on the whole product and antenna system design, including
product mechanical design and usage. Antennas should be selected with optimal radiating
performance in the operating bands according to the mechanical specifications of the PCB and
the whole product.
Table 10 summarizes the requirements for the antenna RF interface while Table 11 specifies
additional requirements for dual antenna design implementation.
Item Requirements Remarks
Impedance 50 Ωnominal characteristic
impedance
The impedance of the antenna RF connection must match
the 50 Ωimpedance of the ANT pin.
Frequency Range 2400 - 2500 MHz For 802.11b/g/n and Bluetooth®.
Return Loss S11 < -10 dB (VSWR < 2:1)
recommended
S11 < -6 dB (VSWR < 3:1) acceptable
The Return loss or the S11, as the VSWR, refers to the
amount of reflected power, measuring how well the primary
antenna RF connection matches the 50 Ωcharacteristic
impedance of the ANT pin.
The impedance of the antenna termination must match as
much as possible the 50 Ωnominal impedance of the ANT
pin over the operating frequency range, maximizing the
amount of the power transferred to the antenna.
Efficiency > -1.5 dB ( > 70% ) recommended
> -3.0 dB ( > 50% ) acceptable
The radiation efficiency is the ratio of the radiated power to
the power delivered to antenna input: the efficiency is a
measure of how well an antenna receives or transmits.
Maximum Gain Refer to Section 5 The maximum antenna gain must not exceed the value
specified in type approval documentation to comply with
regulatory agencies radiation exposure limits.
Table 10: Summary of antenna interface requirements
Item Requirements Remarks
Efficiency imbalance < 0.5 dB recommended
< 1.0 dB acceptable
The radiation efficiency imbalance is the ratio of the first
antenna efficiency to the second antenna efficiency: the
efficiency imbalance is a measure of how much better an
antenna receives or transmits compared to the other
antenna.
The radiation efficiency of the antennas should be roughly
the same.
Envelope Correlation
Coefficient
< 0.4 recommended
< 0.5 acceptable
The Envelope Correlation Coefficient (ECC) between one
antenna and the other is an indicator of 3D radiation
pattern similarity between the two antennas: low ECC
results from antenna patterns with radiation lobes in
different directions.
3RF separation is the total dimension of the antenna element, including its grounding elements. It is at least half wavelength
in size. Good separation is achieved with distances greater than 20 cm.
4Wavelength referred to a signal propagating over the air.

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Isolation
(in-band)
S21 > 15 dB recommended
S21 > 10 dB acceptable
The antenna to antenna isolation is the S21 parameter
between the two antennas in the band of operation.
Isolation
(out-of-band)
S21 > 35 dB recommended
S21 > 30 dB acceptable
Out-of-band isolation is evaluated in the band of the
aggressor to ensure that the transmitting signal from the
other radio is sufficiently attenuated by the receiving
antenna to avoid saturation and intermodulation effects
at the receiver’s port.
Table 11: Summary of antenna isolation requirements for Antenna Diversity applications on LILY-W131
In both the cases, while selecting an external or internal antenna, observe the following
recommendations:
•Select antennas that provide optimal return loss (or VSWR) figure over all the operating
frequencies.
•Select antennas that provide optimal efficiency figure over all the operating frequencies.
•Select antennas that provide appropriate gain not to exceed the regulatory limits specified in
some countries such as by FCC in the United States, as mentioned in section 5.
•Select antennas that can provide low Envelope Correlation Coefficient between each other.
2.2.2.1 RF connector design
If an external antenna is required, the designer should consider using a proper RF connector. It is the
responsibility of the designer to verify the compatibility between plugs and receptacles used in the
design.
Table 12 suggests some RF connector plugs that can be used by the designers to connect RF coaxial
cables based on the declaration of the respective manufacturers. The Hirose U.FL-R-SMT RF
receptacles (or similar parts) require a suitable mated RF plug from the same connector series. Due
to wide usage of this connector, several manufacturers offer compatible equivalents.
Manufacturer Series Remarks
Hirose U.FL® Ultra Small Surface Mount Coaxial Connector Recommended
I-PEX MHF® Micro Coaxial Connector
Tyco UMCC® Ultra-Miniature Coax Connector
Amphenol RF AMC® Amphenol Micro Coaxial
Lighthorse Technologies, Inc. IPX ultra micro-miniature RF connector
Table 12: U.FL compatible plug connector
Typically, the RF plug is available as a cable assembly. Different types of cable assembly are available;
the user should select the cable assembly best suited to the application. The key characteristics are:
•RF plug type: select U.FL or equivalent
•Nominal impedance: 50 Ω
•Cable thickness: Typically from 0.8 mm to 1.37 mm. Select thicker cables to minimize insertion
loss
•Cable length: Standard length is typically 100 mm or 200 mm; custom lengths may be available
on request. Select shorter cables to minimize insertion loss.
•RF connector on the other side of the cable: For example another U.FL (for board-to-board
connection) or SMA (for panel mounting)
Consider that SMT connectors are typically rated for a limited number of insertion cycles. In addition,
the RF coaxial cable may be relatively fragile compared to other types of cables. To increase
application ruggedness, connect U.FL connector to a more robust connector such as SMA fixed on
panel.

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☞A de-facto standard for SMA connectors implies the usage of reverse polarity connectors (RP-
SMA) on end-user accessible Wi-Fi interfaces to increase the difficulty to replace the antenna
with higher gain versions and exceed regulatory limits.
The following recommendations apply for proper layout of the connector:
•Strictly follow the connector manufacturer’s recommended layout. Some examples are provided
below:
oSMA Pin-Through-Hole connectors require GND keep-out (that is, clearance, a void
area) on all the layers around the central pin up to annular pins of the four GND posts.
oU.FL surface mounted connectors require no conductive traces (that is, clearance, a
void area) in the area below the connector between the GND land pins.
•In case of connector’s RF pin size wider than the micro strip, remove the GND layer beneath the
RF connector to minimize the stray capacitance thus keeping the RF line 50 Ω. For example, the
active pin of UF.L connector must have a GND keep-out (also called “void area”) at least on the first
inner layer to reduce parasitic capacitance to ground.
2.2.2.2 Integrated antenna design
If integrated antennas are used, the transmission line is terminated by the antennas themselves.
Follow the guidelines mentioned below:
•The antenna design process should start together with the mechanical design of the product. PCB
mock-ups are useful in estimating overall efficiency and radiation path of the intended design
during early development stages.
•Use antennas designed by an antenna manufacturer providing the best possible return loss (or
VSWR).
•Provide a ground plane large enough according to the related integrated antenna requirements.
The ground plane of the application PCB may be reduced down to a minimum size that must be
similar to one quarter of wavelength of the minimum frequency that has to be radiated, however
overall antenna efficiency may benefit from larger ground planes. Proper placement of the
antenna and its surroundings is also critical for antenna performance. Avoid placing the antenna
close to conductive or RF-absorbing parts such as metal objects or ferrite sheets as they may
absorb part of the radiated power, shift the resonant frequency of the antenna or affect the
antenna radiation pattern.
•It is highly recommended to strictly follow the specific guidelines provided by the antenna
manufacturer regarding correct installation and deployment of the antenna system, including
PCB layout and matching circuitry.
•Further to the custom PCB and product restrictions, antennas may require tuning/matching to
reach the target performance. It is recommended to plan measurement and validation activities
with the antenna manufacturer before releasing the end-product to manufacturing.
•The receiver section may be affected by noise sources like hi-speed digital busses. Avoid placing
the antenna close to busses as DDR or consider taking specific countermeasures like metal
shields or ferrite sheets to reduce the interference.
•Take care of interaction between co-located RF systems like LTE sidebands on 2.4GHz band.
Transmitted power may interact or disturb the performance of LILY-W1 modules where specific
LTE filter is not present (LILY-W131).
2.2.2.3 LTE coexistence filter selection
LILY-W131 does not include a band pass filter specifically designed to allow Wi-Fi coexistence with
LTE-band7 modems. If a dedicated LTE filter is required on LILY-W131, the designer can refer to
Table 13 for a list of recommended filters or consider parts with similar performance.
Manufacturer Series Part number Remarks