Xembedded XPMC-9100 User manual

XPMC-9100
Dual PMC Carrier with 8-Port Ethernet Switch
©2007 XEMBEDDED™, INC. (XycomVME, Inc.) Printed in the United States of America
retired

Revision Description Date
A Init 07/07
Part Number 646710
Trademark Information
Brand or product names are trademarks or registered trademarks of their respective owners.
Intel and Pentium are registered trademarks and Celeron is a trademark of Intel Corporation.
Windows, Windows NT, Windows 2000 and Windows XP are registered trademarks of Microsoft
Corporation in the US and in other countries.
Copyright Information
This document is copyrighted by Xembedded a XycomVME, Incorporated (XycomVME) company and
shall not be reproduced or copied without expressed written authorization from Xembedded.
The information contained within this document is subject to change without notice. XycomVME does
not guarantee the accuracy of the information.
WARNING
This is a Class A product. In a domestic environment this product may cause radio interference,
in which case the user may be required to take adequate measures.

European Union Directive 89/336/EEC requires that this apparatus comply with relevant ITE
EMC standards. EMC compliance demands that this apparatus is installed within a CompactPCI
enclosure designed to contain electromagnetic radiation and which will provide protection for the
apparatus with regard to electromagnetic immunity. This enclosure must be fully shielded. An
example of such an enclosure is a 6U EMC-RFI CompactPCI System chassis, which includes a
front cover to complete the enclosure.
The connection of non-shielded equipment interface cables to this equipment will invalidate
European Free Trade Area (EFTA) EMC compliance and may result in electromagnetic
interference and/or susceptibility levels that are in violation of regulations which apply to the
legal operation of this device. It is the responsibility of the system integrator and/or user to apply
the following directions, as well as those in the user manual, which relate to installation and
configuration:
All interface cables should be shielded, both inside and outside of the
CompactPCI enclosure. Braid/foil type shields are recommended for serial,
parallel, and SCSI interface cables. Where as external mouse cables are not
generally shielded, an internal mouse interface cable must either be shielded or
looped (1 turn) through a ferrite bead at the enclosure point of exit (bulkhead
connector). External cable connectors must be metal with metal back-shells and
provide 360-degree protection about the interface wires. The cable shield must be
terminated directly to the metal connector shell; shield ground drain wires alone
are not adequate. CompactPCI panel mount connectors that provide interface to
external cables (e.g.,
RS232, USB, keyboard, mouse, etc.) must have metal housings and provide
direct connection to the metal CompactPCI chassis. Connector ground drain
wires are not adequate.

About This Manual
The Xembedded reference manual provides functional, architectural, and mechanical
descriptions of the XCPC-9100. This manual is intended for anyone who designs
OEM products which have requirements for PrPMC/PMC Carrier.
Feedback
Xembedded welcomes feedback on how we can make our manuals and technical
documentation more useful to our customers. Please feel free to send comments and
suggestions to suppo[email protected].
References
PICMG 2.0 R3.0 ECN2.0-3.0-002
PICMG 2.3 R1.0
PICMG 2.6
PICMG
c/o Virtual, Inc.
401 Edgewater Place, Suite 600
Wakefield, MA 01880, USA
Phone: [phone]
(8:00am to 5:00pm Eastern US time)
Fax: [phone]
Email: [email protected]
Xembedded Incorporated
710 N. Maple Rd.
Saline, MI 48176
Phone: [phone]
Email: [email protected]

Table Of Contents XCPC-9100
Chapter 1
GeneralDescription Page
Architecture of the XCPC-9100 2
XCPC-9100 as System Controller or Peripheral 3
Carrier Interface to the CompactPCI bus 3
XCPC-9100 as the System Controller 3
Carrier PrPMC/PMC PCI Clock Speed 4
PrPMC/PMC PCI Signaling 4
Front Panel over view 4
FaultLED 4
Link/Activity of Ethernet ports 4
ResetButton 4
Reset from the PrPMC module 5
Main Features
Dual 10/100/1000-Base TX Ethernet to CompactPCI J3 6
Dual Port 10/100/1000-Base TX Ethernet to each PMC site 6
Dual 10/100/1000-Base TX Ethernet to Front Panel 6
Layer Two Semi-Managed Switch 6
IPMIFRU 6
PCI Bus Interface 6
Specifications 7
Safety 7
EMC 7
Chapter 2
Installation Guide Introduction
XCPC-9100 Mechanical Description 8
RearI/O 8
Switches Setting and Locations 9
XCPC-9100 Installation into a rack 11
PMC Connectors 11
Backplane CompactPCI Connectors 17
JumperHeaderP5 18
Optional Header (P6) 19

Table Of Contents XCPC-9100
Chapter3 Page
The On-Board Switches 21
What is VLAN Support 21
WhyUseVLANs? 22
Procedure For VLAN setup 22
VLAN Configuration 22-23
Chapter 4
IPMI Controller
FRU Inventory Area Information 24
ReadFRUData 24
WriteFRUData 25
FRU Data Specification 25

Introduction
Chapter 1
General Description
The XCPC-9100 is the most advanced CompactPCI (cPCI) carrier in the market that offers all
the features of an eight port switch and can accommodate two PrPMC or PMC modules. The
XCPC-9100 switch can be programmed for such features as VLAN. The Carrier can reside in
the system controller slot (host slot) or as peripheral slot (agent slot). As the system controller
the P2P (PCI to PCI bridge) runs in transparent mode and will configure the cPCI bus. As a
peripheral, the P2P bridge runs in non-transparent mode. The Carrier is also compliant to the
cPCI 2.16 chassis. In the cPCI 2.16 chassis that do not have the PCI bus routed, the module PCI
bus is held in the rest on the secondary side. This allows the two PrPMC/PMC sites to come up
independently from the CompactPCI without any adverse effect to either.
In addition the XCPC-9100 has on board an 8-port Gigabit Ethernet (GbE) semi-managed layer
two type switch. The switch allows the PrPMC/PMC’s that route their GbE to their user define
pins on the PMC site J4 connector to be connected directly to the switch. Two ports of the GbE
switch are routed to the CompactPCI bus J3 connector per PICMIG 2.16 specification. In
addition two ports are routed to the front of the XCPC-9100 Module. Some features of the
switch are listed below:
•Fully integrated 10/100/1000Base-T Gigabit Ethernet
•Switch can be reconfigure to provide special functions such as VLAN
•Fully compliant with IEEE 802.3, 802.3u and 802.3ab standards
•Support for jumbo packets up to 9Kbytes
•Full wire speed on all the ports
•Layer two managed (only certain features are supported contact Xembedded Sales)
The XCPC-9100 is hot swappable per cPCI specification with the Blue LED. The XCPC-9100
has an on board micro-controller that report the FRU information to the BMC. The micro-
controller is also used to do the management of the switch (i.e. such as VLAN configuration,
Mirroring, Rate Limit, etc.). Not all the features of the Layer two managed switch is implement.
Contact Xembedded for the list of features.
- 1 -

Introduction
Figure 1-1 below shows the Architectural of the board.
- 2 -

Introduction
XCPC-9100 as the System controller and Peripheral
The XCPC-9100 utilizes PLX PCI6540 chip for its interface to the cPCI back plane.
The chip is a high performance asynchronous 133MHz, 64-bit PCI-X to PCI-X
bridge. When the module is in the system controller slot the device runs in
transparent P2P bridge. This allows the PrPMC on the Carrier to detect all the
devices that on the cPCI chassis.
When the module is in the Peripheral slot, the device run in non-transparent mode.
The primary side of the device is the Carrier and secondary side of the P2P is
connected to the cPCI back plane. The Primary side which hosts the PrPMC/PMC
can run at a different speed vs. the cPCI backplane. This allows the two clock
domain to be asynchronous. In this mode the PrPMC slot which is configured to be
in the monarch mode (setting is done via the P5 jumper), will configure the Carrier
side. The secondary side of the bridge is configured via the cPCI chassis system
controller.
Carrier Interface to the cPCI back plane
In the system controller slot the carrier driver the clock and all the requests/grants to
the each of the cPCI slots. The Carrier further routes all the cPCI Interrupts to the
Carrier PrPMC. The Carrier can run in cPCI chassis that have +5V or +3.3V PCI
signaling. It can also run in PCI-X cPCI chassis.
In the Peripheral slot the bridge is running in non-transparent mode. This allows the
system controller on the cPCI to configure the secondary side, however the primary
side is configured by the Carrier PrPMC.
In non-transparent mode there are several ways to allow the boot sequencing go
through. First the system controller and the Carrier can boot simultaneously (no
priority is given). The Carrier requests for 16MB window on it’s BAR registers by
default (P5 header, remove pin 1-2 and 11-12). In the second case the Carrier must
boots first and before the system controller is booted. Installing jumpers on P5 pins
1-2 and 11-12 lets the bridge issue PCI retries on the bus till the Carrier PrPMC
release the bridge. Consult the PLX 6540 data book on the registers settings.
XCPC-9100 as the system controller
As the system controller the XCP-9100 will try to operate the PCI in PCI-X mode at
66MHz (if the chassis has the capability). The PCI clock will automatically adjust,
unless the P5 pin 3-4 or 9-10 is set. When jumper 3-4 is installed the cPCI will clock
at max 66MHz in PCI mode. If jumper 9-10 is installed the cPCI bus is forced to run
at 33MHz. The slowest peripheral device on the cPCI will dictate the speed of the
PCI bus. The clock is automatically adjusted unless the jumpers are set to override.
- 3 -

Introduction
Carrier PrPMC/PMC PCI clock speed
The PrPMC/PMC sites of the Carrier run at 133MHz and will adjust their speed
according to the PrPMC/PMC module configuration. If both the PrPMC/PMC sites
are populated with 133MHz capable PrPMC/PMC the carrier adjust it’s speed to
100Mhz. If a single PrPMC/PMC is installed and it can run at 133MHz, the carrier
runs at 133MHz. If both the PrPMC/PMC are installed and one of the PrPMC runs
slower then 133Mhz, the carrier will adjust it’s clock based on the slower clock
speed. The Carrier clock speeds can be modified based on P5 Jumper settings 5-6
and 7-8. If jumper 5-6 is installed the Carrier will run at Max speed of 66MHz. If
jumper 7-8 is installed the Carrier will run at 33MHz regardless of the capabilities of
the PrPMC/PMC.
PrPMc/PCM PCI signaling
The Carrier PrPMC/PMC sites operate at +3.3 PCI signaling. A PrPMC/PMC which
is PCI +5V signaling may damage the Carrier and void the warranty.
Front Panel of the XCPC-9100
Blue LED When the XCPC-9100 is placed in a system with an IPMI BMC module the Hot
Swap features of the XCPC-9100 are fully functional. At power up and during the
insertion the Hot Swap Blue LED comes on and then goes off indicating the board is
ready for PCI transactions. During the removal, the handle has to be open, the OS
(operating system) will detect the open handle and turn the Blue LED on indicating
the module is safe to remove from the system.
Fault LED The Fault LED which his Red indicates the voltage on the Carrier are not stable. If
the Fault LED is not the module is held in reset
Link/Activity There are eight GbE ports from the on-board switch on the carrier. There is a
Link/Activity LED associated for each GbE port on the front panel. The two front
RJ-45 use their integrated LED for Link/Activity. Only one of the LED on each of
the RJ-45 are connected to indicate the Link/Activity. The second LED on the RJ-45
is not connected. The Front panel LED aray shows the Link/Activity for the
remaining 6 ports of the on-board GbE Switch.
Reset Button The reset button in the front of the Carrier will reset the carrier. The reset is
forwarded to the cPCI chassis if the Carrier is in the system controller slot. In the
peripheral slot the reset only reset the two PrPMC/PMC, the Switch Fabric and the
PLX P2P bridge Primary side.
- 4 -

Introduction
Reset out from the PrPMC
The PrPMC can rest the carrier by issuing the Reset out signal. The Carrier takes that
reset and resets the entire module. In the system controller slot this reset is forward
to the chassis.
- 5 -

Introduction
Main Features
Dual 10/100/1000-BaseTX Ethernet to cPCI J3
The XCPC-9100 has two GbE routed to J3 connector interface per PICMIG 2.16 specification from the
on-board switch. The transceivers are fully integrated 10/100/1000BaseT Gigabit Ethernet transceivers.
The 10/100/1000-BaseTX Gigabit Ethernet transceivers feature:
•Fully integrated 10BaseT/100BaseTX and 1000BaseT Gigabit Ethernet
•Fully compliant with IEEE 802.3, 802.3u and 802.3ab standards
•Support for jumbo packets up to 9Kbytes
Dual Port 10/100/1000-BaseTX Ethernet to each PMC site
The XCPC-9100 has a dual port 10/100/1000 Mbit from the on-board switch which
is routed to the PMC J4 (user defined pins). Alternately these signals are routed
through mechanical switches which allow user defined pins to also go to the J5
Connector (for rear transition module access).
Dual 10/100/1000-BaseTX Ethernet to Front
The XCPCI-9100 has dual port 10/100/1000-BaseTX routed to the front. This allows
the module to run as stand alone without having external switches or a 2.16 switch
Fabric in the system.
Layer Two Semi-Managed Switch
The on board switch Fabric is capable of layer two management. Only certain
features are incorporated. The switch can be configured to support Port VLAN
programming, see Chapter 3 for more information. Contact Xembedded for other
types of custom re-configuration.
IPMI FRU The XCPC-9100 uses the NXP LPC2138 micro controller on board for the FRU
information. The micro controller communicates with the BMC via the I2C bus and
follows the cPCI specification. See appendix A for the layout of the FRU file. The
Micro controller also communicates with the GbE switch for it’s management
portion.
NOTE: Please contact Xembedded for the list of features for the Layer two Managed
switch.
PCI Bus interface
The XCPC-9100 uses the PLX-6540 bridge for the PCI bus interface to the cPCI bus.
The bridge has the following features:
•PCI R2.3 capable
•PICMG 2.1 Hot swappable
•PCIX 64-bit, 33MHz to 133Mhz PCI clock speed
•Asynchronous operation across the Primary and Secondary (That is the
Primary and Secondary can run at two different speed)
•10KB FIFO
•As the system controller runs in Transparent mode and as a peripheral runs
in non-transparent mode
- 6 -

Introduction
•Support for 8 Bus Masters
Specifications
The following table is the XCPC-9100 Specifications, showing the recommended
operating conditions.
Condition Recommendation
Compliance PCI R2.3, PICMG 2.0, PICMG 2.1, PICMG 2.16
Air Flow 200LFM with no PrPMC/PMC installed (air flow is
mostly driven by the PrPMC/PMC requirements)
Power 8 Watts while switch running in full wire speed on all
the ports.
Operating Temperature
Storage Temperature
Relative Humidity
Operating Altitude
Non-Operating Altitude
Shock
Vibration
MTBF
Safety:
Design to meet or exceed UL 60950 3rd Ed.; CSA C22.2 No.60950-00; EN60950;
IEC 60950-a
EMC:
Design to meet or exceed FCC 47 CFR Part 15, Class B; CE Mark to
EN55022/EN55024
Warranty: 2 year limited
- 7 -

Introduction
- 8 -

Installation Guide XCPC-9100
Chapter 2
Installation Guide Introduction
As the CPU technology changes rapidly vs the I/O, the XCPC-9100 allows separation of the CPU
from the rest of the I/O subsystem. The XCPC-9100 allows up to two PrPMC/PMC on a carrier.
Customers could choose from a variety of PrPMC that are in the Market and also be able to
changes the CPU by simply replacing the PrPMC with future faster CPUs.
XCPC-9100 Mechanical Description
The XCPC-9100 is single slot 6U cPCI module. The unit follows all the specification of the single
slot cPCI module. Below figure is the front panel I/O:
Figure 2-1 Front Panel of the XCPC-9100
Rear I/O The XCPC-9100 has rear I/O consisting of the following, see Table 1 below.
Signal Connector
PCI 32-bit interface PICMG 2.0 R3.0 J1
PCI 64-bit interface PICMG 2.0 R3.0 J2
cPCI 2.16 Dual 10/100/1000-BaseTX J3
User defined I/O to J5 Per PICMG 2.3 R1.0 J5
IPMI PICMG 2.9 J1 and J2
Table 2-1 XCPC-9100 Rear I/O
8

Installation Guide XCPC-9100
Switches Settings and Locations
The cPCI-9100 has nine switches on board (SW1 and SW9). The settings on switches one to four
allows the routing of the PMC site two J4 (user defined I/O) to go to either the GbE switch or the
J5 connector of the cPCI. Each of the I/O pins from the PMC is routed to two location on a switch.
For example SW1 Pin 16 and Pin 15 is routed to the PMC Site two J4 Pin2. This allows Pin1 and
Pin2 two of the switch to be routed to the GbE Switch Fabric on board or the rear I/O J5.
Figure 2-2 XCPC-9100 Switch Settings.
9

Installation Guide XCPC-9100
Switch Description
SW1 to SW4 SW1 Pin 16 and 15 to PMC I/O Pin 2 Pin 1, 3, 5 and 7 ON (Closed) signal to GbE Switch
PMC Site Two SW1 Pin 14 and 13 to PMC I/O Pin 4 Pin 2, 4, 6 and 8 ON (Closed) signal to cPCI J5
SW1 Pin 12 and 11 to PMC I/O Pin 8 GbE Port one of the PMC
SW1 Pin 10 and 9 to PMC I/O Pin 10
SW2 Pin 16 and 15 to PMC I/O Pin 1 Pin 1, 3, 5 and 7 ON (Closed) signal to GbE Switch
SW2 Pin 14 and 13 to PMC I/O Pin 3 Pin 2, 4, 6 and 8 ON (Closed) signal to cPCI J5
SW2 Pin 12 and 11 to PMC I/O Pin 7 GbE Port one of the PMC
SW2 Pin 10 and 9 to PMC I/O Pin 9
SW3 Pin 16 and 15 to PMC I/O Pin 14 Pin 1, 3, 5 and 7 ON (Closed) signal to GbE Switch
SW3 Pin 14 and 13 to PMC I/O Pin 16 Pin 2, 4, 6 and 8 ON (Closed) signal to cPCI J5
SW3 Pin 12 and 11 to PMC I/O Pin 20 GbE Port one of the PMC
SW3 Pin 10 and 9 to PMC I/O Pin 22
SW4 Pin 16 and 15 to PMC I/O Pin 13 Pin 1, 3, 5 and 7 ON (Closed) signal to GbE Switch
SW4 Pin 14 and 13 to PMC I/O Pin 15 Pin 2, 4, 6 and 8 ON (Closed) signal to cPCI J5
SW4 Pin 12 and 11 to PMC I/O Pin 19 GbE Port one of the PMC
SW4 Pin 10 and 9 to PMC I/O Pin 21
SW5 to SW8 SW5 Pin 16 and 15 to PMC I/O Pin 2 Pin 1, 3, 5 and 7 ON (Closed) signal to GbE Switch
PMC Site One SW5 Pin 14 and 13 to PMC I/O Pin 4 Pin 2, 4, 6 and 8 ON (Closed) signal to cPCI J5
SW5 Pin 12 and 11 to PMC I/O Pin 8 GbE Port one of the PMC
SW1 Pin 10 and 9 to PMC I/O Pin 10
SW2 Pin 16 and 15 to PMC I/O Pin 1 Pin 1, 3, 5 and 7 ON (Closed) signal to GbE Switch
SW2 Pin 14 and 13 to PMC I/O Pin 3 Pin 2, 4, 6 and 8 ON (Closed) signal to cPCI J5
SW2 Pin 12 and 11 to PMC I/O Pin 7 GbE Port one of the PMC
SW2 Pin 10 and 9 to PMC I/O Pin 9
SW3 Pin 16 and 15 to PMC I/O Pin 14 Pin 1, 3, 5 and 7 ON (Closed) signal to GbE Switch
SW3 Pin 14 and 13 to PMC I/O Pin 16 Pin 2, 4, 6 and 8 ON (Closed) signal to cPCI J5
SW3 Pin 12 and 11 to PMC I/O Pin 20 GbE Port one of the PMC
SW3 Pin 10 and 9 to PMC I/O Pin 22
SW4 Pin 16 and 15 to PMC I/O Pin 13 Pin 1, 3, 5 and 7 ON (Closed) signal to GbE Switch
SW4 Pin 14 and 13 to PMC I/O Pin 15 Pin 2, 4, 6 and 8 ON (Closed) signal to cPCI J5
SW4 Pin 12 and 11 to PMC I/O Pin 19 GbE Port one of the PMC
SW4 Pin 10 and 9 to PMC I/O Pin 21
SW9 Factory Settings All Off (Open)
Table 2-2 PMC site Rear I/O switch settings
NOTE: The signal for the PMC I/O J4 should either be routed to the cPCI J5 or to the on board GbE
switch Fabric. For example closing (ON position) for the SW1 Pin1 and Pin2 is not allowed. Depending on
the I/O which is on the PMC, routing to both the cPCI J5 and GbE Ethernet switch may damage the
module.
10

Installation Guide XCPC-9100
XCPC-9100 Installation into rack
The XCPC-9100 can be installed in a standard cPCI 32-bit or 64-bit PCI bus. Also cPCI
2.16 style chassis without a PCI bus interface or 2.16 chassis with the PCI bus interface
could be used. Installation Procedure:
NOTE: Configure the Switch setting SW1 to SW8 according to the PMC module being
installed. Notice the PMC I/O should only route to the on board GbE or the cPCI J5, but not
both. Configure P5 jumper header, depending on the PMC modules being installed.
1. Configure and install the PrPMC/PMC according to the manufacturer’s
suggested installation procedure. Tighten the four screws per PMC.
2. Configure P5 such that only one of the PMCs is running in Monarch Mode.
Only one PMC should be configured as Monarch. If Both PMC is
configured as Monarch the result is unpredictable. However, both PMC
could run as Agent (non-Monarch).
3. With the solder side facing up on the carrier (depending on the chassis),
Slide the XCPC-9100 into the chassis. Press firmly on the board until the
connectors are fully mated. Tighten the front screws ensuring that the
carrier is secured to the backplane.
WARNING: Make sure the front handles are closed firmly or the hot switch which is
integrated in the lower handle may not turn the board on.
4. Installation is complete, power up the board.
Figure 2-3 Typical Installation
11

Installation Guide XCPC-9100
PMC Connectors
There are eight PMC connectors on the carrier. Connectors J21, J22, J23, J24
corresponds to the PMC connectors P1, P2, P3 and P4 for PMC site two.
Connectors J11, J12, J13 and J14 corresponds to the PMC connectors P1, P2,
P3 and P4 for PMC site one.
Table 2-3 Pin out for the J21 and J11.
12

Installation Guide XCPC-9100
Table 2-4 showing pin out of the J22 and J12
13