Z3 Technology Z3-DM8168-PCI-RPS User manual

User Instructions
PCIe H.264 HD Video Daughter Card
PCIe Starter Kit System
Model Name: Z3-DM8168-PCI-RPS (RDK)
DOC-USR-0057-02
Manual Version 2.04.00 RDK
Software Version 2.04.00 RDK
March 24, 2015
Before attempting to connect or operate this product, please read these instructions carefully and save the manual
for future use.
© Copyright Z3 Technology, LLC. This document contains proprietary and confidential information of Z3 Technology,
LLC ("Z3"). This document may not be used, reproduced, disclosed, or disseminated to anyone without the prior
written approval of an authorized representative of Z3.
Z3 Technology, LLC incorporates HDMI® technology. The terms of HDMI and HDMI High-Definition Multimedia Interface, and
the HDMI Logo are trademarks or registered trademarks of HDMI Licensing LLC in the United States and other countries.

Revision History
Version
Date
Change Note
Author
0.00.05
08/24/15
Original Document
RC
2.04.00
03/24/15
Updated document for new release. Added Quick Start Guide, Running
the Encoder/Decoder, Summary of Options, PCI express information,
updated formatting
RC

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TABLE OF CONTENTS
1.0 GENERAL DESCRIPTION..............................................................................................7
2.0 QUICK START GUIDE ............................................................................................... 10
2.1 If You Have Received a System from Z3 with the Software Preloaded................................. 10
2.2 If You Already Have a System from Z3 and Need to Update the Firmware............................ 10
2.3 If You are Ready to Start Development..................................................................... 10
3.0 INCLUDED PARTS LIST ............................................................................................. 11
4.0 FEATURES ........................................................................................................... 11
4.1 Supported Input Resolutions ................................................................................. 11
4.2 Supported Output Resolutions ............................................................................... 11
5.0 UNTARRING AND BUILDING THE SAMPLE CODE................................................................. 12
5.1 Preparing the Linux Environment ........................................................................... 12
5.2 Making the Directories and Running the Make Script..................................................... 12
6.0 CODE OVERVIEW ................................................................................................... 14
6.1 The z3apps/rdk Directory .................................................................................... 14
6.2 Z3 Application Overview...................................................................................... 15
6.3 RDK Documentation ........................................................................................... 16
7.0 RUNNING THE ENCODER .......................................................................................... 19
7.1 Set up the HD Source ......................................................................................... 19
7.2 Connect and Power Up the Z3-DM8168-PCI-RPS........................................................... 19
7.3 Set up the Terminal Window ................................................................................. 20
7.4 Power on the Board ........................................................................................... 21
7.5 Ensure your PC has a Proper IP Address .................................................................... 22
7.6 Run the Web Interface to Configure CH1 .................................................................. 22
7.7 Run VLC to View Stream ...................................................................................... 24
7.8 Streaming RTP ................................................................................................. 25
7.9 Changing the Bitrate Dynamically........................................................................... 27
7.10 Adjusting the UDP TS Rate ................................................................................... 29
7.11 Tuning for Latency............................................................................................. 31
7.12 Running DHCP .................................................................................................. 32
7.13 Using the “Aux TS File” Option.............................................................................. 36
8.0 RUNNING THE DECODER .......................................................................................... 37
8.1 Create a .ts File using the Encoder ......................................................................... 37
8.2 Connect the Output ........................................................................................... 37
8.3 Set Decoder Mode ............................................................................................. 38
8.4Configure Decoder............................................................................................. 39

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9.0 RUNNING THE CODE YOU BUILT ON THE BOARD............................................................... 40
9.1 Method 1: Updating the Image File ........................................................................ 40
9.2 Method 2: Running Your Code through TFTP/NFS ........................................................ 42
9.3 Other Available u-boot Commands .......................................................................... 46
10.0 EXERCISING OTHER FEATURES ................................................................................... 47
10.1 Saving Settings ................................................................................................. 47
10.2 Using the Password Feature.................................................................................. 47
10.3 Running the Command Line Interfaces ..................................................................... 48
11.0 THE PCI EXPRESS INTERFACE ..................................................................................... 49
11.1 PCIe Lanes and Slots .......................................................................................... 49
11.2 PCIe BIOS on the PC ........................................................................................... 49
11.3 The DM816x-MOD-3x PCIe Hardware........................................................................ 50
12.0 SUMMARY OF OPTIONS ............................................................................................ 51
12.1 The System Setup Tab......................................................................................... 51
12.2 The User Presets Tab .......................................................................................... 52
12.3 The Status Tab ................................................................................................. 53
12.4 The MPTS Tab .................................................................................................. 54
12.5 The CH1/CH2 Tab (Encode) .................................................................................. 54
12.6 The CH1/CH2 Tab (Decode) .................................................................................. 59
12.7 Values Appearing at the Bottom of All Tabs................................................................ 60
APPENDIX A: Example of Successful Boot Log ........................................................................ 61
APPENDIX B: Troubleshooting ........................................................................................... 71

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LIST OF FIGURES
Figure 1 The Z3-DM8168-APP-2x..........................................................................................7
Figure 2 The Z3-DM8168-MOD-3x.........................................................................................8
Figure 3 Z3-DM8168-PCI-RPS Block Diagram ............................................................................9
Figure 4 Sample Content of Images Directory after Successful Build ............................................. 13
Figure 5 Connecting the Z3-DM8168-PCI-RPS for Encode ........................................................... 19
Figure 6 Z3-DM8168-PCI-RPS Serial Menu ............................................................................. 21
Figure 7 Z3-DM8168-RPS Web GUI (System Setup Page) ............................................................ 22
Figure 8 Channel 1 Configuration Screen –UDP...................................................................... 23
Figure 9 VLC Open Network Screen for UDP.......................................................................... 24
Figure 10 Example of Z3 Video Streaming to VLC (UDP)............................................................ 24
Figure 11 Channel 1 Configuration Screen –RTP..................................................................... 25
Figure 12 VLC File Open Screen ........................................................................................ 26
Figure 13 Example of Z3 Video Streaming to VLC (RTP) ............................................................ 26
Figure 14 Viewing Bitrate in VLC ....................................................................................... 27
Figure 15 Changing the Bitrate Dynamically.......................................................................... 27
Figure 16 Drop in Bitrate after Dynamic Bitrate Change ........................................................... 28
Figure 17 Status Page Output Showing Lower Bitrate ............................................................... 28
Figure 18 Changing TS Rate ............................................................................................. 29
Figure 19 TS Rate and Lower Bitrate Reflected in VLC ............................................................. 30
Figure 20 Tuning for Various Use Cases................................................................................ 31
Figure 21 The User Presets Tab ......................................................................................... 32
Figure 22 Entering a User Preset Name ............................................................................... 32
Figure 23 Selecting “z3_config1” within the System Setup Tab ................................................... 33
Figure 24 Setting DHCP within z3_config1 ............................................................................ 33
Figure 25 Saving a User Preset.......................................................................................... 33
Figure 26 Reboot Reminder for Changing IP Settings................................................................ 34
Figure 27 Address Change after DHCP Set ............................................................................ 34
Figure 28 ZFinder with Z3-DM8168-PCI-RPS DHCP Address ......................................................... 35
Figure 29 Selecting Z3-DM8168-PCI-RPS w/ DHCP Address in ZFinder ............................................ 35
Figure 30 Web GUI Using DHCP Address ............................................................................... 35
Figure 31 Using the Aux TS File Enable Option ....................................................................... 36
Figure 32 Connecting the Z3-DM8168-PCI-RPS for Decode ......................................................... 37
Figure 33 Changing to Decoder Mode.................................................................................. 38
Figure 34 System Setup in Decoder Mode............................................................................. 38
Figure 35 Decoder Configuration Settings for Decode Example ................................................... 39

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Figure 36 Updating the Device Firmware from the Web Interface ................................................ 40
Figure 37 Updater Screen ............................................................................................... 41
Figure 38 File Selection Screen......................................................................................... 41
Figure 39 Editing u-boot-env-netra-rdk.txt........................................................................... 43
Figure 40 Minicom Terminal Settings .................................................................................. 44
Figure 41 Example of Successful u-boot Configuration ............................................................. 45
Figure 42 Selecting “Set Password”.................................................................................... 47
Figure 43 Changing the Password ...................................................................................... 47
Figure 44 Password Entry Screen....................................................................................... 48

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1.0 GENERAL DESCRIPTION
The Z3-DM8168-PCI-RPS is a set of hardware boards, software tools, and applications designed to enable
the rapid development of media-centric applications. It contains one Z3-DM8168-MOD-3x System on Module
card, one Z3-DM8168-APP-2x application board with PCI Express interface, as well as bundled software
with all of the necessary components for the user to quickly develop their own advanced multimedia,
graphics, and DSP applications.
The Z3-DM8168-APP-2x application board includes one HDMI 1080p60 input, one Component / Analog Audio
input, and one HDMI 1080p60 output. It includes a 2-lane PCIe interface that can plug into a 4-lane or 16-
lane PCIe slot or a 1-lane PCIe slot with open back. This card has been proven on, among other systems, an
ASUS motherboard (model P8H67-M, PRO/CSM, revision 3.0).
In order to make custom hardware and software development easier, the Z3-DM8168-PCI-RPS is designed so
that standalone operation is possible. The system can then be developed and tested independently from
any hosts. This is possible through the DM8168-APP-2x board which contains independent power, serial
console, USB, Ethernet and SATA jacks providing a direct connection to these DM8168 peripherals. Figure 1
below shows the Z3-DM8168-APP-2x and its inputs/outputs.
Figure 1 The Z3-DM8168-APP-2x
HDMI In
On/Off
12V Power
Component/RGB In
HDMI Out
Serial
Ethernet
SATA
USB
89 mm
168 mm

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The Z3-DM816x-MOD-3x is a compact OEM module which supports H.264 High Profile encode/decode at up
to two channels of 1080p at 60 fps (frames per second). The Z3-DM8168-MOD-3x features a unique
expansion interface comprised of five high density connectors providing access to most of the interface
signals available from the DM8168 processor. Figure 2 below shows the Z3-DM8168-MOD-3x System on
Module:
The Z3-DM8168-PCI-RPS software is based on the Linux OS. The kit comes with all of the low-level
resources such as the Linux kernel, u-boot, tool chain and starter file system pre-integrated and
configured. There is no need to port or integrate OS functions, media functions etc. The software bundle
also contains tools to allow the development of high-level applications using hardware-accelerated video
processing, DSP, and graphics. Those customers that license the optional source code package can also
receive source code for Z3’s demonstration applications, providing an ideal starting point for custom
applications.
Additional design services and support are available from Z³ Technology. Please contact Z3 at
http://www.Z3technology.com or e-mail at [e-mail].
Figure 2 The Z3-DM8168-MOD-3x
Serial
68 mm
108 mm
mm

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A block diagram of the Z3-DM8168-PCI-RPS follows:
Figure 3 Z3-DM8168-PCI-RPS Block Diagram

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2.0 QUICK START GUIDE
If You Have Received a System from Z3 with the Software Preloaded
To start working with the encoder, you can skip to Section 7.0, “RUNNING THE ENCODER,”
on page 19. This section describes how to quickly generate a UDP or RTP stream to VLC, how to change
bitrate dynamically, how to adjust the UDP TS rate, how to tune for latency, and how to use DHCP.
Section 8.0, “RUNNING THE DECODER,” on page 37, describes how to use the decoder. If you have any
questions about any GUI parameters you can refer to Section 12.0, “SUMMARY OF OPTIONS,” on page 51.
If You Already Have a System from Z3 and Need to Update the Firmware
You can update the firmware via the web GUI interface by following the instructions in Section 9.1
“Method 1: Updating the Image File ”on page 40.
If You are Ready to Start Development
Details on how to untar and build the code can be found in Section 5.0, UNTARRING AND BUILDING THE
SAMPLE CODE, on page 12. A brief overview of the code itself can be found in Section 6.0, CODE
OVERVIEW, on page 14. Details on how to set up your system to access the code you have built can be
found in Section 9.2, “Method 2: Running Your Code through TFTP/NFS”, on page 42.

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3.0 INCLUDED PARTS LIST
1x Z3-DM8168-MOD-3x + 1x Z3-DM8168-APP-2x
1x 12V 2A Power Supply
1x Serial Cable + 1x Gender Changer
2x HDMI Cables
1x Z3-DM8168-DEB-01 (JTAG Connector) + 1 Cable Strip
1x Z3-DM8168-PCI-RPS Documentation
4.0 FEATURES
Dual channel encode of up to 1080p encode through HDMI and 1080i encode through component
Decode up to 1080p60 through HDMI
Standard Definition encoding for ISDB-T, DVB-H, and other standards
On-board video scaler provides full screen resizing with all resolutions
Outputs RTP or MPEG-2 Transport Stream
DHCP and DNS support
1x USB 2.0 and 1x SATA2 Interface for local storage
Web-based configuration software for user-friendly configuration and control
RS-232 serial port for technical configuration and control
Standalone operation independent of PCIe host for easier development
PCI Express 2-lane add-in card footprint provides high bandwidth communication with a PCI host
Operating Temp: 0 to 40 degrees C at 20-80% relative humidity (non-condensing)
Storage Temp: -40 to 70 degrees C at 20-80% relative humidity (non-condensing)
Measurements: 168 x 89 mm (6.61 x 3.12 in)
Supported Input Resolutions
HDMI: 1080p60, 1080p50, 1080i30, 1080i29.97, 1080i25, 720p60, 720p59.94, 720p50, 576p50,
576i25, 480p60, 480i30, and 480i29.97
Component: 1080p60, 1080p50, 1080i30, 1080i29.97, 1080i25, 720p60, 720p59.94, 720p50, 576p50,
576i25, 480p60, 480i30, and 480i29.97
Supported Output Resolutions
HDMI: 1080p60, 1080i30, 1080i29.97, 1080i25, 1080p60, 1080p59.94, 1080p50,
720p60, 720p59.94, 720p50, 576p50, 480p60

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5.0 UNTARRING AND BUILDING THE SAMPLE CODE
Preparing the Linux Environment
Prior to building the Z3 code, certain modules are required. In Ubuntu 10.x or later, the following
command can be used to get the required modules:
sudo apt-get install bison flex mtd-utils liblzo2-dev uuid-dev zlib1g-dev
libpcre3-dev autoconf autoconf-archive automake automake1.9 automake1.9-doc
libtool libtool-doc
In Fedora, the command would be:
sudo yum install bison flex mtd-utils mtd-utils-ubi lzo-devel libuuid-devel
pcre-devel automake automake17 automake14 autoconf libtool
If you are running a 64-bit OS, it may be necessary to install some 32-bit libraries for the cross-
compiling toolchain. You can determine whether your OS is 64-bit by using the “uname –p”
command. A 64-bit OS will return “x86_64,” while a 32-bit OS will return “i386”, “i586”, or
“i686”.
For 64-bit Ubuntu, you can get the necessary libraries by typing:
# sudo apt-get install ia32-libs
For 64-bit Fedora, you can type:
# sudo yum install glibc.i686
Making the Directories and Running the Make Script
The software provided will allow you to re-create the pre-installed software of the Z3-DM8168-
PCI-RPS starting from the included source code.
On a PC running Linux, create a directory where the released materials are going to be located:
# mkdir /home/z3/z3-netra-rdk
Copy the released tar archive to that directory (note: the name may slightly vary).
# cp SW-7R1-00390-01_DM8168-PCI-RPS-20150323.tar.bz2 /home/z3/z3-netra-rdk
Untar the archive (name of tar file may slightly vary):
# tar -xvjf SW-7R1-00390-01_DM8168-PCI-RPS-20150323.tar.bz2
*Note: Untarring takes 5 to 10 minutes.

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Go into the directory just created and run the build script (directory name may slightly vary):
# cd z3-netra-DM8168-PCI-RPS-20150323
# ./makeall
*Note: Building can take around 30-40 minutes. You will also need to type in the sudo password
a few times.
The outcome of the build process should be newly created image files in the images directory.
You can confirm this by doing the following:
# cd images
# ls -alt
The result should be something like the following. Note that actual filenames, dates, and times
will differ.
Figure 4 Sample Content of Images Directory after Successful Build

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6.0 CODE OVERVIEW
Once you have untarred the code, you will see the following top-level directories:
build-tools Config files and scripts for building the codebase
dvr-rdk A modified version of the TI RDK code
factory Factory testing scripts (the user can disregard these)
filesys The base filesystem for release
kernels Kernel code for release
sysapps Various supporting applications
toolchain The ARM toolchain for building the codebase
u-boot u-boot code for release
z3apps Z3 demo application code and scripts
The Z3 application code that comes with the Z3-DM8168-RPS-RDK is run from the run.sh script in dvr-
rdk/dvr_rdk/bin/ti816x . This code calls the z3_dvr_rdk_demo_mcfw_api.out binary, which initializes and
runs the encoder. This binary is built from the dvr-rdk directory. The code for the binary resides in
z3apps/rdk/rdk_demo. The z3apps/rdk directory is described in more detail in the next section.
The z3apps/rdk Directory
There are 3 main subdirectories: rdk_demo, z3_mcfw_api, and z3
6.1.1 rdk_demo
This directory contains the code for the various modes that Z3’s boards are able to run in. The
encoder setup is done in demo_vcap_vdis.c. The decoder setup is done in demo_vdec_vdis.c. The
passthrough setup is done in demo_vcap_vdis.c.
The file demo_rtptx.c is responsible for setting the output mode of the encoder. Output to file,
rtp, and MPEG2-TS are handled here.
The file demo_mcsenc.c contains the implementation of the command line interface. This can be
run using the following command:
# source /opt/mcsenc/mcsenc.sh

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6.1.2 z3_mcfw_api
This directory contains a modified version of the TI mcfw API (found in dvr-
rdk/dvr_rdk/mcfw/src_linux/mcfw_api) that is tailored to work with Z3’s hardware and use-cases.
The link setup code for Z3’s applications can be found in the usecases directory. The use-case code
is called from ti_vsys.c in the same directory.
6.1.3 z3
This directory contains the base code for rtp tx and rx, as well as the base code for audio capture
and output.
Z3 Application Overview
6.2.1 Application Names and Locations
For encode, there are 2 binaries in the sample code. The first is a menu-based application (this is
what comes up in the serial terminal when the board is powered on). The second is a command line
interface that is more flexible and easier to use from a programming standpoint. The web-based
interface uses the command line interface extensively.
The menu-based application binary can be found at:
/opt/dvr_rdk/ti816x/bin/z3_dvr_rdk_demo_mcfw_api.out
The command line interface binary can be found at:
/opt/dvr_rdk/ti816x/bin/mcfw_mcsenc
6.2.2 Application Options and Arguments
The menu-based application uses an .ini file. This .ini file is built in the script run.sh and stored in
/tmp/encode.ini.
Once called with the .ini file, the menu-based application presents to the user a menu of options.
Most .ini files are geared towards a specific use-case. The easiest way to get a valid .ini file is to
run the script with the settings you want and then copy the generated .ini out of /tmp and save it.
The command line interface for the encoder is set up by running:
# source /opt/mcsenc/mcsenc.sh

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This will present you with an "=" prompt. You can then enter commands to encode. For example:
= encode instance=1 source=HDMI1 dst=rtp://192.168.0.6:5004 audio=off
will start an encode from HDMI1 streaming to 192.168.0.6 at port 5004. You can find an example of
using this in a script at:
$PRJROOT/dvr-rdk/runz3demo.sh
6.2.3 Application Source Code
Application source code is available under a separate license agreement. For customers that have
licensed it, the application source code can be found mainly in:
$PRJROOT/z3apps/rdk/rdk_demo
The top-level file for the menu-driven application is demo.c. The top-level files for the command
line interfaces are demo_mcsenc.c and demo_mcsdec.c.
RDK Documentation
Documentation on the RDK can be found in $PRJROOT/dvr-rdk/dvr_rdk/docs. Below is a list of some
of the major documentation available:
Docs
├── DM81xx_DVR_RDK_Install_Guide.pdf
├── DM81xx_DVR_RDK_MainPage.pdf
├── DM81xx_DVR_RDK_Release_Notes.pdf
├── DM81xx_DVR_RDK_Release_Summary.pdf
├── AppNotes
│├── DM8107_DVR_RDK_DM8107DVR_SchematicChanges_BCH120.pdf
│├── DM8107_DVR_RDK_PowerSavings.pdf
│├── DM8168_DVR_RDK_AVS_User_Guide.pdf
│├── DM81xx_DVR_RDK_960H_Notes.pdf
│├── DM81xx_DVR_RDK_App_Notes_Summary.pdf
│├── DM81xx_DVR_RDK_Audio_Notes.pdf
│├── DM81xx_DVR_RDK_AVSync_Notes.pdf
│├── DM81xx_DVR_RDK_Boot_Logo_and_External_Device.pdf
│├── DM81xx_DVR_RDK_Customer_Display_Resolution.pdf

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│├── DM81xx_DVR_RDK_Debug_Statistics.pdf
│├── DM81xx_DVR_RDK_Display_Output_Configuration.pdf
│├── DM81xx_DVR_RDK_Ethernet_Offload_Driver.pdf
│├── DM81xx_DVR_RDK_External_Video_Device_Configuration.pdf
│├── DM81xx_DVR_RDK_Flash_File_FS.pdf
│├── DM81xx_DVR_RDK_Graphics_Using_FBDev.pdf
│├── DM81xx_DVR_RDK_HDMI_Control_Notes.pdf
│├── DM81xx_DVR_RDK_Memory_Map.pdf
│├── DM81xx_DVR_RDK_Minimal_Root_File_System.pdf
│├── DM81xx_DVR_RDK_Network_Stack_Optimization_Techniques_for_Multichannel_NVR.pdf
│├── DM81xx_DVR_RDK_PLL_Print_Utility.pdf
│├── DM81xx_DVR_RDK_Qt_Installation_Guidelines.pdf
│├── DM81xx_DVR_RDK_SCD_AlgorithmIntegration.pdf
│├── DM81xx_DVR_RDK_Software_OSD_Notes.pdf
│└── DM81xx_DVR_RDK_Software_OSD_Text_Render_Notes.pdf
├── software_manifest.htm
├── TestReports
│├── DM810X_DVRRDK_Test_Report_04.00.00.03.xls
│├── DM814X_DVRRDK_Test_Report_04.00.00.03.xls
│├── DM816X_DVRRDK_Test_Report_04.00.00.03.xls
│└── HDMITestReports
├── Trainings
│└── DVR_RDK_McFW_Link_API_Training.pdf
├── Usecases
│├── DM810x_DVR_RDK_UseCaseGuide_4D1_8CIF_16CIF_DVR.pdf
│├── DM810x_DVR_RDK_UseCaseGuide_Decode_Display.pdf
│├── DM814x_DVR_RDK_UseCaseGuide_4D1_8CIF_16CIF_DVR.pdf
│├── DM814x_DVR_RDK_UseCaseGuide_Decode_Display.pdf
│├── DM816x_DVR_RDK_UseCaseGuide_16D1_DVR.pdf
│├── DM816x_DVR_RDK_UseCaseGuide_32D1_Decode_Display.pdf
│├── DM816x_DVR_RDK_UseCaseGuide_SD_HD_Encode_Card.pdf
│└── DM81xx_DVR_RDK_Interlace_UseCaseGuide.pdf
└── UserGuides
├── DM8168_DVR_RDK_GUI_Guide.pdf

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├── DM816x_FAPLL.xls
├── DM81xx_DVR_RDK_Demo_Guide.pdf
├── DM81xx_DVR_RDK_FAQs.pdf
├── DM81xx_DVR_RDK_IPC_Bits_Out_Host.pdf
├── DM81xx_DVR_RDK_Migration_Guide.pdf
├── DM81xx_DVR_RDK_Overview.pdf
├── DM81xx_DVR_RDK_PSP_Arago.pdf
├── DM81xx_DVR_RDK_SCD_DMVAL_FAQs.pdf
├── DMVAL_API_and_UsersGuide.pdf
├── DVR_RDK_ApiGuide.CHM
└── SCD_TI_API_UsersGuide_v00.50.pdf

CONFIDENTIAL DOC-USR-0057-02
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Z3 Technology, LLC ♦100 N 8th ST, STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
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7.0 RUNNING THE ENCODER
This section gives step-by-step instructions on taking the Z3-DM8168-PCI-RPS and using it to stream 1080p
or 1080i video to VLC running on your PC. In addition to the Z3-DM8168-PCI-RPS, an HD source with HDMI
output and a PC are required.
Set up the HD Source
(1) Select an HD source with HDMI output
-Power on the HD Source
-Connect HDMI to a monitor
-Set the HD Source to 1080i output
-Select content you would like to stream
If you see playback on the monitor, you’ve confirmed the source works.
Connect and Power Up the Z3-DM8168-PCI-RPS
(2) Connect the HDMI source to “HDMI In” of the Z3-DM8168-PCI-RPS:
Figure 5 Connecting the Z3-DM8168-PCI-RPS for Encode
Serial
HDMI In
Ethernet
12V Power

CONFIDENTIAL DOC-USR-0057-02
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Z3 Technology, LLC ♦100 N 8th ST, STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
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(3) Connect an Ethernet cable connected through a hub or router to a PC to “Ethernet” on the Z3-
DM8168-PCI-RPS.
(4) Connect the 12V power supply.
(5) Connect the supplied 2.5mm serial cable and NULL modem adapter to your PC.
Set up the Terminal Window
(6) If you are running from a Windows PC, run TeraTerm. Select “Setup – Serial Port” and set the
following:
Port: Whichever serial port the port is connected to
Baud Rate: 115200
Data: 8-bit
Parity: None
Stop: 1-bit
Flow Control: None
(7) If you are running from Linux, type:
# sudo minicom –s
And then configure by doing the following:
-Select “Serial Port Setup”
-Ensure the right Serial Device is specified (typically “/dev/ttyUSB0”)
-Set option E (“Bps/Par/Bits”) to 115200 8N1
-Press <return>
-Select “Exit”