ZiLOG ZDS-1 Series User manual

ZDS-1Series
Zilog

For Hardware Development
The ZDS-1 Series provide the tools necessary for the designer to easily debug and test 280 and Z80A Micro-
processor-based hardware. Functions normally supplied by many pieces of special purpose design equipment
are integrated in by the ZDS-1 Series Development Systems.
c
As an Emulator the Development System connects
directly to the prototype system and behaves like the 280
or Z80A Microprocessor,only under direct control of the
user, to enable:
Setting or resetting of all registers and RAM memory
locations.
9 Settingor resetting of interrupt controls.
* Single or multiple instruction stepping.
Setting or displayingof
110 Port information.
Start/Stopcontrol of program execution.
As a Logic Analyzer the Development System mon-
itors and stores pertinent CPU bus activity and terminates
program executionin
an orderly manner when user defined
events occur. Some examples are:
Storage of address, data and controlbus information
during each bus transaction.
Storage of only user defined bus transactions; e.g.
Memory read, I/O write.
Suspension of program execution on occurance of a
user defined event.
Display a history of the last n bus events, where n
equals from one through 256 events.
As a ROM1RA.M Simulator the Development System
lends its memory to the user's prototype system with the
memory mapping features.
Memory Mapping allows the user to describe the phys-
ical nature of the memory to be used by the proto-
type system. A memory map is defined by the user to
specify which addresses exist in the prototype and
which addresslocations are to be "borrowed" from
the Development System.
The ZDS-1/40 Development System also permits mem-
ory address to be declared write protected or non-
existent so that if any accessis attempted a break in
program execution will occur.
As a PROM/EPROM Programmer the Development
System provides the functionsnecessaryto write, read, ver-
ify and duplicate PROMS. This is an optional feature pro-
vided by the ZDS/PPB and ZDS/PPB/16PROM Programmer
Option, or ZDS/CIBPrinter and PrologPROM Programmer
Interface.

For Software Development
-
ZDS-1 Series Development Systems provide a standalone microcomputer system utilizing the versatile RIO
-
Operating System for the creation, editing, assembly and debug of the software for the powerful 280 Micro-
-
processor.
The RIO Operating System with relocatable modules and I/O management is a general purpose computing
system with an architecture that is designed to facilitate the development process, provide straight-forward
linkage to various systemsroutines, and enable expansion of system features to meet the particular needs of
individual users.
Features
OS EXECUTIVE
Map requests for operations on logical units to specific
device handling programs.
Commands may be issued to OS from the console or
by an executing program.
Any number of user defined commandsmay be added
to the system.
Command sequencesmay be recorded in files and ex-
ecuted as a group.
ARVANCED ASSEMBLER
Relocatable or absolute object code format.
External Symbol references.
Global Symbol definitions.
Macros and conditional Assembly.
Paged symbol table permits assembly of arbitrarily
large programsin standard memory.
Include directive permits additional files to be merged
into the source program at assemblytime.
LINKER
Assigns absolute addressesto program modules.
Paged work space permits any size of file to be edited.
Automatic backup file creation for protection.
Access to other fdes during edit session.
All edit operations for locating and modifyinglines
within a file are based on character stringmatching.
PROM MONITOR
Low level device handlers for system console and
floppy disc.
Bootstraploader for ease in systeminitialization.
Machine language Debug package.
ZDOSII DISC FILE HANDLING PACKAGE
Allocates all disc space automatically on an "as needed"
basis.
Supports sequential access to file or direct access to
any specific disc address.
TABBING
Supported throughout the system.
Compact storage of tabbed text on disc.
Resolves External references.
Permits overlays or memory gaps.
Producesmemory map and Globaladdress table.
Utilization of a standalone microcomputer permits all program preparation and verificationto take place in the same environ-
ment. Smooth and rapid transition from program input, to assembly and linkage to execution and debugprovide a rapid and in-
expensivesolution for software development.
system languageproceisors.
All software is supplied on floppy diskette media. Each
package comes complete with object software, technical
and user documentation, and instructions for use with the
ZDS-1System.

I
-- -
ZDS-1/40 4 MHz Development System
The ZDS-1/40 provides a powerful standalone development system for use with the 280 or Z80A Micropro-
cessor and associated 4MHz peripheral components. Precise emulation is provided by using two microprocessors,
a Z8OA-CPU which is inserted into the prototype system and a second Z8O-CPU which is internal to the devel-
opment system. This method allows precise emulation up to clock frequencies of
4MHz.
3
While similar in functional capability to the ZDS-1/25 Development System the ZDS-1/40 provides special
features, shown below.
External Z80A-CPU for direct connection to the user's
prototype system.
Precise emulation for systems employing clock rates to
4MHz.
-
Memory mapping and protection in blocks of 1024 bytes.
User memory refresh, even when an emulation is suspend-
:d.
Verification of user clock integrity.
Memory address translation.
- Detection of memory accessesto write protected or non-
existent blocks.
New powerful disc-based debug software.

Features
Z80A-CPU-The 4MHz version of the powerful Z80
micro-processor.
110 Ports-The user may have access to all I/O Ports when
in User Mode and User Clock is selected.
. Main Memory-Capacity of up to 60K bytes on a single
board, allowingmore room for I/O options. Standard
system includes 60K bytes.
Floppy Disc Drives-Each providing for the storage of up
to 300,000 bytes on an inexpensive, removable diskette.
RIO Operating System-With Relocating Assembler, Link-
er, Text Editor and Logical File Structure.
Real-Time Storage Module-Enables the monitoring of
specific address, data and control bus lines during selected
operations, e.g. Memory Read, Memory Write, 110 Read,
110Write.
Breakpoint Module-Enables the monitoring and testing
of specific address, data and control bus states to stop
program execution or to create a scope sync.
Memory Mapper-Enables the user to describe the phys-
ical nature of the memory to be used. The user may util-
ize the memory in the Development System,his own sys-
tem or a combination of both in blocks of 1024bytes.
In addition each block may be assigned properties of be-
ing nonexistent or write protected to aid in the debug
and development of the prototype system.
Memory Address Translator-Is an additional feature
provided with the Memory Mapper. It enables a block
(1024 bytes) of memory in the user system to be phys-
ically located at a different address in the Development
System.
. User Clock Integrity-is verified to insure the clock sup-
plied by the user does not
fall below 250KHz.
Refresh-will always occur even when emulation is sus-
pended, to maintain data integrity if dynamic RAM'S
are employed.
CPU
Standard Z80-CPUand Z80A-CPUEmulator.
Memory
3K bytes ROM/lK bytes static RAM dedicated to system
monitor; 60K bytes generalpurpose
RAM.
System Clock
Crystal controlled at 2.5 MHz
AC Power Requirement
50160 Hz, 115VAC, 200 Watts; optional 230 VAC Pow-
er Supply.
Environmental Characteristics
Operating Temperature: 0' to 50'~.
Physical Characteristics
Two separate chassis. One contains the disk drives and
power supplies, whle the other contains all other ele-
ments.
ApproximateWeights and Dimensions
Apply to both chassis:
Size: 19"W
x 9"H x 15"D
Weight: 35 lbs.
Electrical
Integral Power Suppliesprovide all necessary voltages,
plus
4 amps of +5V (55%)is available in the CPU chassis
for user cards.

ZDS-1/40 Debug Command Package
The ZDS-1/40 Debug Command Package provides powerful disc based software to support the Z80A-CPU
Emulator module. The command repertoire not only includes debug commands for monitoring and analyzing
execution of programs under test, but also includes initialization commands to describe the nature of the mem-
ory storage being utilized. Once the memory configuration has been established, itmay be saved on disc and
reloaded asrequired, thereby eliminating the need
to define the memory configuration prior to each emulation
session. The following list describes the available commands:
MAP Creates amap that describes the physical na- NEXT Providesameans to single step from
1 to n in-
ture of the user's memory address space. This structions. All CPU registers are displayed af-
enables the user to define memory in blocks ter the selected number of instructions has
of
1024 bytes to exist in either the user sys- been executed.
tem or the Development System.In addition,
the properties of each block may be specified Is used to exit the Debug environment and
as either non-existent or write protected. cause the operating system to be loaded and
initialized.
DMAP (Display Map) -Allows the user to display a PORT Enables a single character to be input from
single entry, range of entries or the entire map any selectedport and displayed. The user may
and allows the user to edit the map. then enter a data byte to output to the spec-
ified port.
WRITE Determines whether a break occurs when a
memory write is attempted to an address which PROM Transfersprogram control to the resident De-
has the property of being write protected. bug software contained in the Development
System PROM's.
BREAK Is used to specify when the Real-Time execu-
tion of a user's program
will be terminated. PULSE Is similarto the BREAK command except
The option fieldsof the commandmay estab- that program execution is not suspended. In-
3
lish a break to occur on any combination of stead a Syncpulse is generated. This pulse is
the following events: available as
a sync for external test equipment.
-Address Compare QUIT Is used to enable return from current pro-
-Data Compare or Compare with Mask gram to the calling program.
-Memory Read or Write REGISTER Enables the examination and modification of
-Port Read or Write any or all CPU registers.
DISPLAY
MEMORY
FILL
Is used to display the contents of amemory
location or group of locations. If single bytes
are displayed the user may change the con-
tents of each byte.
Causes a given data string tobe stored in all
SAVE Enables the contents of memory to be copied
onto disc along with the entry address. These
filesmay then be retrievedusing GET com-
mand. The contents are assigned a file name
to permit each of location on the disc.
locationsspecified by the command. SET Enables the sequential storage of data bytes
GET Loads a memory image file from disc and loads intomemory at the address specified by the
its entry addressinto the program counter. user.
Begins execution of the user's program.
An ad- STATUS Displaysthe emulation status, e.g. interrupt
dress may be specifiedfrom which program mode, clock source,break and trace argu-
execution will begin. If the program had pre- ments.
viously terminated execution due to a break,
then the GO command
will restore EMULAT-
OR status and resume execution.
TRACE Allows the user to specify which types of bus
transactions
will be stored in the Real-Time
Storage Module. The user may specifyany
HISTORY Enables the display of the last n events stored one or a combination of the following types
in the Real-TimeStorage Module, where n of operations:
equals from
1 through 256. Data displayed -Memory Reads
will be: -Memory Writes
-Address Bus
(1 6 bits) -Port Reads
-Data Bus
(8 bits) -Port Writes
-Control Bus
(7 bits)
INTERRUPT Providesfor the display, setting and resetting
MODE of the interrupt mode of the emulator (mode
0, 1, 2 or disable).

'FFF
1
ADDRESSES
NON-EXISTENT
DECLARED
MEMORY
NON-EXISTENT
I
WRITE PROTECTED
TO SIMULATE PROMS
I
I
MEMORY
t
- - --
MEMORY
ALLOCATED TO
( USER'SSYSTEM
-- - -
\
MAPPED TO ZDS-1/40
I
4000
3FFF
1
3000
DEVELOPED
'ROTOTYPE MEMORY
(8192 BYTES)
DFFF
ADDRESSES
Development System User's Prototype
Address Space
ZDS-1/40 MEMORY MAPPING
The memory Mappingand Address Translator features The illustration above shows a typical use of the mapping
allow configuration of the memory used during
an emula- feature and the addresstranslation feature. Undeveloped
tion. Memory is divided into blocks, each containing 1024 PROM's are allocated address space in the development sys-
bytes. Under software control, these blocks of memory may tem so that software may be debugged prior to fusingthe
be assigned to be existent
in either the prototype system, PROM's. This area has been assigned properties of being
or the ZDS-1/40 Development System, tobe non-existent write protected to simulate PROM behavior. If a write is
or write protected. attempted, it
will be inhibited and a break dloccur if
This feature allows the allocation of blocks of develop- the "Break-on-Write" option has been selected. Addresses
ment system memory to the prototype system thereby em- 4000-FFFF are non-existent and may be declared as such
ulating PROM programs or utilizing memory addresses not so that any attempted access will also cause a break in pro-
yet developed in the system. gram execution.
The address translator allowsblocks of user memory to
be located around existing software so that resident soft-
ware will remain unaffected.

-
ZDS-1/25 2.5 MHz D, . elopment S, ,tern
The ZDS-1/25 Development System is a low cost standalone development system used with the 280 CPU
for prototype development of systems employing clock rates not exceeding 2.5MHz. This system provides a
standalone microcomputer with dual floppy discs, optional peripherals and interfaces to assist the user in the
software and hardware development activity of a Z80-based system. Two modes of operation are provided to
accomplish this: User Mode and Monitor Mode. In Monitor Mode the system enables the user to utilize the
RIO operating system to develop, edit and modify his software. In User Mode, the system memory and peri-
pheral devices may partially or totally be allocated to the prototype system, with the exception of I/O ports
EQ)Hthrough EFH. This enables the user to execute his program in a real time environment.
Features
6% bytes of RAM memory.
3K PROM Monitor Program with 1K of ded-
icated Monitor Scratch pad area,
ProgrammableHardware Breakpoint Module
enabling the suspension of instruction ex-
ecution at a given address or activity (Mem-
ory or
110). Programmable Real Time Stor-
age Module to store CPU activity (address,
data and control
bus), for up to 256 events,
tomonitor memory or
I/O Port activity.
In-circuitemulator with three foot connec-
tion mble to user system.
Memory mapping todescribe the nature of
the memory used, either user or
ZDS mem-
ory. Mapping occursusing blocks contain-
ing
256 bytes each.
Dual Moppy disc driveshaving a combinedstoragecap-
acity of
600,000 bytes
NO operating systemproviding a combination of a
Text Editor, Assembler, Linker and ZDOSII File Man-
agement System.

Specifications
SYSTEM CHARACTERISTICS :
CPU
Standard Z80-CPU
System Clock
Crystal controlled at 2.5 MHz.
11
0 Megb';tes ROMIlK bytes static RAM dedicated to sys-
tem monitor; 60Kbytes general purpose
RAM.
AC Power Requirement
50160 Hz, 115VAC, 200Watts; optional 230 VAC
Power Supply
Environmental Characteristics
Operating Temperature: 0" to 50°C
Physical Characteristics
Single chassis,containing the disk drives, disk power sup-
plies, and systemlogic.
Approximate weight and dimensions:
Size: 19"W x 9"H x 15"D
Weight: 65lbs.
Electrical
Integral Power Supplies provide all necessaryvoltages,
plus 4 amps
of +5V (f5%) is available for user cards.
DISC DRIVE CHARACTERISTICS:
I Capacity
Unformatted
Per Disk 3.2 megabits
I
Per Track 41.7 Kilobits
Transfer Rate 250 Kilobits/sec
Latency (average) 83ms
Access Time
Track to Track
Average
Settling Time
Head Load Time
Rotational Speed 360 rpm
Recording Density 3200 bpi
(inside track)
Flux Density 6400
fci
Track Density 48 tpi
Physical Sectors 32
Index
Encoding Method
Physical Specifics tions
Environmental Limits
Ambient Temperature = 50" to 100'~.
Relative Humidity
= 20%to 80%
Maximum Wet Bulb
= 78"~.
AC Power Requirements
50160 Hz f 0.5 Hz
100/115VAC Installations
90 to 127V .4A typical
2001230 VAC Installations
180to 253 V .2A typical
DC Voltage Requirements
+24 VDC f 5% 1.3A typical
+ 5 VDC f5% 0.8A typical
- 5 VDC f5% .05A typical
(option
-7 to -16VDC)
Heat Dissipation
245 BTU/hr. typical

1
ZDS-1/25Debug Command Package
may reside in internal or external prototype memory, or a combination of both. Debug commands are contained
The ZDS-1/25 Debug Command Package provides the capability to control, analyze and debug programs whic
h
in 3K of PROM and use 1K of RAM for a "scratchpad" area. The following is a list of the debug commands and 4
their functions:
BREAK Setsan automatic hardware breakpoint into
PORT
Permits examination and/or modification of
the real-time debugmodule. This break can I/O port data.
be on a memory read, memory write,
110
port read, or 110port write. Addresses, data
and data masks can also be specified.A break
from the user program can also be caused by
pressingthe Monitor button on the front pan-
el. In either case, a break causes the state of
the user's CPU to be stored so that execution
PULSE
Is identical to Break except that a pulse is
provided, via a BNC connector, each time
the specifiedcondition occurs, and the pro-
gram continues to execute.Pulse can be used
to synchronize external test equipment.
can be resumed later, Control returns to the
debuglevel.
QUIT
Returns control to the OS level.
COMPARE Mowsthe user to compare blocks of mem-
ory.
REGISTER
Provides access to the Z80-CPUregisters.
They may be displayedin their entirety or
DISPLAY Provides access tomemory locations. These
memory locations may be displayed as a block
or observed one at a time for examination and
modification.
opened one at a time for examination and
change. The register command also allows
the user to display and modify the address
flag and interrupt mode.
FILL Allows the user to store a specified data byte
throughout a range of memory addresses.
SAVE
Stores the RAM image of linked programs
and subroutines on the user's disk.
GET
Transfersfde images formed by the SAVE
SET
Stores data entered from the terminal into
0
command into systemmemory, ready tobe specified or memory locations.
executed by the GO Command.
TRACE Specifies if memory read, memory write, port
Begins execution of the user's program. Ex- read and/or port write conditions are to be
ecution can begin at any specified address,
01
stored in the Real-Time Debug Module during
it can continue from a previous breakpoint. execution of the user's program.
A programmed ormanual break is required
to return control back to the debug level.
INTERRUPT Allows the user to display and modify the
STATUS state of the interrupt enable flip-flop.
HISTORY Is normally issued after a break from a user
program. This instruction lists on the term-
inal the state of the address, data and control
busses of the CPU duringthe execution of up
to
255 bus transactions that occurred in the
user's program just prior to abreak.
JUMP
Transferscontrol to a starting addressof pro-
gram, but the system remains in the Monitor
Mode.
MOVE
Allows the user to transfer a block of mem-
ory of any size from any location to any o-
ther location.
NEXT Executes one or "N" instructions and prints
the contents of the CPU registers after each
instruction.

Mapping Features
;::: V{
3K DEBUG PROM
FOOO
2FFF
MEMORY
ALLOCATED TO
USER'S SYSTEM
I
IFFF
OFFF
MEMORY
ALLOCATEDTO
USERS SYSTEM
I
Development System
Address Space
2FFF
I
I
IFFF
PROTOTYPE
MEMORY
(4086 BYTES)
OFFF
User's
Address Space
ZDS-1/25 MEMORY MAPPING
The Memory Mapping Feature allowsvarious segments
of memory, called blocks, to exist in either the ZDS-1/25
or
in the prototype system. This feature is particularly use-
ful when blocks of the prototype system are composed of
ROM, PROM, or EPROM memory. Using the mapper, the
blocks of ROM, PROM or EPROM may be described toex-
ist in the ZDS-1/25
RAM memory to facilitate debuggingof
user firmware, while the remainder of addressable memory
may be described to exist in the user's prototype system.
Also, the user may choose tomap memory blocks into the
ZDS-1/25 which have not yet been developed in the proto-
type system.
The illustration shown portrays a typical memory map
used in prototype system development.Mapping occurs
using a futedblock length of 256 bytes. The only restriction
tousing the mapping feature is that the memory in the
ZDS-1/25must exist for the associated block being mapped
in the user's prototype system.

Peripheral Equipment
Zilog provides peripheral equipment to enhance the performance of the ZDS systems to get the job done,
ol
The CRT Terminal provides an alphanumeric display con-
taining 1920(80 characterslline
x 24 lines) with attached
keyboard to serve as the system console. Communication
between the terminal and the ZDS-1 SeriesSystem occurs
in a character-by-character mode at transfer rates of 110,
300, 1200,2400,4800or 9600 baud.
Characters per line 80
Lines per display 24
Character set 96character ASCII
Character format 5
x 7 dot matrix
MECHANICAL
TERMINAL
Size 12" high, 17" wide, 15" deep
Weight 35 pounds
KEYBOARD
Size
3" hgh, 17" wide, 8" deep
Weight 5 pounds
ENVIRONMENTAL
OperatingTemperature On to 50°C.
Storage Temperature -3O0to 70°C.
Humidity 0 to 95%non-condensing
ELECTRICAL
Power Consumption 150watts
Domestic Power 105-130 volts; 60Hz
Export Power 105-130,210-260 volts;
50
Hz

ZDSJPrinter Terminal
The ZDSIPrinter provides a low cost, highly reliable character printer for use with the ZDS-I SeriesDevelopment Systems.
This printer features excellent print quality with sharply defined characters. Its small size,mobility and attractive appearance
make it well suited to the laboratory or office environment.
Both upper and lower case characters of the full 96-character set
are impact printed within a
9 x 7 dot matrix to maintain a printing
speed of 120characters per second.
Bidirectional printing allows the printer to develop the
shortest printing path. A readlwrite memory stores up
to 132printable characters that will comprise the
next line, allowing "look ahead" for the next
print position. The result is faster through-
put and increased reliability.
A
Specification
Print Speed 120character/second
(bidirectional)
55 lineslmin. (132 char-
acterslline)
250 lineslmin. (10 char-
acterslline)
CharactersIInch
CharactersILine
LinesIInch Vertical
Paper Width
(Maximum) 15inches
Character Set 96 USASCII
Forms Length Selector
2 Channel VFU
Forms Specification:
Type Continuous fanfold, edge per-
forated
Width
4 variable 4 inches to 15inches
Copies Original and
5 copies
Weight 15lb. single part, 12Ib. with
7 lb. carbon multipart
Thickness 0.003 to 0.020 inches
Ribbon Cartridgewith continuous
loop (0.25" x 15yds.)

Hardware Expansion Options
Zil0g Offers
a variety of hardware expansion features to tailor ZDS-1 Series Development Systems to best
suit the users' microprocessor development needs.
A standard bus interface structure allows the use of modu-
lar boards, each packaged with very high density LSI components for maximum reliability and performance.
In addition, software is provided with standard interface to enable immediate use the interface.
PARALLEL INTERFACE BOARD
The PIB provides abasic parallelinterface between the
ZDS-1 SeriesDevelopment System and external devices pro-
vided by the user. Two Z80-PI0componentsare provided
with supporting logic to give the user
32 bidirectional 110
bits. The card also contains plated through holes for insertion
of a Z80-CTC to provide four counter-timer channels. The
uncommitted PIO's and/or user supplied CTC can be inter-
faced with the system's daisy-chainpriority interrupt struc-
ture. Unused space is provided with 16-pindip locations
(Vcc on pin
16, and GND on pin 8)to allow the addition of
logic at the user's discretion.
A four-bit dip switch enables
I/O port address selection while additional control logic dir-
ectsport transaction with the system bus.
The flexability of the PIBis demonstrated by Ziogin
using it to design our own family of interface boards;
ASPIO, CIB and
RXB.

110 ZDS/ASPIO
AUXILIARY SERIALI/O BOARD
The ASP10 board provides one auxiliary parallel com-
munications interface and one auxiliary serial cornrnunica-
tions interface for the ZDS-I. A parallel interface is designed
for communications with the printer supplied by Zilog. &o
a printer employing the interface characteristics of the Cen-
tronics Model 306C may be used (e.g. Tally Model 1202 or
1602,Wang 200W). A serial interface, utilizing a Universal
Asynchronous, Receiver/Transmitter, is provided to enable
synchronous or asynchronous, full duplex communication
with external devices employing RS-232C interface charac-
teristics. Utility software is provided for the parallel printer
interface and diagnostic (exerciser) software is provided for
the serial interface.
C CENTRONICSINTERFACE BOARD
Two specialized parallel interfaces are provided, one
dedicated tointerface with a Prolog 90Series Prom Program-
mer and the other for a varallel vrinter interface ureviouslv
described under
ASPIO.~U~~I~~~ software is poviied for eich
interface eliminating the need for the user todevelop his
own utilities.

ZDS/ PPB PROM Programmer Board
A PPB is a combination PROM/EPROMprogrammer
board which is designed to handle the programming, read-
ing, duplication and verification of the following:
EPROM's
- 2704 and 2708
BIPOLAR
- 7610,7611,7620,7621,7640and 7641
All programming activity is under direct control of the
software utility program provided.
ZDS/PPB/16 PROM PrsgrBdllajler Board
The PPB/16 is a functional equivalent of the PPB, pre-
viously described, except it is designed to accomodate the
followingtypes:
EPROM's
- 2716
BIPOLAR
- 82327,828181,82813 1

Software Expansion
In addition to the RIO Operating System Zilog provides a broad range of higher level languages to simplify
and accelerate microprocessor software development activity.
BASIC
Zilog's newest Extended BASIC Interpreter sets a new
standard in precision and speed performance for the most
popular microcomputer language. Two versions of the sys-
tem-a version of business BASIC with a 13-digitBDC data
type-and a scientificversion
with the conventional 32-bit
floatingbinary data type-guarantee the optimal mix of
speed and precision for any application from professional
quality business data processing to extensive scientificcal-
culations. In both of these versions, a 16-bitinteger data
type provides compact storage and rapid computation for
status and control variables. Finally, the string data type per-
mits manipulation of variable length text in a uniquely pow-
erful subscripted notation. Both interpreters have extensive
access to disk files through Zilog's ZDOSII disk operating
system.
Internally, the Zilog BASIC Interpreter has advanced the
state of the art in microcomputer language both in its math-
ematical packages and in its method of variable reference.
Transcendentalfunctions suppliedin the Zilog BASIC pack-
age use the powerful technique of rational approximations
tolimit the number of arithmetic operations performed
in
their evaluationwhile guaranteeingaccuracy. The fundamen-
tal arithmetic operations
all use rounding of results rather
than truncation to further enhance system accuracy. The
Interpreter itself maintains all variable referencesin an en-
coded form to eliminate the need for execution time sym-
bol table searches. As a result of these advances, BASIC pro-
vides the convenienceof an interpretive environment, speed
normally not found in an interpreter and random access to
disk files through a sophisticated disk operating system.
FORTRAN N
FORTRAN haslong been accepted as the standard for
scientificprogrammingand is the "native" language of many
part-time programmers. Zilog supports FORTRAN with a
compiler conforming to the ANSI 1966specification. This
level of FORTRANis commonly referred to as FORTRAN
IV.
Full conformance, with the exception of COMPLEX data
types, to the generally accepted ANSI standard insuresthat
accumulated librariesof FORTRAN programs will be im-
mediately usablein the ZDS-1 environment. There is no
need to translate to a special microcomputer language.
Zilog FORTRAN opens the door to the richest traditions
of scientificprogramming in a small, inexpensive environ-
ment.
PLZ is Zilog's own family of system implementationlang-
uages. Designed specifically with the system programmer in
mind, PLZ provides an extremely sophisticated structured
programming environment. Implemented at two separate
languagelevels and in distinct translator packages, PLZ of-
fersa complete solution to microcomputer systemprogram-
mingproblems.
In its highest level, PLZ is a fully block structured lang-
uage with an IF-THEN-ELSEclause, a case selector (actual-
ly implemented in the syntax of the IF statement), block
REPEAT and EXIT statements, procedure references and,
of course, RETURN'S. Data types include BYTE, WORD,
INTEGER,SHORTINTEGER and POINTER as well as
ARRAYS of any type and RECORD'S composed of group-
ings of the various basic types, arrays, or even other records.
At this languagelevel, both an Interpreter and a Compiler
are available. The interpreter provides
a fast and convenient
means of program development and debugging, while the
highly efficient Compiler generates Z80 Object code.
For applications requiring total control of hardware re-
sources,a secondlevel of PLZ provides all the block struc-
turing and control conventions of the full compiler, but
uses assemblylanguage statements rather than compiler level
expressionsand assignments. Thus, it acts as aPLZ compat-
ible structured assembler and produces code which can be
linked directly to modules translated by the compiler.
Regardlessof the scope or complexity of a systems pro-
grammingproblem, PLZ
will provide a simple, elegant, and
complete environment for its solution.

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