Addi-Data ADDIALOG PA 3110 Parts list manual

Technical support:
+49 (0)7223 / 9493-0
Technical description
ADDIALOG PA 3110
Analog input and output channels
9th edition 04/1999

Copyright
All rights reserved. This manual is intended for the manager and its personnel.
No part of this publication may be reproduced or transmitted by any means.
Offences can have penal consequences.
Guarantee and responsibility
Basically are effective our "general terms of delivery and payment". The manager receives them at the
latest with the invoice. Claims for guarantee and responsibility in case of injuries and material
damages are excluded, if they are due to one or some of the following causes:
- if the board has not been used for the intended purpose
- improper installation, operation and maintenance of the board
- if the board has been operated with defective safety devices or with not appropriate or
nonfunctioning safety equipment
- nonobservance of the instructions concerning: transport, storage, inserting the board, use,
limit values, maintenance, device drivers
- altering the board at the user's own initiative
- altering the source files at the user's own initiative
- not checking properly the parts which are subject to wear
- disasters caused by the intrusion of foreign bodies and by influence beyond the user's control.
Licence for ADDI-DATA software products
Read carefully this licence before using the standard software. The right for using this software is
given to the customer, if he/she agrees to the conditions of this licence.
- this software can only be used for configuring ADDI-DATA boards.
- copying the software is forbidden (except for archiving/ saving data and for replacing
defective data carriers).
- deassembling, decompiling, decoding and reverse engineering of the software are forbidden.
- this licence and the software can be transfered to a third party, so far as
this party has purchased a board, declares to agree to all the clauses of this licence contract
and the preceding owner has not kept copies of the software.
Trademarks
Borland C and Turbo Pascal are registered trademarks of Borland International, INC.
Burr-Brown is a registered trademark of Burr-Brown Corporation.
Intel is a registered trademark of Intel Corporation.
AT, IBM, ISA and XT are registered trademarks of International Business Machines Corporation.
Microsoft, MS-DOS, Visual Basic and Windows are registered trademarks of Microsoft Corporation.
The original version of this manual is in German. You can obtain it on request.

i
WARNING
In case of improper handling and if the board is not
used for the purpose it is intended for:
people may be the board, PC and the environment
injured peripheral devices may be may be
damaged polluted
«
««
««
««
««
««
«Protect yourself, others and the environment«
««
««
««
««
««
«
•
••
•Read the yellow safety leaflet carefully !
If this leaflet is not with the documentation , please contact us.
•
••
•Do observe the instructions in the manual !
Make sure that you have not skipped any step. We are not liable for damage
resulting from the improper use of the board.
•
••
•Symbols used
WARNING!
designates a possibly dangerous situation.
If the instructions are ignored the board, PC and/or
peripheral devices may be damaged.
IMPORTANT!
designates hints and other useful information.
•
••
•Do you have any questions?
Our technical support is always glad to help you.

iii
Declaration of Conformity
This declaration is valid for the following product:
ADDIALOG PA 3110
Analog inputs and outputs, 12/14 bits
optically isolated
It is made by
ADDI-DATA GmbH
Meß- und Steuerungstechnik
Dieselstraße 3
D-77833 Ottersweier
in sole responsibility and is valid on the understanding that the product is competently installed,
used and maintained, according to the respective security regulations
as well as to the manufacturer's instructions regarding its intended use.
This declaration states that the product complies with following EC Directives:
l
ll
lEWGRL 336/89 of 3.05.1989
l
ll
lEWGRL 31/92 of 28.04.1992
l
ll
lEWGRL 68/93 of 22.07.1993
This declaration is valid for all units manufactured according to the
manufacturing references listed in the form TD3110.020.
Following norms have been applied to test the product
regarding electromagnetic compatibility:
l
ll
lEN55011/03.91
l
ll
lEN55022/08.94
l
ll
lEN50082-2/03.95
We point out that
lthe conformity and herewith the permission of use expire if the user alters the product
without consulting with the manufacturer.
lnon-skilled users are to have the operational area of the product and the requirements
resulting from it checked prior to putting into operation.
lby using this product in appliances coming under the EC EMC Directive, the user is
to make sure they are conform to its regulations prior to putting into operation.
lby using this product in machines / installations coming under the EU Machine
Directive, the user is to make sure they are conform to its regulations prior to putting
into operation.
A copy of the EMC tests is at your disposal on request.
09 October 1996 Legally valid signature of the manufacturer

Table of contents PA 3110
I
1 INTENDED PURPOSE OF THE BOARD ................................................ 1
1.1 Limits of use.................................................................................................... 2
2 USER.............................................................................................. 3
2.1 Qualification .................................................................................................. 3
2.2 Personal protection........................................................................................ 3
3 HANDLING THE BOARD ................................................................... 4
4 TECHNICAL DATA............................................................................ 5
4.1 Electromagnetic compatibility (EMC).............................................................5
4.2 Physical set-up of the board .......................................................................... 5
4.3 Options........................................................................................................... 6
4.4 Versions.......................................................................................................... 6
4.5 Limit values..................................................................................................... 6
5 SETTINGS ..................................................................................... 10
5.1 Component scheme..................................................................................... 10
5.2 Jumper settings............................................................................................ 11
5.2.1 Jumper location and settings at delivery.............................................................. 11
5.2.2 Jumper settings .................................................................................................... 12
6 INSTALLATION............................................................................... 13
6.1 Base address................................................................................................ 14
6.2 Inserting the board......................................................................................15
6.2.1 Opening the PC.................................................................................................... 15
6.2.2 Selecting a free slot .............................................................................................. 15
6.2.3 Inserting the board................................................................................................ 16
6.2.4 Closing the PC ...................................................................................................... 16
6.3 Installing the software .................................................................................. 17
6.3.1 Software installation under MS-DOS and Windows 3.11 ........................................ 17
6.3.2 Software installation under Windows NT / 95.......................................................... 17
6.4 Board configuration with ADDIREG ............................................................... 18
6.4.1 Program description ............................................................................................. 18
6.4.2 Registering a new board....................................................................................... 21
6.4.3 Changing the registration of a board ................................................................... 22
6.4.4 Removing the ADDIREG program......................................................................... 22
6.4.5 Software downloads from the Internet .................................................................. 23

PA 3110 Table of contents
II
7 CONNECTING THE PERIPHERAL......................................................24
7.1 Connection principle ...................................................................................24
7.2 Connector pin assignment ...........................................................................24
7.3 Connection examples ..................................................................................26
8 FUNCTIONS ..................................................................................28
8.1 Analog output channels ...............................................................................28
8.2 Analog input channels .................................................................................28
8.3 Time-multiplex system ..................................................................................29
9 SOFTWARE EXAMPLES....................................................................31
9.1 Initialisation..................................................................................................31
9.1.1 Initialisation of the PA 3110 under DOS and Windows 3.11....................................31
a) Flow chart......................................................................................................31
b) Example in C for DOS and Windows 3.11......................................................32
9.1.2 Initialisation of the PA 3110 under Windows NT / 95................................................33
a) Flow chart......................................................................................................33
c) Example in C for Windows NT / 95.................................................................34
9.2 Interrupt........................................................................................................35
9.2.1 Interrupt routine under DOS and Windows 3.11 .....................................................35
a) Flow chart for DOS, Windows 3.11 and Windows NT / 95 (asynchronous
mode) ...............................................................................................................35
b) Example in C for DOS and Windows 3.11......................................................36
c) Example in C for Windows NT / 95 (Asynchronous mode)..............................37
d) Flow chart for Windows NT / 95 (synchronous mode).....................................38
e) Example in C for Windows NT / 95 (synchronous mode) ................................39
9.3 Direct conversion of analog inputs ..............................................................40
9.3.1 Testing one analog input .......................................................................................40
a) Flow chart......................................................................................................40
b) Example in C.................................................................................................41
9.3.2 Testing all analog inputs ........................................................................................42
a) Flow chart......................................................................................................42
b) Example in C.................................................................................................43
9.4 Cyclic conversion of the analog inputs........................................................44
9.4.1 Cyclic conversion without DMA and delay ............................................................44
a) Flow chart......................................................................................................44
b) Example in C for DOS ....................................................................................45
c) Example in c for Windows 3.1x ......................................................................46
d) Example in C for Windows NT / 95 (asynchronous mode)..............................47
e) Example in C for Windows NT / 95 (synchronous mode) ................................48

Table of contents PA 3110
III
9.4.2 Cyclic conversion with DMA without delay............................................................ 49
a) Flow chart..................................................................................................... 49
b) Example in C for DOS ................................................................................... 50
c) Example in C for Windows 3.1x.................................................................... 51
d) Example in C for Windows NT / 95 (asynchronous mode)............................. 52
e) Example in C for Windows NT / 95 (synchronous mode) ............................... 53
9.5 Analog output channels ............................................................................... 54
8.5.1 Testing one analog output channel ..................................................................... 54
a) Flow chart..................................................................................................... 54
b) Example in C ................................................................................................ 55
9.5.2 Testing several analog output channels .............................................................. 56
a) Flow chart..................................................................................................... 56
b) Example in C ................................................................................................ 57
9.6 Timer............................................................................................................. 58
9.6.1 Testing the timer interrupt...................................................................................... 58
a) Flow chart..................................................................................................... 58
b) Example in C for DOS ................................................................................... 59
c) Example in C for Windows 3.1x..................................................................... 60
d) Example in C for Windows NT / 95 (asynchronous mode)............................. 61
e) Example in C for Windows NT / 95 (synchronous mode) ............................... 62
9.6.2 Testing the watchdog ........................................................................................... 63
a) Flow chart..................................................................................................... 63
b) example in C................................................................................................ 64
INDEX .................................................................................................. A

Figures and tables PA 3110
V
Figures
Fig. 3-1: Wrong handling.........................................................................................................4
Fig. 3-2: Correct handling.......................................................................................................4
Fig. 5-1: Component scheme..............................................................................................10
Fig. 5-2: Jumper location and settings at delivery ................................................................11
Fig. 6-1: DIP switches.............................................................................................................14
Fig. 6-2: Slot types.................................................................................................................15
Fig. 6-3: Opening the blister pack.........................................................................................15
Fig. 6-4: Inserting the board..................................................................................................16
Fig. 6-5: Securing the board at the back cover....................................................................16
Fig. 6-6: The ADDIREG registration program..........................................................................18
Fig. 6-7: Configuring a new board........................................................................................20
Fig. 7-1: Connection principle ..............................................................................................24
Fig. 7-2: 37-pin SUB-D male connector X20 - Single-ended mode ......................................24
Fig. 7-3: 37-pin SUB-D male connector X20 - differential mode ...........................................25
Fig. 7-4: Screw terminal board PX 901-A and cable ST010...................................................26
Fig. 7-5: Connection in single-ended mode ........................................................................26
Fig. 7-6: Connection in differential mode.............................................................................26
Tables
Table 5-1: Jumper settings....................................................................................................12
Table 6-1: Decoding table ...................................................................................................14
Table 8-1: Direct conversion (software controlled) ................................................................30
Table 8-2: Cyclic conversion (hardware controlled) .............................................................30

Technical description Chapter 1 PA 3110
1
1 INTENDED PURPOSE OF THE BOARD
The PA 3110 board is the interface between an industrial process and a personal
computer (PC).
It is to be used in a free ISA slot. The PC is to comply with the EU directive
89/336/EEC and the specifications for EMC protection.
Products complying with these specifications bear the mark.
Data exchange between the PA 3110 board and the peripheral is to occur through a
shielded cable. It has to be connected to the 37-pin SUB-D male connector of the
PA 3110 board.
The board has up to 16 / 8 input and output channels for processing analog signals.
The PX 901 screw terminal board allows to connect the analog signals through a
shielded cable.
The use of the PA 3110 board in combination with external screw terminal
boards is to occur in a closed switch cabinet; the installation is to be effected
competently.
The connection with our standard cable ST010 complies with the specifications:
- metallized plastic hoods
- shielded cable
- cable shield folded back and firmly screwed to the connector housing.
Uses beyond these specifications are not allowed. The manufacturer is not liable for
any damages which would result from the non-observance of this clause.
The use of the board according to its intended purpose includes observing all advices
given in the Technical description and in the Safety leaflet.

PA 3110 Technical description Chapter 1
2
1.1 Limits of use
Our boards are not to be used for securing emergency stop functions.
The emergency stop functions are to be secured separately.
This securing must not be influenced by the board or the PC.
WARNING!
The EMC tests have been carried out in a specific appliance
configuration. We guarantee these limit values only in this
configuration.
The use of the board in a PC could change the PC features regarding to noise
emission and immunity.
Increased noise emission or decreased noise immunity could result in the system not
being conform anymore.
Check the shielding capacity of the PC housing and of the cable prior to
putting the device into operation.
Make sure that the board remains in the protective blister pack until it is used.
Do not remove or alter the identification numbers of the board.
If you do, the guarantee expires.

Technical description Chapter 2 PA 3110
3
2 USER
2.1 Qualification
Only persons trained in electronics are entitled to perform the following:
•installation,
•use,
•maintenance.
2.2 Personal protection
Consider the country-specific regulations about
•the prevention of accidents
•electrical and mechanical installations
•radio interference suppression.

PA 3110 Technical descriptioin Chapter 3
4
3 HANDLING THE BOARD
Fig. 3-1: Wrong handling
Fig. 3-2: Correct handling

Technical description Chapter 4 PA 3110
5
4 TECHNICAL DATA
4.1 Electromagnetic compatibility (EMC)
The board has been subjected to EMC tests in an accredited laboratory.
The board complies as follows with the limit values set by the norms
EN50082-2, EN55011, EN55022:
True value Set value
ESD................................................................... 8 kV 4 kV
Fields ................................................................ 10 V/m 10 V/m
Burst.................................................................. 4 kV 2 kV
Conducted radio interferences .......................... 10 V 10 V
Noise emissions ................................................ B-class
WARNING!
The EMC tests have been carried out in a specific appliance
configuration. We guarantee these limit values only in this
configuration. 1
Consider the following aspects:
- your test program must be able to detect operation errors.
- your system must be set up so that you can find out what caused errors.
4.2 Physical set-up of the board
The board is assembled on a 4-layer printed circuit card.
Weight: 160 g
Installation in: AT slot
Connection to the peripheral 37-pin SUB-D male connector
Connection to the peripheral through:
- cable with twisted pairs directly to the analog signal transmitters
- our standard cable ST010 to screw terminal board PX 901-AG or PX 901-A
1We transmit our appliance configuration on request.

PA 3110 Technical description Chapter 4
6
4.3 Options
SF, DF: Precision filter for the analog input channels
PC: Precision current inputs 0-20 mA or 4-20 mA
Remark: with a current range of 4-20 mA, the accuracy is altered
4.4 Versions
The board PA 3110 is available in the following versions:
Version Analog input channels Analog output channels
PA3110-8-4 8 SE / 4 Diff.14
PA3110-8-8 8 SE / 4 Diff. 8
PA3110-16-4 16 SE / 8 Diff. 4
PA3110-16-8 16 SE / 8 Diff. 8
4.5 Limit values
Operating temperature: .................................... 0 to 60°C
Storage temperature: ........................................ -25 to 70°C
Relative humidity: ............................................ 30% to 99% non condensing
Minimum PC requirements:
- Operating system: .......................................... MS DOS 3.3 or >
Windows 3.1
- Bus speed: ...................................................... 8 MHz
Energy requirements:
- Operating voltage of the PC: ......................... 5V ±5%
- Current consumption in mA (without load): . typ. See table ±10%
PA3110-8-4 PA3110-8-8 PA3110-16-4 PA3110-16-8
+ 5 V
from the PC
945 1082 1038 1182
1SE: single ended
Diff.: differential

Technical description Chapter 4 PA 3110
7
Analog input channels:
Number of analog input channels: ................... 16/8 SE/diff. for PA 3110-16x
8/4 SE/diff. for PA3110-8x
Analog resolution: ........................................... 14-bit, 1 among 16383
Max. sampling rate (for 1 channel): ................ 100 kHz
Data transfer: ................................................... Data to the PC (16-bit only)
via FIFO memory
1) Through I/O commands
2) Interrupt at EOC1& EOS2
3) DMA transfer at EOC
Start of conversion: .......................................... 1) Trough software trigger
2) TIMER 0
3) TIMER 0 & 1
Monotony: ....................................................... 14-bit
Offset error: ..................................................... After calibration:
- Bipolar: ±1/2 LSB
- Unipolar: ±1/2 LSB
Drift (0°C to 60°C):
- Bipolar: ±2 ppm / °C
- Unipolar: ±2 ppm / °C
Gain error: ........................................................ After calibration:
- Bipolar: ±1/2 LSB
- Unipolar: ±1/2 LSB
Drift (0°C to 60°C):
- Bipolar: ±7 ppm / °C
- Unipolar: ±7 ppm / °C
Analog input ranges: ........................................ Voltage
- Unipolar: 0-10 V
- Bipolar: ±10 V
- Selectable through software
Current
Unipolar: 0-20 mA
Selection of the range 0-10 V
and of gain x2 is necessary
Overvoltage protection: ................................... 20 V at POWER ON
Common mode rejection: ................................ DC up to 10 Hz, 90 dB min.
(Gain = 1)
Band width (-3dB): .......................................... Limited to 159 kHz (-3dB)
with low-pass filter 1st order;
yet the minimum SINAD is still
83 dB at 49 kHz (fin)
Bias currents for each input (multiplexer): ...... ± 2 nA max.
Input impedance (PGA): .................................. 1012 Ω// 20 nF to GND
Integral non-linearity (INL): ............................ ± 1/2 LSB
Differential non-linearity (DNL): .................... ± 1/2 LSB
Precision: ......................................................... ± 1 LSB
1EOC: End of Conversion
2EOS:(= End of Scan ): signals that the acquisition of a group of channels has been completed

PA 3110 Technical description Chapter 4
8
Selectable gain: ................................................ through PGA 1, 2, 5, 10
(selectable by software)
System noise: ................................................... Bipolar: Gain x1:± 1/2 LSB
Gain x2:± 1/2 LSB
Gain x10:± 2 LSB
Unipolar: Gain x1:± 1/2 LSB
Gain x2:± 1/2 LSB
Gain x10:± 2 LSB
Digital coding: ................................................. two's complement
Optical isolation to the PC: .............................. 500 V
Analog output channels:
Resolution: ....................................................... 12-bit
Overvoltage protection: ................................... ± 12 V
Number of output channels: ............................. 4 or 8
Data transfer: .................................................... The board is located in the I/O
address space of the PC.
The values are written on the
board through 16-bit accesses.
The outputs are updated with a
dummy reading on an address
(simultaneous updating of the
output channels).
Settling time at 0,01% FS,
(FS = Full scale)
with 2 kΩand 100 pF load: ............................. - 2.5µs typ. for a 10 V voltage
jump at 25°C
- 10µs typ. for a 10 V voltage
jump above the temperature
range
- 3.5µs typ. for a 20 V voltage
jump at 25°C
- 10 µs typ. for a 20 V voltage
jump above the temperature
range
Output voltage ranges: ..................................... Unipolar: 0-10 V
Bipolar: ±10 V
Digital coding: ................................................. Unipolar: Straight binary coding
Bipolar: Offset binary coding
Output current: ................................................. ± 5 mA max.
Capacitive load: ............................................... 500 pF max.
Short-circuit current: ........................................ ± 25 mA
Integral non-linearity (INL): ............................ ± 1 LSB max. above
the temperature range
Differential non-linearity (DNL): .................... ± 1/2 LSB max. above
the temperature range

Technical description Chapter 4 PA 3110
9
Analog output channels (continued):
Monotony: ....................................................... 12-bit
Offset error: ..................................................... ± 3 mV max. Unipolar
± 20 mV max. Bipolar
Gain error: ........................................................ ± 0.2 % of FSR max.
Galvanic separation to the PC: ........................ 500 VDC min.
Voltage after Reset: ......................................... 0 V or -10V (depending on the
mode, jumper settings, and on the
voltage range)
Watchdog: ........................................................ can be configured by software
through timer2
times of 140 µs up to up to 1174 s
are possible in steps of 70 µs

PA 3110 Technical description Chapter 5
10
5 SETTINGS
5.1 Component scheme
Fig. 5-1: Component scheme

Technical description Chapter 5 PA 3110
11
5.2 Jumper settings
5.2.1 Jumper location and settings at delivery
Fig. 5-2: Jumper location and settings at delivery

PA 3110 Technical description Chapter 5
12
5.2.2 Jumper settings
Table 5-1: Jumper settings
Jumper Settings Functions Settings at delivery
J1
Set
Level after reset - Output channels 5 to 8
0 V (in unipolar mode)
-10 V (in bipolar mode)
Set
Not set
Level after reset - Output channels 5 to 8
5 V (in unipolar mode)
0 V (in bipolar mode)
J6
Set
Level after reset - Output channels 1 to 4
0 V (in unipolar mode)
-10 V (in bipolar mode)
Set
Not set
Level after reset - Output channels 1 to 4
5 V (in unipolar mode)
0 V (in bipolar mode)
J2, 3, 4, 5
A Output voltage range - Channels 5 to 8
Bipolar = ± 10 V
A
B Output voltage range - Channels 5 to 8
Unipolar = 0-10 V
J7, 8, 9, 10
A Output voltage range - Channels 1 to 4
Bipolar = ± 10 V
A
B Output voltage range - Channels 1 to 4
Unipolar = 0-10 V
J12*
A-B
D-E
C-F
Mode selection for the input channels
Single-ended
A-B
D-E
C-F
A-B
E-F
Mode selection for the input channels
Differential
J11*
C-D
E-F
Mode selection for the input channels
Single-ended
C-D
E-F
A-C
D-F
Mode selection for the input channels
Differential
* In the Single-Ended or differential mode, both jumper fields are to be modified.