Aim AMCX429 User manual

Hardware
Manual
V01.13 Rev. A
February 2019
AMCX429
4/8/16/32 Channel ARINC429
PMC Interface Module

AMCX429 Hardware Manual
i
AMCX429
ARINC429 Test and Simulation Module
With 4/8/16/32 channels
for
PMC Interface Modules
V01.13 Rev. A
February 2019
AIM No.
60-12A3x-16-0113-A
60-12A5x-16-0113-A
Hardware
Manual

AMCX429 Hardware Manual
ii
AIM –Gesellschaft für angewandte Informatik und Mikroelektronik mbH
AIM GmbH
Sasbacher Str. 2
D-79111 Freiburg / Germany
Phone [phone]
Fax [phone]
[email protected]
AIM UK Office
Cressex Enterprise Centre, Lincoln Rd.
High Wycombe, Bucks. HP12 3RB / UK
Phone [phone]
Fax [phone]
[email protected]
AIM GmbH –Munich Sales Office
Terofalstr. 23a
D-80689 München / Germany
Phone [phone]
Fax [phone]
[email protected]
AIM USA LLC
Seven Neshaminy Interplex
Suite 211 Trevose, PA 19053
Phone [phone]
Fax [phone]
[email protected]
© AIM GmbH 2019
Notice: The information that is provided in this document is believed to be accurate.
No responsibility is assumed by AIM GmbH for its use. No license or rights are granted
by implication in connection therewith. Specifications are subject to change without
notice.

AMCX429 Hardware Manual
iii
DOCUMENT HISTORY
The following table defines the history of this document.
Version
Cover Date
Created by
Description
V01.00 Rev. A
20.02.2012
M. Mutter
First Released Version
V01.01 Rev. A
04.01.2013
M. Mutter
- Discrete IO description for
AMCX429-4/8/16 corrected
- Power consumption added
- Weight information added
- Cosmetically changes chapter 4/5
V01.10 Rev. A
06.05.2013
M. Mutter
CC conduction cooled version
included
All characteristics are equal to the
standard version unless otherwise
stated
V01.10 Rev. B
13.05.2014
M. Lamp
Wrong AIM USA Tel. No.
V01.11 Rev. A
19.08.2015
B. Schweitzer
Modify Transmitter Technical Data
V01.12 Rev. A
13.01.2017
M. Lamp/
S. Thota
New Layout, Discrete IO description,
add memory volatility page,
Rework technical data with GOST
Variant.
V01.13 Rev. A
01.02.2019
M.Schuessele
Update Power Consumption section

AMCX429 Hardware Manual
iv
THIS PAGE IS INTENTIONALLY LEFT BLANK

AMCX429 Hardware Manual
v
TABLE OF CONTENTS
Section Title Page
1Introduction ............................................................................................................1
1.1 General........................................................................................................................................1
1.2 How This Manual is organized..................................................................................................2
1.3 Applicable Documents ..............................................................................................................2
1.3.1 Industry Documents.................................................................................................................3
1.3.2 Product Specific Documents....................................................................................................3
2Installation ..............................................................................................................5
2.1 Preparation and Precaution for Installation ............................................................................5
2.2 Installation Instructions.............................................................................................................5
2.3 Connecting to Other Devices....................................................................................................8
2.3.1 AMCX429-4/8/16 Front panel Connector Pinout.....................................................................9
2.3.2 AMCX429-32 Front panel Connector Pinout.........................................................................10
3Structure of the AMCX429...................................................................................11
3.1 PCI bus and BIU-I/O FPGA......................................................................................................12
3.1.1 Global RAM Interface and Arbitration....................................................................................12
3.1.2 Boot up...................................................................................................................................12
3.2 Global RAM...............................................................................................................................12
3.3 BIU-Processor (BIP).................................................................................................................12
3.4 ARINC-429 Encoder .................................................................................................................13
3.5 ARINC-429 Decoder .................................................................................................................13
3.6 External Trigger Inputs and Outputs .....................................................................................13
3.7 User Programmable Discrete I/Os..........................................................................................14
3.8 IRIG- and Time Code Section..................................................................................................16
3.8.1 Time Code Encoder/Decoder ................................................................................................16
3.8.2 Time Tag Methods.................................................................................................................16
4Technical Data......................................................................................................17
5Appendix...............................................................................................................21
5.1 Front Connector (Ordering Information) ...............................................................................21
5.2 Rear IO Pin Assignment PMC Connectors............................................................................22
5.3 Certificate of Volatility.............................................................................................................24
6Notes .....................................................................................................................25
6.1 Acronyms..................................................................................................................................25

AMCX429 Hardware Manual
vi
LIST OF TABLES
Table Title Page
Table 2-1: Pin assignment AMCX429-4/8/16.............................................................. 9
Table 2-2: Pin assignment AMCX429-32 ..................................................................10
Table 3-1: IRIG-B: Binary Coded Time Tag...............................................................16
Table 5-1: Rear I/O Connector AMCX429-32............................................................22
Table 5-2: Rear I/O Connector AMCX429-4/8/16......................................................23
LIST OF FIGURES
Figure Title Page
Figure 2-1: Installing an AMCX429 Mezzanine Module.............................................. 6
Figure 2-2: Installing a Conduction Cooled AMCX429-n-CC Mezzanine Module....... 7
Figure 2-3: Front Connector Pin Orientation............................................................... 8
Figure 3-1: Block Diagram of AMCX429....................................................................11
Figure 3-2: GPI/O AMCX429-x circuitry.....................................................................14
Figure 3-3: GPIO Protection with external resistor ....................................................15

1. Introduction
AMCX429 Hardware Manual
1
1 INTRODUCTION
1.1 General
This document comprises the Hardware User’s Manual for the AMCX429-4/8/16/32 PCI
Mezzanine Card, consisting of the AMCX429-4/8/16/32 electronic module. The document
covers the hardware installation, the board connections, and a general description of the
hardware architecture and the technical data of the AMCX429. For programming
information please refer to the according documents listed in the 'Applicable Documents'
section.
The AMCX429 module is a member of AIM's family of advanced PMC-Bus modules for
analysing, simulating, monitoring and testing of avionics data bus systems.
The PMC module is designed to be plugged on either, a host carrier board to adapt to
standard PCI, VME or CPCI busses, or on an embedded host computer with PMC ports.
The AMCX429 provides four, eight, sixteen or thirty-two fully configurable ARINC429
channels whereby the four and eight channel board is an assembly variant of the
AMCX429 sixteen channel board. Each channel can be individually configured by
software as a transmit or receive channel with shared front panel connector outputs and
inputs.
Due to desiderate amount of IO pins, the IRIG Input and Output on AMCX429-32 variant
is only available on Front-IO. The Trigger feature is limited to only one Trigger Output line
on Front panel Connector on AMCX429-32. Trigger Inputs and Discrete IO are not
supported on 32 Channel ARINC mezzanine modules.
The conduction cooled AMCX429-32 version has no Trigger IOs at all due to the limited
pin count of the Rear IO connector.
On transmit channels the AMCX429 acts as an autonomously operating bus traffic
simulator, supporting multiple modes of transmission sequencing. Full error injection
capabilities are available, whereby the error injection is programmable individually for
each channel and label. For a special transmission operating mode the parity bit can be
used alternately as an additional data bit. The rise and fall time of the bus signals are
individually programmable by software for each transmit channel.
For the receive channels the AMCX429 provides an advanced monitor and analyser
function, with unique on-board error detection, triggering and filtering capabilities.
Both functions are available concurrentlyand independent from each other. Thehardware
architecture provides resources to guarantee the performance of one function is not
affected by the current load of other function. The rise and fall time of the bus signals are
individually programmable for each receive channel. To adapt todifferent transmit speeds
the transmission rate can be varied in discrete steps between approximately 90 and
120Kbit on the high speed bus and between 11.5 and 16.0Kbit on the low speed lines.
The discrete steps are global for all channels.

1. Introduction
AMCX429 Hardware Manual
2
The hardware architecture provides ample resources (i.e. processing capability and
memory) to guarantee, that all specified interface functions are available concurrently and
to full performance specifications.
The advanced architecture uses a special processor for the ARINC-429 stream. A
powerful PCI Controller and Memory Arbiter are implemented in a Field Programmable
Gate Array (FPGA). This FPGA supports both, the interface to the application and driver
software tasks running on the host computer and assists the communication for data
transfer. This feature expands the capability of the AMCX429 module to that of a high
level instrument. To fulfil the real-time requirements of a typical avionic type data bus
system, a high performance 32bit RISC processor (BIP) is implemented.
A free wheeling IRIG-B Time code Encoder/Decoder is implemented on the AMCX429 to
satisfy the requirements of 'multi-channel time tag synchronization' on the system level.
The IRIG-B compatible amplitude modulated sine wave output allows the synchronization
of any external module implementing IRIG-B time stamping.
1.2 How This Manual is organized
This AMCX429 Hardware Manual is comprised of the following sections.
Section 1
INTRODUCTION - contains an overview of this manual.
Section 2
INSTALLATION - describes the steps required to install the AMCX429
device and connect the device to other external 429 interfaces, IRIG-B, and
triggers.
Section 3
STRUCTURE OF THE AMCX429 - describes the physical hardware
interfaces on the AMCX429 using a block diagram and a description of each
main component
Section 4
TECHNICAL DATA - describes the technical specification of the AMCX429.
Section 5
APPENDIX - additional Information
1.3 Applicable Documents
The following documents shall be considered to be a part of this document to the extent
that they are referenced herein. In the event of conflict between the documents

1. Introduction
AMCX429 Hardware Manual
3
referenced and the contents of this document, the contents of this document shall have
precedence.
1.3.1 Industry Documents
[1] PCI LOCAL BUS Specification, Revision 3.0
1.3.2 Product Specific Documents
[2] AIM - Reference Manual AMCX429 Application Interface Library
Detailed description of the programming interface between the Host Carrier
board and the on-board driver software.

1. Introduction
AMCX429 Hardware Manual
4
THIS PAGE IS INTENTIONALLY LEFT BLANK

2. Installation
AMCX429 Hardware Manual
5
2 INSTALLATION
2.1 Preparation and Precaution for Installation
The AMCX429 features PCI 32bit / 66MHz bus, therefore, there are no jumpers or
switches on the board that require modification by the user in order to interface to the
PCI bus.
It is recommended to use a wrist strap for any installations. If there is no wrist wrap
available, then touch a metal plate on your system to ground yourself and discharge any
static electricity during the installation work.
2.2 Installation Instructions
The following instructions tell how to install the AMCX429 module in your system.
Please follow the instructions carefully, to avoid any damage on the device.
To Install the Air Cooled AMCX429
1. Shutdown your system and all peripheral devices.
2. Unplug the power cord from the wall outlet. (Inserting or removing modules
with power applied may result in damage to module devices).
3. Remove the system cover to gain access to the system slots.
4. Remove the PMC carrier board from the system slot.
5. Replace the PMC Slot filler panel from the host front panel.
6. Place the AMCX429 mezzanine module on top of the carrier board, with the
PMC connectors on the AMCX429 aligned with the corresponding
Connectors on the carrier board
(see
Figure 2-1: Installing an AMCX429 Mezzanine Module).
Take care for correct size of the Bezel with ESD-gasket on ESD surface in
host front panel, and the correct size of the voltage keying pins.
7. Then connect the PMC connectors smoothly.
8. Align the standoffs on the AMCX429 module with the carrier board. Install
the screws through the holes in the carrier board and the spacers.
Tighten the screws.
9. Install the complete board into its proper card slot. Ensure the module is
seated properly in the backplane connectors. Take care not to damage or
bend connector pins. Secure the board.
10. Replace the cover of your system.
11. Connect the system to the power source. Turn on the power to your
system.

2. Installation
AMCX429 Hardware Manual
6
Figure 2-1: Installing an AMCX429 Mezzanine Module
To Install the Conduction Cooled AMCX429-n-CC
1. Shutdown your system and all peripheral devices.
2. Unplug the power cord from the wall outlet. (Inserting or removing modules with
power applied may result in damage to module devices).
3. Remove the carrier board from the system slot.
4. Place the AMCX429-n-CC mezzanine module on top of the carrier board, with
the PMC connectors on the AMCX429-n-CC aligned with the corresponding
connectors on the carrier board (see Figure 2-2: Installing a Conduction Cooled
AMCX429-n-CC Mezzanine Module). Verify the correct size of the voltage
keying pins if used. Then connect the PMC connectors smoothly.
5. Align the bore holes on the PMC modules with the conduction cooled frame
from carrier board. For best heat transmission between the PMC module and
the conduction cooled frame of the carrier, thermally conductive paste and heat
transfer pads should be used. Tighten the screws (for one PMC module 9
M2.5x6mm and 8 M2x6mm metric screws are necessary) through the holes in
the carrier board.
6. Install the complete board into its proper card slot. Ensure the module is seated
properly in the backplane connectors. Take care not to damage or bend
connector pins. Secure the board and tighten the wedge locks with the screw
close behind the ejectors.
7. Connect the system to the power source. Turn on the power to your system.

2. Installation
AMCX429 Hardware Manual
7
Figure 2-2: Installing a Conduction Cooled AMCX429-n-CC Mezzanine Module

2. Installation
AMCX429 Hardware Manual
8
2.3 Connecting to Other Devices
The front panel connector for the AMCX429 is a standard 68-pin female SCSI connector.
Each Transmit and Receive Channel shares their pins. The front connector is only
available on the non-CC version.
Rear IO Pinning is available in the appendix chapter.
Figure 2-3: Front Connector Pin Orientation
Pin 1
Pin 34
Pin 35
Pin 68

2. Installation
AMCX429 Hardware Manual
9
2.3.1 AMCX429-4/8/16 Front panel Connector Pinout
Pin
No.
Signal
Direction
Type
Pin No.
Signal
Direction
Type
1
TxRx_True_1
Bidir.
35
TxRx_Comp_1
Bidir.
2
TxRx_True_2
Bidir.
36
TxRx_Comp_2
Bidir.
3
TxRx_True_3
Bidir.
37
TxRx_Comp_3
Bidir.
4
TxRx_True_4
Bidir.
38
TxRx_Comp_4
Bidir.
5
TxRx_True_5
Bidir.
39
TxRx_Comp_5
Bidir.
6
TxRx_True_6
Bidir.
40
TxRx_Comp_6
Bidir.
7
TxRx_True_7
Bidir.
41
TxRx_Comp_7
Bidir.
8
TxRx_True_8
Bidir.
42
TxRx_Comp_8
Bidir.
9
TxRx_True_9
Bidir.
43
TxRx_Comp_9
Bidir.
10
TxRx_True_10
Bidir.
44
TxRx_Comp_10
Bidir.
11
TxRx_True_11
Bidir.
45
TxRx_Comp_11
Bidir.
12
TxRx_True_12
Bidir.
46
TxRx_Comp_12
Bidir.
13
TxRx_True_13
Bidir.
47
TxRx_Comp_13
Bidir.
14
TxRx_True_14
Bidir.
48
TxRx_Comp_14
Bidir.
15
TxRx_True_15
Bidir.
49
TxRx_Comp_15
Bidir.
16
TxRx_True_16
Bidir.
50
TxRx_Comp_16
Bidir.
17
GND
OUT
51
GND
OUT
18
Reserved
-
52
Reserved
-
19
Discret_IN_1
IN
53
Discret_IN_2
IN
20
Discret_IN_3
IN
54
Discret_IN_4
IN
21
Discret_IN_5
IN
55
Discret_IN_6
IN
22
Discret_IN_7
IN
56
Discret_IN_8
IN
23
Discret_OUT_1
OUT
57
Discret_OUT_2
OUT
24
Discret_OUT_3
OUT
58
Discret_OUT_4
OUT
25
Discret_OUT_5
OUT
59
Discret_OUT_6
OUT
26
Discret_OUT_7
OUT
60
Discret_OUT_8
OUT
27
Reserved
OUT
61
Reserved
-
28
GND
OUT
62
GND
OUT
29
IRIG_IN
IN
63
IRIG_OUT
OUT
30
TRIGGER_IN_1
IN
64
TRIGGER_OUT_1
OUT
31
TRIGGER_IN_2
IN
65
TRIGGER_OUT_2
OUT
32
TRIGGER_IN_3
IN
66
TRIGGER_OUT_3
OUT
33
TRIGGER_IN_4
IN
67
TRIGGER_OUT_4
OUT
34
Reserved
-
68
Reserved
-
Remark: For the unused channels in the -4 and -8 variant, pins are reserved.
Legend:
Dark red: used with AMCX429-4/8/16
Blue: used with AMCX429-8/16
Green: used with AMCX429-16
Table 2-1: Pin assignment AMCX429-4/8/16

2. Installation
AMCX429 Hardware Manual
10
2.3.2 AMCX429-32 Front panel Connector Pinout
Pin
No.
Signal
Direction
Type
Pin No.
Signal
Direction
Type
1
TxRx_True_1
Bidir.
35
TxRx_Comp_1
Bidir.
2
TxRx_True_2
Bidir.
36
TxRx_Comp_2
Bidir.
3
TxRx_True_3
Bidir.
37
TxRx_Comp_3
Bidir.
4
TxRx_True_4
Bidir.
38
TxRx_Comp_4
Bidir.
5
TxRx_True_5
Bidir.
39
TxRx_Comp_5
Bidir.
6
TxRx_True_6
Bidir.
40
TxRx_Comp_6
Bidir.
7
TxRx_True_7
Bidir.
41
TxRx_Comp_7
Bidir.
8
TxRx_True_8
Bidir.
42
TxRx_Comp_8
Bidir.
9
TxRx_True_9
Bidir.
43
TxRx_Comp_9
Bidir.
10
TxRx_True_10
Bidir.
44
TxRx_Comp_10
Bidir.
11
TxRx_True_11
Bidir.
45
TxRx_Comp_11
Bidir.
12
TxRx_True_12
Bidir.
46
TxRx_Comp_12
Bidir.
13
TxRx_True_13
Bidir.
47
TxRx_Comp_13
Bidir.
14
TxRx_True_14
Bidir.
48
TxRx_Comp_14
Bidir.
15
TxRx_True_15
Bidir.
49
TxRx_Comp_15
Bidir.
16
TxRx_True_16
Bidir.
50
TxRx_Comp_16
Bidir.
17
TxRx_True_30
Bidir.
51
TxRx_Comp_30
Bidir.
18
TxRx_True_31
Bidir.
52
TxRx_Comp_31
Bidir.
19
TxRx_True_17
Bidir.
53
TxRx_Comp_17
Bidir.
20
TxRx_True_18
Bidir.
54
TxRx_Comp_18
Bidir.
21
TxRx_True_19
Bidir.
55
TxRx_Comp_19
Bidir.
22
TxRx_True_20
Bidir.
56
TxRx_Comp_20
Bidir.
23
TxRx_True_21
Bidir.
57
TxRx_Comp_21
Bidir.
24
TxRx_True_22
Bidir.
58
TxRx_Comp_22
Bidir.
25
TxRx_True_23
Bidir.
59
TxRx_Comp_23
Bidir.
26
TxRx_True_24
Bidir.
60
TxRx_Comp_24
Bidir.
27
TxRx_True_29
Bidir.
61
TxRx_Comp_29
Bidir.
28
GND
Pow.
62
TRIGGER_OUT_1
OUT
29
IRIG_IN
IN
63
IRIG_OUT
OUT
30
TxRx_True_25
Bidir.
64
TxRx_Comp_25
Bidir.
31
TxRx_True_26
Bidir.
65
TxRx_Comp_26
Bidir.
32
TxRx_True_27
Bidir.
66
TxRx_Comp_27
Bidir.
33
TxRx_True_28
Bidir.
67
TxRx_Comp_28
Bidir.
34
TxRx_True_32
Bidir.
68
TxRx_Comp_32
Bidir.
Table 2-2: Pin assignment AMCX429-32

3. Structure of the AMCX429
AMCX429 Hardware Manual
11
3 STRUCTURE OF THE AMCX429
The structure of the AMCX429 PCI-Express is shown in Figure 3-1. The AMCX429
comprises the following main sections:
PCI bus and BIU-IO FPGA
Global RAM
BIU Processor Section
Physical I/O Interface with 4/8/16/32 ARINC-429 Channel, Trigger and
Discrete
IRIG- Time Code Processor with Free Wheeling Function and Sine Wave
Output
Boot-Up Flash
Figure 3-1: Block Diagram of AMCX429

3. Structure of the AMCX429
AMCX429 Hardware Manual
12
3.1 PCI bus and BIU-I/O FPGA
The new common FPGA architecture of AIM’s new family of PCI Express based
Mezzanine modules includes both the complete PCI Express bus logic and the BIU
processor logic. The PCI interface connects to a transparent PCIe-to-PCI bridge which
realizes a 32-bit and 66MHz capable PCI upstream port. The programmable device
implements the following features:
PCI Interface compatible with PCI Local Bus Specification (Revision 3.0)
3.3V PMC (5V tolerant IOs), 66MHz, 32bit operation
Global RAM interface and arbitration
Boot function
SPI controller for update programming
ARINC-429 Encoder
ARINC-429 Decoder
IRIG Encoder and decoder support
External Trigger Inputs and Outputs
Up to eight user definable Discrete I/Os
3.1.1 Global RAM Interface and Arbitration
The common FPGA implements a Global RAM arbiter, which controls the Global RAM
access between both participants, the Host through the PCI-Express bus and the BIU
processor.
3.1.2 Boot up
To provide maximum flexibility and upgradeability, the FPGA device and the processor
are booted automatically from dedicated SPI-Flashes after power up.
3.2 Global RAM
The Global RAM is shared between both BIU processors (BIP) and the Host-Card Bus.
The arbitration is handled by the common FPGA. It has access to the common Global
RAM via a 32 bit wide data port.
3.3 BIU-Processor (BIP)
The BIU consists of an ultra-low power, high performance 32bit RISC processor.