Alinco Dj-191 User manual

DJ- 1 9 1

Service Manual

CONTENTS

•SPECIFICATIONS..........................................................2

•CIRCUIT DESCRIPTION...............................................3

•SEMICONDUCTOR DATA...........................................9

•EXPLODED VIEW

..................................................

•PARTS LIST..................................................... 18

•ADJUSTMENT..............................................................21

•P C BOARD VIEW

.............

..........................................2

•CIRCUIT DIAGRAM......................................................41

•BLOCK DIAGRAM 45

SFECIRCATIONS

144Q0O^?ł 995MHz 135 000^ 173-995MHZ

DJ-191E (EuropeanArateur versior) 144000 14® 9£NVz 144 000 — 145 995MHz

DJ-191TA1 (CoomerdaiversonVHR.) 135 000 1550QDNHz 135 000 .173095MHz

DJ-191 TA2(Connmerciai version VHFH) 150000 47399&Л4 135 000 1-73095MHz

Channel Step-. 5 1012515 2) 25,30kHz steps

Memory Channels: 40 Ch annfes4C IteCh anriiè/l emory

Antenna Impédance:

Frequency Stability: 500 unbalanced

± 5 ppm

Microphone Input Impédance: 2k0 nominal.

Signal Type:

Offset Range:

Deviation:

TX Output (supply voltage):

RX Sensitivity:

RX Selectivity:

I.F.:

Power Supply Requirements:

Current Consumption

at 13.8V DC:

Operating Température:

Dimensions:

(with EBP-37N without projections)

Weight:

DTMF:

Subaudible Tones (CTCSS):

F3E (FM)

0 ~ 99.995MHz

± 5kHz max.

1.5W (4.8V) / 3.5W (7.2V) / 5W (9. ~ 13.8V)

12dB SINAD better than - 1 dBц

- dB / ± 12kHz

(Ist) 21.25MHz / (2nd) 450kHz

4.8 ~ 13.8V DC (4.8V DC Standard)

Transmitting: Approx. 1.2 Amp. in High Power

Setting

Receiving: Squelched Approx. 24mA (BS on)

-1 0 ~ + 0°C , 14~140°F

57(W) x 151 (H) x 28(D) mm

21/4(W) x (H) x 1 Vie(D) inches

Approx. 300g

1 Button Keypad, encoder/decoder installed

Encoder installed (50 tones)

CIRCUIT DESCRIPTION

1) Receiver System

1. Front End

2. IF Circuit

3. Demodulator Circuit

4. Audio Circuit

The recei er system is a double superheterodyne system with a 21.7 MHz

first IF and a 450 kHz second IF.

The recei ed signal at any frequency in the 130.00- to 173.995-MHz range

is passed through the low-pass filter (L102, L103, L104, C113, C107, C116,

and C114) and tuning circuit (L112 and D107), and amplified by the RF

amplifier (Q107). The signal from Q107 is then passed through the tuning

circuit (L109, L110, L111, and Varicaps D104, D105 and D106) and

con erted into 21.7 MHz by the mixer (Q106). The tuning circuit, which

consists of L112, L109, Varicaps D107 and D104, L110, L111, Varicaps

D105 and D106, is controlled by the tracking oltage from the CPU so that

it is optimized for the réception frequency. The local signal from the VCO is

passed through the buffer (Q108), and supplied to the source of the mixer

(Q106). The radio uses the lower side of the superheterodyne system.

The mixer mixes the recei ed signal with the local signal to obtain the sum

of and différence between them. The crystal filter (XF101, XF102) selects

21.7 MHz frequency from the results and éliminâtes the signais of the

unwanted frequencies. The first IF amplifier (Q105) then amplifies the

signal of the selected frequency.

After the signal is amplified by the first IF amplifier (Q105), it is input to pin

16 of the demodulator IC (IC104). The second local signal of 21.25 MHz

(shared with PLL IC référencé oscillation), which is oscillated by the internal

oscillation circuit in IC102 and crystal (X101), is input through pin 1 of

IC104. Then, these two signais are mixed by the internal mixer in IC104

and the result is con erted into the second IF signal with a frequency of 450

kHz. The second IF signal is output from pin 3 of IC104 to the ceramic filter

(FL101), where the unwanted frequency band of that signal is eliminated,

and the resulting signal is sent back to the IC104 through pins 5 and 7.

The second IF signal input ia pin 7 is demodulated by the internal limiter

amplifier and quadrature détection circuit in IC104, and output as an audio

signal through pin 9.

The audio signal from pin 9 of IC104 is compensated to the audio

frequency characteristics in the de-emphasis circuit (R162, R161, C172,

C173) and amplified by the AF amplifier (Q109). The signal is then input to

pin 2 of the electronic olume (IC103) for olume adjustment, and output

from pin 1. The adjusted signal is sent to the audio power amplifier (IC105)

through pin 2 to dri e the speaker.

5. Squelch Circuit Part of the audio signal from pin 9 of IC104 is amplified by the noise filter

amplifier consisting of R176, R186, R177, C179, C183, C191, and C194,

and the internai noise amplifier in IC104. The desired noise of the signal is

output through pin 11 of IC104, to be further amplified by the noise amplifier

(Q115). The amplified noise signal is rectified by oltage doubler D109 and

input to pin 4 of CPU (IC5).

2) Transmitter System The audio signal is con erted to an electric signal in either the internai or

external microphone, and input to the microphone amplifier (IC6). IC6

consiste of two operational amplifiers; one amplifier (pins 1, 2, and 3) is

composed of pre-emphasis and IDC circuits and the other (pins 5,6, and 7)

is composed of a splatter filter. The maximum frequency dé iation is

obtained by VR2 and input to the cathode of the aricap of the VCO, to

change the electric capacity in the oscillation circuit. This produces the

frequency modulation.

The transmitted signal is oscillated by the VCO, amplified by the pre-dri e

amplifier (Q102) and dri e amplifier (Q101), and input to the power module

(IC101). The signal is then amplified by the power module (IC101) and led

to the antenna switch (D101) and low-pass filter (L102, L103, L104, C113,

C107, C116, and C114), where unwanted high harmonie wa es are

reduced as needed, and the resulting signal is supplied to the antenna.

3. APC Circuit Part of the transmission power from the low-pass filter is detected by D103,

con erted to DC, and then amplified by a differential amplifier. The output

oltage Controls the bias oltage from pin 2 of the power module (IC101) to

maintain the transmission power constant.

3) PLL Synthesizer Circuit

1. PLL The di iding ratio is obtained by sending data from the CPU (IC5) to pin 2

and sending dock puises to pin 3 of the PLL IC (IC102). The oscillated

signal from the VCO is amplified by the buffer (Q117) and input to pin 6 of

IC102. Each programmable di ider in IC102 di ides the frequency of the

input signal by N according to the frequency data, to generate a

comparison frequency of 5 or 6.25 kHz.

2. Reference Frequency The reference frequency appropriate for the channel steps is obtained by

Circuit di iding the 21.25 MHz référencé oscillation (X101) by 4250 or 3400,

according to the data from the CPU (IC5). When the resulting frequency is

5 kHz, channel steps of 5,10,15,20,25, 30, and 50 kHz are used. When

itis 6.25 kHz, the 12.5 kHz channel step is used.

1. Modulator Circuit

2. Power Amplifier

Circuit

3. Phase Comparator

Circuit The PLL (IC102) uses the reference frequency, 5 or 6.25 kHz. The phase

comparator jn theJC102 compares the phase of the frequency from the

VCO with that of the comparison frequency, 5 or 6.25 kHz, which is

obtained by the internal di ider in IC102.

4. PLL Loop Filter Circuit If a phase différence is found in the phase comparison between the

reference frequency and VCO output frequency, the charge pump output

(pin 8) of IC102 generates a pulse signal, which is con erted to DC oltage

by the PLL loop filter and input to the aricap of the VCO unit for oscillation

frequency control.

5. VCO Circuit A Colpitts oscillation circuit dri en by Q301 directly oscillâtes the desired

frequency. The frequency control oltage determined in the CPU (IC5) and

PLL circuit is input to the Varicaps (D301 and D304). This changes the

oscillation frequency, which is amplified by the VCO buffer (Q302) and

output from the VCO unit.

Note

The oscillation frequency is determined by turning Q301 ON and OFF.

Displayed frequencies Q301

TX: 130.00 -139.995 MHz

RX: 130.00-161.695 MHz OFF

TX: 140.00 -173.995 MHz

RX: 161.70-173.995 MHz ON

4) CPU and Peripheral Circuits

1. LCD Display Circuit

2. Display Lamp Circuit

3. Reset and Backup

Circuits

The CPU turns ON the LCD ia segment and common terminais with 1/3

the duty and 1/3 the bias, at the frame frequency is 85Hz.

When the LAMP key is pressed, “H” is output from pin 45 of CPU (IC5) to

the bases of Q1 and Q12. Q1 and Q12 then turn ON and the LEDs (D1,

D3, D14, D15, D16, and D17) light.

When the power from the DC jack or external battery increases from О V to

2.5 or more, “H" le el reset signal is output from the reset IC (IC2) to pin 35

of the CPU (IC5), causing the CPU to reset. The reset signal, howe er,

waits at C6 and R1010, and does not enter the CPU until the CPU clock

(X1) has stablized. When the external power drops to 3.2 V or below, the

output signal from the backup IC (IC3), which has been input to pin 34 of

the CPU, changes from “H” to “L” le el. The CPU will then be in the backup

state.

4. S(Signal)Meter Circuit The DC potential of pin 13 of IC104 is input to pin 3 of the CPU (IC5),

con erted tropi an analog to a digital signal, and displayed as the S-meter

signal on the LCD.

5. DTMF Encoder

. DTMF Decoder

7. Tone Encoder

The CPU (IC5) is equipped with an internal DTMF encoder. The DTMF

signal is output tram pin 12, thraugh R90 and R91 (tor le el ad justment),

and then through the microphone amplifier (IC6), and is sent to the aricap

of the VCO for modulation. At the same time, the monitoring tone passes

through the AF circuit and is output tram the speaker.

Part of the audio signal demodulated by IC104 is input to pin 1 of DTMF IC

(IC8). The internai signal judging circuit in IC 8 then checks if the signal is

alid or in alid. The judged signal is con erted into a 4-bit code and sent to

pin 29 of IC5.

The CPU (IC5) is equipped with an internal tone encoder. The tone signal

(67.0 to 254.1 Hz) is output from pin 11 of the CPU to the aricap of the

VCO for modulation.

5) CPU Terminal Functions: M382 7M8L (XA0384)

! S Я Я tl П П ES П 8 U П u & u

(ЗОСЗСЗСЗСЗСЗСЗСЗСЗСЭСЭСЗОСЗСЭСЭСЗСЭСЭСЭО

|ЦШШШШШШШПЙППАППЙв000 011)0 0 ’- т - 1 - г

WWWWWWWWÛ.Û.Û.Û.Q.Q.Û.Û.Û.Q.Û.Û.Û.Û.Û.Û.Û.CLQ.a.Û.Û.

tttMItttttttitttttttltltltttl

SEG,

SEG.

SEG,

Vcc

V R£F

AV„

COM,

„

1351-

— В о

IÏ7S 4

----

'о

| l| |2 | |3 ||4 ||5 ||6||7||8||9||iq|1 1||12||13|M |15||16|M |ia |h3i|20||2CT3|M |25||2l^7|№ 9|ß O |

tttlltttttltttltlttttitlttlt!l

о z z z z z z z z < < t f t r o.' £ 2 ś i ? û û ^ V ' ?V V s £

* «с «с «с < < < < < û о Е Е Е Е > > Ж Ф uï г? 3 z z О. OL о. о. а.

*Р1.

-Р Ь

~Р2,

* Р 2,

-Р 2 ,

*Р2,

- Р 2,

■*■ Р2,

* Р 2,

V«

* Xour

-х „

*■ Хсая

-Х си

-RESET

- P7o/INTO

■ Р7,

- Р7г

Р7,

9M ^< Ł ^ S S « n Ł Ł “-2-e.ŁI1-

No. Pin Name Signal I/O Logic Description

1С1 C1 - - -

2VU VL1 IA/D LCD power supply

3P 7/AN7 SMT IA/D S - meter input

4 P /AN SQL I A/D Noise level input for squelch

5P 5/AN5 BAT I A/D Low baftery détection input

P 4/AN4 BP5 I A/D Band plan 5

7P 3/CLK22/AN3 BP4 I - Band plan 4

8P 2/CLK21/AN2 UL IActive high PLL unlock signal input

gP 1/SOUT2/AN1 BP1.2 I A/D Band plans 1 and 2

10 P 0/SIN2/AN0 MONI I Active low Monitor key input

иP57/ADT/DA2 стоит 0 D/A CTCSS tone output

12 P5 /AD1 DTOUT 0 D/A DTMF output

13 P55/CNTR1 TSQD IActive low CTCSS tone détection input/Trunking board détection

14 P54/CNTR0 BEP 0 Puise Веер tone output/Band plan 3

15 P53/RTP1 STB2 I/O Active low/pulse CTCSS unit detection/Strobe signal to CTCSS unit/Strobe signal to trunking board/Audio line contrai

1 P52/RTP0 MUTE I/O Active high Microphone mute/Bank change input while trunking

17 P51/PWM1 CLK 0 Puise Serial clock output for PLL, CTCSS, and trunking board

18 P50/PWM0 DATA 0 Puise Serial data output for PLL, CTCSS, and trunking board

19 P47/SRDY1 ACK I/O Puise Clock output for DTMF shift out/Band pian

20 P4 /SCLK1 STB1 0 Puise Strobe for PLL IC

21 P45/TXD1 UTX O Puise UART data transmission output

22 P44/RXD1 URX IPuise UART data réception input

23 P43M/TOUT TBST O Puise Tone burst (1750Hz) output (European version)

24 P42/iNT2 RE2 I Active low Rotary encoder input

25 P41/INT1 RE1 I Active low

2 P40 PTT IActive high PTT input

27 P77 DSW OActive low DTMF IC ON/OFF

28 P7 STD I/O Active high DTMF signal détection input during reception/Deviation adjustment during transmission

29 P75 DSD I Pulse Decoded DTMF serial data input during reception/Deviation adjustment during transmission

30 P74 T3C O Active low TX power ON/OFF output

31 P73 P3C O Active low PLL power ON/OFF output

32 P72 AFP O Active low AFAMP power ON/OFF output

33 P71 R3C O Active low RX power ON/OFF output

34 P70/INTO BU 1Active low Backup signal détection input

35 RESET RST 1 Active low Reset input

3 XCIN XCIN - - -

37 XCOUNT XCOUT - - -

38 XIN XIN - - Main dock input

39 XOUT XOUT - - Main clock output

40 VSS GND - - CPU ground

41 P27 PSW 1 Active low Power switch input

42 P2 SCL O Puise Serial dock for EEPROM

43 P25 C3C O Active high C3 power ON/OFF output

44 P24 SDA O Pulse Serial data for EEPROM

45 P23 LMP OActive high Lamp ON/OFF

4 P22 T/KEY 1 Active low Tone burst/LPTT input

47 P21 KOO I/O - ' Key matrix output/Band pian BP7 input

48 P20 K01 O -Key matrix output

49 P17 K02 O -

50 P1 K03 O -

No. Pin Name Signal I/O Logic Description

51 P15/SEG39 F/KEY I Active low Function key input

52 P14/SEG38 K10 I-

53 P13/SEG37 K11 I -

54 P12/SEG3 K12 I -Key matrix input

55 P11/SEG35 K13 I-

5 P10/SEG34 K14 I -

57 P07/SEG33 SFT 0-VCO frequency range change

58 P0 /SEG32 SD 0 Active low Signal détection output

59 P05/SEG31 AFC 0 Active high AF tone control output

0 P04/SEG30 DA4 0-

1 P03/SEG29 DA3 0 -

2 P02/SEG28 DA2 0-DA Converter for electronic volume and output power

3 P01/SEG27 DA1 0-

4 P00/SEG2 DAO 0 -

5 P37/SEG25 S25 0-

P3 /SEG24 S24 0-

7 P35/SEG23 S23 0 -

8 P34/SEG22 S22 0-

9 P33/SEG21 S21 0-

70 P32/SEG20 S20 0 -

71 P31/SEG19 S19 0 -

72 P30/SEG18 S18 0-

73 SEG17 S17 0-

74 SEG1 S1 0-

75 SEG15 S15 0-

7 SEG14 S14 0-

78 SEG13

SEG12 S13

S12 0

0_LCD segment signal

79 SEG11 S11 0-

80 SEG10 S10 0 -

81 SEG9 S9 0-

82 SEG8 S8 0-

83 SEG7 S7 0-

84 SEG S 0-

85 SEG5 S5 0-

8 SEG4 S4 0-

87 SEG3 S3 0-

88 SEG2 S2 0-

89 SEG1 S1 0 -

90 SEGO SO 0 -

91 VCC VDD --CPU power terminal

92 VREF VREF - -AD Converter power supply

93 AVSS AVSS --AD Converter ground

94 COM3 COM3 -- -

95 COM2 COM2 0-LCD COM2 output

9 COM1 COM1 0-LCD COM1 output

97 COMO COMO 0 -LCD COMO output

98 VL3 VL3 I- LCD power supply

99 VL2 VL2 I - LCD power supply

100 C2 I---

ADJUSTMENT

1) Required Test Equipment

The following items are required to adjust radio Parameters:

1. Regulated power

supply Supply oltage:

Current: 5-14VDC

3 A or more

2. Digital multimeter Voltage range:

Current:

Input résistance:

FS = Approx. 20 V

10Aor more

High impédance

3. Oscilloscope Measurable frequency: Audio frequency

4. Audio dummy load Impédance:

Dissipation:

Jack:

8 Q

1 W or more

3.5 mm ф

5. SSG Output frequency:

Output le el:

Modulation:

200 MHz or more

-20 dB/0.1 [i V - 120dB/1 V

AM/FM

. Spectrum Analyzer

7. Power meter

8. Audio volmeter

9. Audio generator

Measuring range:

Measurable frequency:

Impédance:

Measuring range:

Measurable frequency:

Sensiti ity:

Output frequency:

Output impédance:

Up to 2 GHz or more

Up to 200 MHz

50 Q , unbalanced

0.1 W-10W

Upto 100 kHz

1 mVto 10 V

67 Hzto 10 kHz

600 О , unbalanced

10. Distortion meter

/SINAD meter Measurable frequency: 1 kHz

Input le el: Up to 40 dB

Distortion le el: 1 % -100 %

11. Frequency counter Measurable frequency: Up to 200 MHz

Measurable stability: Approx. +/-0.1 ppm

12. Linear detector Measurable frequency: Up to 200 MHz

Characteristics: Flat

CN: 60 dB or more

Note

■ Standard modulation: 1 kHz +/-3.5 kHz/DEV

a Reference sensiti ity: 12 dB SINAD

■ Specified audio output le el: 200 mW at 8 Q

■ Standard audio output le el: 50 mW at 8 Q

■ Use an RF cable (3D2W: 1 m) for test equipment.

a Attach a fuse to the RF test equipment.

a All SSG Outputs are indicated by EMF.

a Supply oltage for the transcei er: 13.8 VDC

The DJ - 191 does not require a ser iceperson to manipulate the compo-

nents on thp printed - circuit board, except the trimmer when adjusting

reference frequency and dé iation. Most of the adjustments for the

transcei er are made by using the keys on it whiie the unit is in the

adjustment mode. Because the adjustment mode temporarily uses the

channels, frequency must be set on each channel before adjustments can

be made. For instructions on how to program the channels, see the “DJ-

191 INSTRUCTION MANUAL” which came with the product. In consid

ération of the radio en ironment, the frequency on each channel must be

near the alue (+/- 1 MHz) listed in the table below. To enter the

adjustment mode, turn the power off, hold down both the UP and DOWN

keys, and press the POWER key. “chEc" appears on the LCD for about

two seconds, and “C” appears indicating the unit is in the adjustment mode.

Channel frequencies used In the adjustment mode

Channel Channel function Frequency

1 Reference frequency adjustment 145 MHz

2High power adjustment 145 MHz

3Low power adjustment 145 MHz

4Minimum frequency sensiti ity adjustment 130 MHz

5Medium frequency sensiti ity adjustment 145 MHz

6Maximum frequency sensiti ity adjustment 173 MHz

7S-meter (1) adjustment 145 MHz

8S-meter (FÜLL) adjustment 145 MHz

9De iation 145 MHz

10 DTMF (1) test 145 MHz

11 DTMF (D) test 145 MHz

12 Tone 67 Hz test 145 MHz

13 Tone 88.5 Hz test 145 MHz

14 Tone 250.3 Hz test 145 MHz

15 Tone burst test 145 MHz

16 Aging (Not required to use) 145 MHZ

20 VCO frequency shift change (Do not change). -

Caution

■ Do not press the ( UP ) or (DOWN) key while channel 2 0 is selected in

the adjustment mode. Otherwise, the VCO switch frequency will change,

causing a malfunction.

Reference Frequency

Adjustment

High Power Adjustment

Low Power Adjustment

Minimum Frequency

Sensitivity Adjustment

Medium Frequency

Sensitivity Adjustment

Maximum Frequency

Sensitivity Adjustment

1. ln the adjustment mode, select channel 1 by rotating the main tuning

dial.

2. Press the ( PTT,) key to start transmission.

3. Rotate TC101 on the RF circuit board until the alue on the frequency

counter matches the one displayed on the LCD.

1. In the adjustment mode, select channel 2 by rotating the main tuning

dial.

2. Hold down the ( F ) key and press the ( H/L ) key to enter the high

power mode (“L" at the lower-left of the display disappears).

3. Hold down the ( PTT ) key to start transmission.

4. While watching the reading of the TX power meter, set the output

power to the alue closest to 5 W by using the ( UP ) and (DOWN)

keys.

5. When the ( PTT ) key is released, the output power at that time will be

stored as the high power setting.

1. In the adjustment mode, select channel 3 by rotating the main tuning

dial.

2. Hold down the ( F ) key and press the ( H/L ) key to enter the low

power mode (“L” appears at the lower-left of the display).

3. Hold down the ( PTT ) key to start transmission.

4. While watching the reading of the TX power meter, set the output

power to the alue closest to 0.5 W by using the ( UP ) and (DOWN)

keys.

5. When the ( PTT ) key is released, the output power at that time will be

stored as the low power setting.

See “Note on Adjusting the Sensiti ity“ later in this section.

1. In the adjustment mode, select channel 4 by rotating the main tuning

dial.

2. Using the ( UP ) and (DOWN) key, set the minimum frequency

sensiti ity.

See “Note on Adjusting the Sensiti ity” later in this section.

1. In the adjustment mode, select channel 5 by rotating the main tuning

dial.

2. Using the ( UP ) and (DOWN) key, set the medium frequency

sensiti ity.

See “Note on Adjusting the Sensiti ity” later in this section.

1. In the adjustment mode, select channel 6 by rotating the main tuning

dial.

2. Using the ( UP ) and (DOWN) key, set the maximum frequency

sensiti ity.

S-meter (1) Adjustment

S-meter (FÜLL)

Adjustment

Deviation

DTMF (1) Test

DTMF(D) Test

Tone 7 Hz Test

Tone 88.5 Hz Test

1. In the adjustment mode, select channel 7 by rotating the main tuning

dial. The S-meter will show a single star ( ★ ).

2. Enter “0\dB д (EMF) with the transcei er tester.

3. Press the (DOWN) key. The transcei er beeps indicating the new

setting has been stored successfully.

1. In the adjustment mode, select channel 8 by rotating the main tuning

dial. The S-meter will show ail six stars ( ★ ★ ★ ★ ★ О).

2. Enter “+20” dB д (EMF) with the transcei er tester.

3. Press the (DOWN) key. The transcei er beeps indicating the new

setting has been stored successfully.

1. In the adjustment mode, select channel 9 by rotating the main tuning

dial.

2. Input a 50 mVrms, 1 KMz signal with your transcei er tester through

the external microphone jack.

3. With the tester, put the transcei er in the transmission mode.

4. Rotate the VR2 on the printed - circuit board of the transcei er until the

dé iation is set to 4.5 KHz.

This function is only for checking the DTMF code, not adjusting it.

1. In the adjustment mode, select channel 10 by rotating the main tuning

dial.

2. Press the ( PTT ) key. DTMF code “1” is automatically sent and you

will hear the monitoring tone from the speaker.