Alto DIGAN2.7 User manual

www.altoproaudio.com
Version 1.0
MODEL:DIGAN2.7

CONTENT
1. Introduction…………………………………………………………………….1
2. Specification…………………………………………………………………...2
3. Block Diagram…………………………………………………………………3
4. Schematic Diagram…………………………………………………………...4
5. Wiring Diagram………………………………………………………………...9
6. PCB Layout……………………………………………………………………10
7. Test Procedure………………………………………………………………..17
8. Exploded View & Mechanical Parts List………………………………….20
9. BOM……………………………………………………………………………..22

1. Introduction
1. Digital control and DSP technology with graphic display 7 bands Graphic or
Parametric equalization.
2. Dynamic range processing with Ratio, Threshold, Attack and Release time
control.
3. Tone adjustment with Bass and Treble control.
4. 100 presets: 30 factory presets and 70 user-programmable presets.
5. 32x24 bit DSP processing with 48KHz sampling rate.
6. Stereo channels processing with or without link control.
7. +/- 12 dB boost/cut for every bands adjustment.
8. Master volume control.
9. EQ Bypass function support.
10. USB control interface for easy operating with PC editor.
11. 2 unbalanced 1/4” TRS jacks.
1

Bandwidth 20Hz-20kHz
THD+N% 0.015%, Analog In to Analog Out
Signal to noise ratio 90dB A-Weighted, Analog In to Analog Out
Input gain +/-12dB
Output gain +/-6dB
System Parametric
Preset Factory preset: 30, User preset: 70
Inputs Two 1/4" TRS connectors
Input impedance Balanced 50Kohm, Unbalanced 25Kohm
Input section
Input level Maximum Input Level: +16dBu
Outputs Two 1/4"TRS connectors
Output impedance Balanced 120ohm, Unbalanced 60ohm
Output section
Output level Maximum Output Level: +16dBu
USB serial port USB1.1
Input voltage 9 Volt AC Power TransformerPower supply
(AC/AC adapter) Power consumption 6W
Dimension(W×D×H) 261×150×44mmPhysical
Net weight 2.67Ibs(1.21kg)
2
2. Technical Specification
Band 2×7 bands, 4/3octave

Hardware:
(1)Front panel : LED , UP/DOWN , LINK/EXIT,BYPASS
(2)DSP board : TAS3004+MCU(motorola)+EEPROM
Wiring Block Digram :
DSP F r o n t P a n e l
DIGAN 2.7 Surface Digram:
(The LED panel can display the Gain value of each BAND and the setting)
TAS3004
MCU
EEPROM
LED
KEY
2/6
3. Block Digram
3

1 2 3 4 5 6 7 8
A B C D
87654321
D C B A
R39 47R R40 47R
Q18
BR
R41 47R R42 47R R43 47R R44 47R R45 47R R46 47R R47 47R R48 47R R49 47R R50 47R R51 47R
R9 4K7 R10 4K7 R11 4K7 R12 4K7 R13 4K7 R14 4K7 R15 4K7 R16 4K7 R17 4K7 R18 4K7 R19 4K7 R20 4K7 R21 4K7
CA0 CA1 CA2 CA3 CA4 CA5 CA6 CA7 CA8 CA9 CA10 CA11 CA12 CA13 CA14 CA15
L53 YEL L55 YEL L57 YEL L59 YEL L61 YEL L63 YEL L65 GR L67 YEL
RA9
L69 YEL L71 YEL L73 YEL L75 YEL L77 YEL
RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8 RA10 RA11 RA12
L54 YEL L56 YEL L58 YEL L60 YEL L62 YEL L64 YEL L66 GR L68 YEL L70 YEL L72 YEL L74 YEL L76 YEL L78 YEL
RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8 RA9 RA10 RA11 RA12
L79 YEL L81 YEL L83 YEL L85 YEL L87 YEL L89 YEL L91 GR L93 YEL L95 YEL L97 YEL L99 YEL L101 YEL L103 YEL
RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8 RA9 RA10 RA11 RA12
L80 YEL L82 YEL L84 YEL L86 YEL L88 YEL L90 YEL L92 GR L94 YEL L96 YEL L98 YEL L100 YEL L102 YEL L104 YEL
RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8 RA9 RA10 RA11 RA12
L105 YEL L106 YEL L107 YEL L108 YEL L109 YEL L110 YEL L111 GR L112 YEL L113 YEL L114 YEL L115 YEL L116 YEL L117 YEL
RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8 RA9 RA10 RA11 RA12
L118 YEL L120 YEL L122 YEL L124 YEL L126 YEL L128 YEL L130 GR L132 YEL L134 YEL L136 YEL L138 YEL L140 YEL L142 YEL
RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8 RA9 RA10 RA11 RA12
L119 YEL L121 YEL L123 YEL L125 YEL L127 YEL L129 YEL L131 GR L133 YEL L135 YEL L137 YEL L139 YEL L141 YEL L143 YEL
RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8 RA9 RA10 RA11 RA12
L144 YEL L146 YEL L148 YEL L150 YEL L152 YEL L154 YEL L156 GR L158 YEL L160 YEL L162 YEL L164 YEL L166 YEL L168 YEL
RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8 RA9 RA10 RA11 RA12
L145 YEL L147 YEL L149 YEL L151 YEL L153 YEL L155 YEL L157 GR L159 YEL L161 YEL L163 YEL L165 YEL L167 YEL L169 YEL
RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8 RA9 RA10 RA11 RA12
L170 YEL L171 YEL L172 YEL L173 YEL L174 YEL
Q16 HR
R29 4K7
L175 YEL L176 GR L177 YEL
VDD
L178 YEL L179 YEL L180 YEL L181 YEL
12
L182 YEL
RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8 RA9 RA10 RA11 RA12
Q15 HR
R28 4K7
VDD
Q14 HR
R27 4K7
VDD
Q13 HR
R26 4K7
VDD
Q12 HR
R25 4K7
VDD
Q9 HR
R22 4K7
VDD
Q8 HR
R8 4K7
VDD
Q7 HR
R7 4K7
VDD
Q6 HR
R6 4K7
VDD
Q5 HR
R5 4K7
VDD
R24 120R
R23 120R
Q19 BR Q20 BR Q21 BR Q22 BR Q23 BR Q24 BR Q25 BR Q26 BR Q27 BR Q28 BR Q29 BR Q30 BR
D19 IN4148
S1
SW-PB
D1 IN4148
S2 SW-PB
D2 IN4148
S3 SW-PB
D3 IN4148
S4 SW-PB
D4 IN4148
S5 SW-PB
D5 IN4148
S6 SW-PB
D6 IN4148
S7 SW-PB
D7 IN4148
S8 SW-PB
D8 IN4148
S9 SW-PB
D9 IN4148
S10 SW-PB
D10 IN4148
S11 SW-PB
D11 IN4148
S12 SW-PB
D12 IN4148
S13 SW-PB
D13 IN4148
S14 SW-PB
L183 YEL L184 YEL L185 YEL L186 YEL L187 YEL L188 YEL
RA0 RA1 RA2 RA0 RA1 RA2
D17 IN4148
S18 SW-PB
D18 IN4148
S19 SW-PB
D15 IN4148
S16 SW-PB
D16 IN4148
S17 SW-PB
D14 IN4148
S15 SW-PB CA0
CA1 CA2 CA3 CA4 CA5 CA6 CA7 CA8 CA9 CA10 CA11 CA12 CA13
RA5 RA6 RA7 RA8 RA9 RA10 RA11 RA12
DIGAN27-DISP_VER050117.sch
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RevisionModel No:
7-Jun-2005
Louis Chiang
DIGAN27-DISP
11 of
VER050605
EC
B Q10
HR
Q11 HR
UP
DOWN STORE BYPASS
LINK/EXIT
VDD
R_SIGNAL
LINK
L_CLIP
L_SIGNAL
BYPASS
2412
U3B 74HC574
C3
100N
2010
U2B
74HC574
C2
100N
2010
U1B
74HC574
VDD GND
C1
100N
VDD
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
CN1 HEADER 14X2
D0 D1 D2 D3 D4 D5 D6 D7
VDD
GND GND
L1 YEL L2 YEL L3 YEL L4 YEL L5 YEL L6 YEL L7 GR L8 YEL L9 YEL L10 YEL L11 YEL L12 YEL
D7 D6 D5 D4 D3
L13 YEL
D2 D1 RA0 RA1 D0 RA2
Q8 12 Q7 13 Q6 14 Q5 15 Q4 16 Q3 17 Q2 18 Q1 19
D1
2D2 3D3 4D4 5D5 6D6 7D7 8D8 9
CLK
11 OC
1
U2A 74HC574
RA3
Q8 12 Q7 13 Q6 14 Q5 15 Q4 16 Q3 17 Q2 18 Q1 19
D1
2D2 3D3 4D4 5D5 6D6 7D7 8D8 9
CLK
11 OC
1
U1A 74HC574
RA4 D0 RA5 RA6 D1 RA7 RA8 D2 RA9 RA10 D3 RA11 RA12 D4
L14 YEL L15 YEL
D5
L16 YEL L17 YEL
D6 D7
L18 YEL
PB0
L19 YEL
PB1
L20 GR
PB2 PB3 PB4 PB5
PB4 PB5
L21 YEL L22 YEL L23 YEL
GND
GND
GND
L24 YEL L25 YEL
R31 10K
R32 10K
L26 YEL
RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8 RA9 RA10 RA11 RA12
L27 YEL L29 YEL L31 YEL L33 YEL L35 YEL
STB_0 STB_1
L37 YEL
STB_2
L39 GR
STB_3 STB_4 STB_5 STB_6 STB_7 STB_8 STB_9
L41 YEL
STB_10 STB_11 STB_12
L43 YEL L45 YEL L47 YEL L49 YEL L51 YEL
RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8 RA9 RA10 RA11 RA12
L28 YEL L30 YEL L32 YEL L34 YEL L36 YEL
Q4 HR
R4 4K7
L38 YEL L40 GR L42 YEL
VDD
L44 YEL L46 YEL
STB_0 STB_1 STB_2 STB_3
L48 YEL
STB_4
L50 YEL
STB_5 STB_6 STB_7 STB_8 STB_9
L52 YEL
STB_10 STB_11 STB_12
RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8 RA9 RA10 RA11 RA12
CA14
CA15
Q3 HR
R3 4K7
VDD
Q2 HR
R2 4K7
VDD
Q1 HR
R1 4K7
VDD
CA13 CA12 CA11 CA10 CA9 CA8 CA7 CA6 CA5 CA4 CA3 CA2 CA1 CA0
RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8 RA9 RA10 RA11 RA12
CA0 CA1 CA2 CA3 CA4
A
23 B 22 C 21 D 20
G1
18 G2 19
01 12 23 34 45 56 67 78 89 910
10 11 11 13 12 14 13 15 14 16 15 17
U3A 74HC154
PB0 PB1 PB2 PB3
D20 IN4148
S20 SW-PB CA5
POWER
1 2 3 4 5
CN2
5P2.5
1 2 3 4 5
CN3 5P2.5
A2
4. Schematic Diagram
4

1 2 3 4 5 6 7 8
A
B C
D
87654321
D
C B
A
+5VD +3.3V
U6 LM1117-3.3
C5 10uF
C45
47uF
IN OUT
GND
IN
DIGAN214-CPU_VER050511(DIGAN2.7).SCH
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RevisionModel No:
5-Jun-2005
Louis Chiang
DIGAN214-CPU
11 of VER050117
GND
GNDGND
GND
GNDGNDGND
RX TX
GND
C43 100N
R15 10K
R16 100R
C41
100N
PA0
C40 100N
PA1
C42 100N
PA2
PTA0 32 PTA1 33 PTA2 34 PTA3 35 PTA4 36 PTA5 37 PTA6 38 PTA7 39
PTB0/A 22 PTB1/A 23 PTB2/A 24 PTB3/A 25 PTB4/A 26 PTB5/A 27 PTB6/A 28 PTB7/A 29
PTC0 2 PTC1 3 PTC2 4 PTC3 5 PTC4 6 PTC5 7 PTC6 8
PTD0
12
PTD1
13
PTD2
14
PTD3
15
PTD4
18
PTD5
19
PTD6
20
PTD7
21
PTE0/T
9
PTE1/R
10
IRQ
11
RST
1
OSC1
44
OSC2
43
CGMXFC
42
VREFH
30
VREFL
31
VSS
16
VSSA
41
VDD 17
VDDA 40
U4 HC908GP32
PA3
C44
0.47uF
PA4 PA5 PA6 PA7
C39 100N
C28 2u2F
R17 10K
NC
1
NC
2
A2
3
GND
4SDA 5
SCL 6
NC 7
VCC 8
U3 AT24C64
PD7 PD6 PD5 PD4
RESET
PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PD0PD1 PD2PD3 PD4PD5 PD6PD7
LGND LGND
PB6 PB5 PB0 PB1 PB2 PB3 PB4 PB7
PD0 PD1 PD2 PD3
X1
12.288MHz
C33 22P
GND GND
C38 22P
TXD
1
DTR_N
2
RTS_N
3
VDD_232
4
RXD
5
RI_N
6
GND
7
VDD
8
DSR_N
9
DCD_N
10
CTS_N
11
SHTD_N
12
EE_CLK
13
EE_DATA
14 DP 15
DM 16
VDD_3V3 17
GND_3V3 18
RESET 19
VDD 20
GND 21
TRI_MODE 22
LD_MODE 23
VDD_PLL 24
GND_PLL 25 PLL_TEST 26
OSC1 27 OSC2 28
U5 PL2303
GND +3.3V
C47
100N
GND
C46 100N GND
R31 22R R30 22R
R29 1K5
GND
+3.3V
C49 33P
C50 33P C48 100N
GND
TX RX CLK
1 2 3 4 5 6 7
CN5 HEADER 7
12 34 56 78 910
1112 1314 1516 1718 1920 2122 2324 2526 2728
CN4 HEADER14X2
LINA
1
VRFILT
2
AVSS
3
AVSS
4
INPA
5
RESET
6
CS1
7
PWR_DN
8
TEST
9
CAP_PLL
10
CLKSEL
11
MCLKO
12
XTALI
13
XTALO
14
SCL
15
SDA
16
DVDD
17
DVSS
18
LRCLK/O
19
SCLK/O
20
IFM/S
21
SDIN1
22
SDIN2
23
SDOUT2
24
SDOUT0 25 SDOUT1 26
ALLPASS 27
GPIO0 28 GPIO1 29 GPIO2 30 GPIO3 31 GPIO4 32 GPIO5 33
NC 34
AVDD 35
NC 36
AOUTR 37
VCOM 38
AOUTL 39
RINA 40
RINB 41
AINRP 42
AINRM 43
VREFP 44
VREFM 45
AINLM 46
AINLP 47
LINB 48
U2
TAS3004
R6 4K7
+3.3V
+3.3V
GND
GND
AGND
AVDD
R26 4R7
AVDD
L1 BEAD*
AGND
C30 10uF C29 10uF
AGND
C31 10uF C32 10uF
R1 100R R2 100R
R10 10K
R9 10K
AGND
AGND
1 2 3 4 5 6
CN1 CON11
SCL SDA RESET CLK
C23
2u2F
C13 100N
GND
C27
2u2F
C19 100N
AGND
C2
2u2F
C12 100N
AGND
C26
2u2F
C18 100N
AGND
C37 1000P
AGND
R14 27K*
C36
1000P
R13 27K*
C15
100N
AGND
C11 100N
CLK
SCL
PL_SCL
SDA
PL_SDA
C7
1500P
C21 0.47uF
R8 33R
GND
R3 1K
+3.3V
SCL SDA
TX RX
R21 4K7
R20 4K7
R19 4K7
R18 4K7
R22 4K7
R23 4K7
1 2 3 4
CN2
+5VD GND
R24 4K7
R25 4K7
C4
2u2F
L2 YEL
LINA
1
VRFILT
2
AVSS
3
AVSS
4
INPA
5
RESET
6
CS1
7
PWR_DN
8
TEST
9
CAP_PLL
10
CLKSEL
11
MCLKO
12
XTALI
13
XTALO
14
SCL
15
SDA
16
DVDD
17
DVSS
18
LRCLK/O
19
SCLK/O
20
IFM/S
21
SDIN1
22
SDIN2
23
SDOUT2
24
SDOUT0 25 SDOUT1 26
ALLPASS 27
GPIO0 28 GPIO1 29 GPIO2 30 GPIO3 31 GPIO4 32 GPIO5 33
NC 34
AVDD 35
NC 36
AOUTR 37
VCOM 38
AOUTL 39
RINA 40
RINB 41
AINRP 42
AINRM 43
VREFP 44
VREFM 45
AINLM 46
AINLP 47
LINB 48
U1
R5
+3.3V
+3.3V
GND
GND
AGND
AVDD
SCL SDA RESET CLK
C22 C10
GND
C25 C17
AGND
C1 C9
AGND
C24 C16
AGND
C35
AGND
R12
C34
R11
C14
AGND
C8
C6 C20
R7
GND
C3
U2_SDOUT0 U2_SDOUT0 U1_SDOUT1 U1_SDOUT1
GND
U2_SCLK U2_LRCLK
R4 4K7
U2_LRCLK U2_SCLK
GND
R34 10K
+3.3V
R33 10K
R32 10K
+3.3V
+3.3V
PL_SCL PL_SDA
R27 0R* R28 0R*
LGND
+5VL
+5VL+5VL
PD7
+5VD
+5VD +5VD
+5VD
+5VD
+5VD
R35 4K7 R36 4K7 R37 4K7
+3.3V
R38 56R
C51 56P
GND
DIGAN2.7 No used in this area. Totle 20 components
5

1 234567 8
A
B C
D
8
7654321
D
C B
A
2 1 3 22 11 33
X2
LJB0661-6
3 2
1
IC5A
4580M
R5
5K11
R7
5K11
C4
10P
C3
10P
C1 47P
C2
47P
R1 13K3 R2 13K3
R3 13K3 R4 13K3
AGND
AGND
R15
51K1
R14 10K0
C6
10P R19
10K0 R20
5K76
C8
10P
AGND
R28 2K67
R27 6K04
R25
4K53
R24
3K24
R26
60R4
AGND
R22
4K53
R23
3K16
R21
60R4
R18
10K0
R17
3K16
C11 470P
C10
470P
2 1 3
22 11 33
X5
LJB0661-6
2 1 3 22 11 33
X4
LJB0661-6
5 6
7
IC5B
4580M
R44
5K11
R42
5K11
C17 10P
C18 10P
C15 47P
C16 47P
R38 13K3 R39 13K3
R40 13K3 R41 13K3
AGND
AGND
C20 10P
R53
51K1
R55
3K16
R57
10K0 R58
5K76
R60
4K53
R61
3K16
R59
60R4
C22 10P
AGND
R66
2K67
R65 6K04
R63
4K53
R62
3K24
R64
60R4
AGND
R56
10K0
R52 10K0
2 1 3
22 11 33
X7
LJB0661-6
C25 470P
C24 470P
D1
1N4148
D3
1N4148
+5V-L
+5V-L
84
IC5C 4580M
-VCC
+VCC
C39 100N
C40
100N
C41 100N
C42
100N
AGNDAGND
OUTPUT CH1
INPUT CH1
INPUT CH2
CGNDCGNDCGND
CGNDCGND CGND
CGND CGND CGND
CGND
OUTPUT CH2
RL1
RY-5W-K
RL2
RY-5W-K
R68
47R(1206)
R30
47R(1206)
5 6
7
IC7B
MC33079
10
9
8
IC7C
MC33079
12 13
14
IC7D
MC33079
411
IC7E
MC33079
5 6
7
IC8B
MC33079
10
9
8
IC8C
MC33079
12 13
14
IC8D
MC33079
411
IC8E
MC33079
DIGAN2.7-IO.SCH
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27-May-2005
SHUNG LIN.
DIGAN2.70 IN-OUT SECTION
21 of
DIGAN2.70 VER050306
A3
C23 10P
C9
10P
CGND AGND
AGNDCGND
1 2 3 4 5 6
CN1 CON6
IN_L IN_R
OUT_R
AGND
OUT_L
IN_L IN_R
OUT_R OUT_L
DIGAN2.7-PWRDIGAN2.7-PWR.Sch
TR3
3904
TR4
3904
AGND
AGND
R9
4K7
R10 4K7
RELAY-CTRL
RELAY-CTRL
3 2
1
IC7A
MC33079
AGND
3 2
1
IC8A
MC33079
AGND
L4
BLM21A102P
L5
BLM21A102P
L7
BLM21A102P
L8
BLM21A102P
L15 BLM21A102
L14 0R0 L13 0R0 L12 0R0 L11 0R0
L6
BLM21A102
L9
BLM21A102
L18
BLM21A102
L19
BLM21A102
6

1234
A B C D
4
321
D
C B A
CN2
CN-DJ005A
C21 2200uF/16V
C5 100N C7 100N
C12
100N
C19
2200uF/16V C27
2200uF/16V
C29 330uF/16V C28 330uF/16V
TR1 7805
C26 2200uF/16V
C13 100N
TR2 7805
C14 100N
1 2 3 4
CN3 CON4
R6 10R
D7 1N4002
D8
1N4002
D6 1N4002 D5 1N4002 D2 1N4002 D4 1N4002
DIGAN2.7-PWR.Sch
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RevisionModelNo:
27-May-2005
SHUNG LIN
DIGAN2.70 POWERSUPPLY
22 of
DIGAD2.70 VER050306
A3
GND1
+5V-L
+5V
+VCC -VCC
+5V-L+5V
R8 10R
USB+ USB-
1 2 3 4 5 6 7
CN4 7P-2.5
L1
BLM21A102
RELAY-CTRL
1 2 3 4 5 6
J1
USB-4FR004-B
L2
BLM21A102
J2
CN-RCA2-1
TO DSP BOARD
C43 1000uF/10V
6 1
34
L3
PLT09H-2003R
TP1
TOCHASSISGND
*AC9V INPUT(500mA)
C30 100N
CGND
AGND
1 2
JP1
0R0
1 2
JP2 0R0
GND1
TP2
TOCHASSISGND
L10
BLM21A102
C31
10P
C32
10P
C33
10P
R11 100R
R12
100R
L16 0R0 L17 0R0
R16 0R0
R13 *0R0
7

1 2 3 4
A B C D
4
321
D
C B A
g
1f 4
A1 10
e
7d 6c 8
A2 5
b
9a 3
dp
2
IC1
2*7SEGMENT
1 2 3 4 5
CN5 5P2.5
1 2 3 4 5
CN4 5P2.5
8

1 2 3 4 5 6
A B C D
6
54321
D
C B A
CN4
CN1
CN3
CN2 CN5
CN1
CN4
CN1
DIGAN230-INOUT
DIGAN214-CPU
DIGAN207-DISP
9
5.Wiring Diagram

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6. PCB Layout
06_1

:
DRILL DRAWING
11

:VER050511
PCB : DIGAN214CPU Bottom La
y
e
r
PCB : DIGAN214CPU Bottom Solder Mask
PCB : DIGAN214CPU Top Overlay
PCB : DIGAN214CPU To
p
La
y
e
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PCB : DIGAN214CPU Top Solder Mask PCB : DIGAN214CPU Drill Drawing
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VER050511
Tool Hole Size Hole Count Plated Tool Travel
---------------------------------------------------------------------------
T1 20mil (0.508mm) 150 97.21 Inch (2469.09 mm)
T2 31mil (0.7874mm) 2 66.58 Inch (1691.22 mm)
T3 36mil (0.9144mm) 28 70.50 Inch (1790.76 mm)
T4 40mil (1.016mm) 17 70.05 Inch (1779.18 mm)
T5 126mil (3.2004mm) 4 74.69 Inch (1897.00 mm)
---------------------------------------------------------------------------
Totals 201 379.03 Inch (9627.27 mm)
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:VER050306
PCB : DIGAN207-INOUT Bottom La
y
e
r
PCB : DIGAN207-INOUT Bottom Solder Mask
PCB : DIGAN207-INOUT To
p
La
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e
r
PCB : DIGAN207-INOUT To
p
Solder Mask
PCB : DIGAN207-INOUT Top Overlay
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版次: VER050306
PCB : DIGAN207-INOUT Drill Drawing
Tool Hole Size Hole Count Plated Tool Travel
---------------------------------------------------------------------------
T1 20mil (0.508mm) 59 22.25 Inch (565.15 mm)
T2 31mil (0.7874mm) 37 30.47 Inch (773.85 mm)
T3 35mil (0.889mm) 4 6.55 Inch (166.26 mm)
T4 39mil (0.9906mm) 35 19.73 Inch (501.10 mm)
T5 43mil (1.0922mm) 6 11.21 Inch (284.74 mm)
T6 47mil (1.1938mm) 1 5.73 Inch (145.61 mm)
T7 51mil (1.2954mm) 4 8.72 Inch (221.55 mm)
T8 59mil (1.4986mm) 25 15.41 Inch (391.29 mm)
T9 91mil (2.3114mm) 2 6.72 Inch (170.58 mm)
T10 98mil (2.4892mm) 2 10.79 Inch (274.11 mm)
T11 138mil (3.5052mm) 2 15.73 Inch (399.46 mm)
T12 110mil (2.794mm) 2 NPTH 6.02 Inch (152.84 mm)
---------------------------------------------------------------------------
Totals 179 159.31 Inch (4046.55 mm)
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版次: VER050306
PCB : DIGAN207-INOUT
16

7. TEST PROCEDURE
Test Instruments
1. AP instrument
2. Dual track oscillograph
3. Computer (WINDOWS 2000)
Instrument Setting and Connection
1. Connect AP output to INPUT1 and INPUT2. Set AP 1 kHz, 0dBu, Load
600Ω, UNBAL & BAL.
2. Connect OUTPUT1 and OUTPUT 2 to AP input terminal. Connect its
monitor signal to oscillgraph. Set UNBAL& BAL Load 100KΩ, BW:
22Hz~22 kHz.
Part 1 Functional Switch Test
1. Connect AC9V/300mA voltage adapter to DIGAN2.7. When the power
switch is in the ON position, LED indicates D27. Press POWER button,
now it is in the standby mode. It is 0dBu input and 0dBu output of the AP
instrument.
2. Press the button of POWER, BYPASS and LINK in turn quickly. The left
LED shows TST. After flashing about 2 seconds, the seven bands LCD
shows 00.
2-1. Press the  button, the yellow LED of PEQ and GEQ on the right will
light up.
2-2. Press the  button, the yellow LED of DRCEand TONEon the
right will light up.
2-3. Press the STOREbutton, TONEand GEQwill light up
simultaneously.
2-4. Press the BYPASSbutton, and the yellow LED beside will light up.
2-5. Press the LINKbutton, and the yellow LED beside will light up.
2-6. Press the 50button of the left channel, EQ LED will light up from left
to right in turn. (The one in the middle is green, others are yellow.)
2-7. Press 125button of the left channel, the LED of L/R channel EQ will
light up in turn.
2-8. Press 260button of the left channel, the corresponding EQ LED will
light up.
2-9. Press the buttons of other frequency, the corresponding EQ LED will
light up.
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Part 2 Electric Performance Test
1. Set the AP instrument 0dBu output, BW: 22Hz ~22kHz (Input Signal
Level=0dBu, at model 00).
Test the unbalanced input/output of L/R channel of DIGAN 2.7 is
0dBu+1dBu. THD+N value 0.03%.
The diagram of Frequency Response is as Figure 1.
2. Test the Output noise of L/R channel of DIGAN2.7, the value -85dBu.
The diagram of Output noise is as Figure 2.
3. Test the S/N value of L/R channel in DIGAN2.70. It is 96dBu.
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