AMLOGIC AML 6210DP User manual

AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 1/24 AMLOGICProprietary
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AML6210DPA/VProcessor
User’sGuide
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AMLOGIC,Inc.
3930FreedomCircle
SantaClara,CA95054
U.S.A.
www.amlogic.com
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AMLOGICreservestherighttochangeanyinformationdescribedhereinatanytimewithoutnotice.
AMLOGICassumesnoresponsibilityorliabilityfromuseofsuchinformation.
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AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 2/24 AMLOGICProprietary
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TableofContents
1 INTRODUCTION..............................................................................................................................................................4
2 FEATURES ........................................................................................................................................................................5
3 EXTERNALINTERFACES ..............................................................................................................................................7
3.1 GLOBALCONFIGURATIONS................................................................................................................................................................. 7
3.1.1 PowerOnConfiguration........................................................................................................................................................... 7
3.1.2 Clocks................................................................................................................................................................................................. 7
3.1.3 JTAGforSoftwareDevelopment............................................................................................................................................ 8
3.1.4 GPIOs.................................................................................................................................................................................................. 8
3.2 MEMORYINTERFACES ......................................................................................................................................................................10
3.2.1 SDRAMInterfaces ......................................................................................................................................................................10
3.2.2 FLASHInterface..........................................................................................................................................................................10
3.2.3 NANDFLASHInterface............................................................................................................................................................10
3.3 AUDIOINTERFACES...........................................................................................................................................................................12
3.4 VIDEOOUTPUTINTERFACES ...........................................................................................................................................................13
3.4.1 DigitalVideoOutput.................................................................................................................................................................13
3.4.2 LCDTimingController.............................................................................................................................................................13
3.5 PERIPHERALS .....................................................................................................................................................................................14
3.5.1 CardReaderInterface .............................................................................................................................................................14
3.5.2 USBInterface ...............................................................................................................................................................................14
4 OPERATINGCONDITIONS ........................................................................................................................................15
4.1 DCCHARACTERISTICS ......................................................................................................................................................................15
4.2 ABSOLUTEMAXIMUMRATINGS ......................................................................................................................................................15
4.3 RECOMMENDEDOPERATINGCONDITIONS....................................................................................................................................15
5 PINOUT .........................................................................................................................................................................16
5.1 PACKAGEPIN‐OUTDIAGRAM ...........................................................................................................................................................20
5.2 MULTIPLEFUNCTIONPINS ...............................................................................................................................................................21
5.2.1 CardReaderinterfacemultifunctionpins.....................................................................................................................21
5.2.2 TCONMultiFunctionPins .....................................................................................................................................................21
5.2.3 JTAGinterfacemultifunctionpins.....................................................................................................................................21
5.2.4 FLASHandm1_*interfacemultifunctionpins............................................................................................................22
6 MECHANICALSPECIFICATIONS ..............................................................................................................................24
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AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 3/24 AMLOGICProprietary
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RevisionHistory
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Revision
Number
Revised
Date
By Changes
0.1 2008/3/3 bwester Initial release
0.2 2008/3/3 Bwester Fix some errors in diagram and text
0.3 2009/2/13 J Z Revise pin description
0.4 2010/03/25 J Z Revise content
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AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 4/24 AMLOGICProprietary
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1Introduction
TheAML6210DPA/Vprocessorisacompleteintegratedsystemtargetingthedigitalpictureframemarket.
ThedevicecombinesasuperfastJPEGdecoder,alldigitalLCDdrivers/TCONsignals,USBandcard‐reader
I/Osanda32‐bithostCPUinasmall144pinpackage.
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Theembedded32‐bitscoreCPUhandlesallsystemrelatedapplicationsoftware.ItexecutesAVOS,thebase
operatingsystemforAML6210DP.AllapplicationsanddriversrunontopofAVOS.DriversincludingUSB
drivers,card‐readerhardwaredriver,andvideoandotherhardwarerelatedprogramminginterfacesare
providedbyAVOS.Applicationsincludegraphicaluserinterfacesandfilesystemsub‐systemarealso
included.Developerscanaddadditionalapplicationstocustomizeforeachplatform.
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ThecoreCPUinterfacestothevideoandaudioprocessinghardware.Itperformsadvanceddigitalaudio
decoding.Itprovidessupportforallexistingaudioformatsanditalsohasenoughflexibilitytoaccommodate
newaudiostandards.PopularaudioformatslikeMPEGLayerI/II/III,LPCM,MP3,WMA,AACandWAVcan
besupported.
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JPEGpicturesareprocessedbydedicatedpicturedecodinghardwareandtheflexiblePictureAMRISCTM
engine.ThehardwareandmicrocodecombinationiscapableofdecodingJPEGpictureswithnolimitsin
pictureresolution.Oncedecoded,theoutputpicturesarepassedtoasophisticatedvideosub‐systemthat
performsimageanalysis,enhancementandscalingfunctions.Contrastenhancement,hueadjustment,video
scaling,videointerpolation,andzoomarealsosupported.Thehigh‐resolutionscalarsupportsbothup‐
scalinganddown‐scalingofimagesandvideo.ThescalarcanalsomixinmultiplegraphicsandOSDlayersfor
thefinaldisplay.TheintegratedvideoencodersupportsalldigitalLCDpanelresolutionsthrutheon‐chip
triplepanelDACs.Inaddition,aprogrammabledigitalLCDTCONisincludedfortheAML6210DPtointerface
todigitalLCDpanelsdirectly.
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TheAML6210DPalsointegratedaUSB2.0HighSpeedOTGcontroller/PHYandcard‐readercontroller.The
card‐readercontrollercansupportSD/SDHC,MS/MS‐Pro/MS‐Duo/MS‐ProDuo,MMC,xDandCFcards.FAT
andFAT32filesystemsaresupported.TheUSBcontrollercanbeconnectedtoUSBharddisk,FLASHdrive,
digitalcamerasandMP3players.TheAVOSdriversandapplicationsforAML6210DPfirmwareincludesthe
basicUSBdevicedriver,USBprotocolstackstosupportbulkandINTRtransfer,Hub,Mass‐Storage(MS)class
andPictureTransferProtocol(PTP).TheAVOSUSBfirmwarealsosupportsmultiplefilesystemsand
includesflexiblefiletransferfunctionsbetweenUSBdevices.
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AML6210DPA/Vprocessorhasasetofveryflexibleclockingcircuitsthatimplementtheadaptive
AMPOWER‐IIpowerreductionalgorithms.ThechipworksinconjunctionwiththeAVOSsoftwaretoreduce
totalpowerconsumptionbasedonprocessingload,typeofmediastreamsbeingprocessedandtheoutput
requirements.WithAMPOWER‐II,thesystemcanreducepowerconsumptionforportableapplicationsand
helpsconsumerelectronicstoachievetheEnergyStarrating.Inaddition,AMPOWER‐IIalsoprovideshigher
performancewithinsmaller,thermallyconstrainedenvironments.
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AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 5/24 AMLOGICProprietary
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2Features
TheAML6210DPchipisveryflexibleandmostofthecapabilitiesareunderfirmwarecontrol.Thefollowing
listoffeaturesmayormaynotbeincludedinthefirmwarelibraryorbinary,dependingontheactual
applicationandplatform.
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HighIntegration
oEmbedded32‐bitscoreRISCprocessorforsystemcontrol
oCompleteJPEGdecodinglogicandvideoscalinglogic
oCompleteaudiodecodingandstereoaudioDACs
oIntegrateddigitalLCDvideosignalsandTCON
oIntegratedUSB2.0HighSpeedOTGport
oIntegratedcardreadercontrollers
oIntegratedNANDFLASHcontroller
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JPEGDecoding
oSuperfasthardwaredecodingofJPEGpicture
oUnlimitedpixelresolution(currentlytestwith16Mpixelpictures)
oSupportsscaling(zoominorout),rotationandtransitioneffects
oAutomaticimageanalysisandenhancement
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OtherImages/PicturesDecoding
oDecodesBMP,PNG,GIF,TIFFandotherpopularpictureformats
oSupportszoominandout,rotationandtransitioneffects
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SpecialTrickModes:
oPause
oReverseplayback
oMultiplestepsfastforward/backward
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PictureProcessing
oAutomaticimageanalysisandenhancement
oVariablestepspicturezooming(upto8x)
oOn‐Screen‐Display(OSD)capableofsupporting4/16/256colorsorTrue‐Color
oOSDalpha‐blendingovervideodisplay
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TVEncoder/TCON
oDigitalvideooutputsignalsespeciallyfordigitalLCDpanels
oProgrammabletint,brightnessandotherTVenhancements
oIntegratedprogrammabletimingcontroller(TCON)fordigitalLCDpanels
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Graphics
oGraphicscanbescaledindependentlyofthevideooutput
oUnifiedgraphicsmemoryarchitectureformaximumflexibilityandsystemcostsavings
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AudioDecoding
oFullMPEGaudiolayersI,IIandIII
oCapableofdecodingpopularaudioformatsincluding:MP3,WMAandWAV
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AudioPostProcessingandOutput
oIntegrateda2‐channelaudioDACs
oMuting,volumecontrol,etc.
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USBInterface
oIntegratedOTG2.0HighSpeedcontrollerandPHY
oBackwardcompatiblewithUSB1.1devices
oUSBOTGportcanbeconfiguredasUSBdevice,hostorOTGport
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AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 6/24 AMLOGICProprietary
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oDMAsupportfordatamovementforBULK,INTRandISOtransfer
oUSBdevicedriver,nativeUSBprotocolstacksupportedinAVOSfirmware
oIntegratedsupportforMass‐storageclass(MS‐Class)andPictureTransferProtocol(PTP)
oUSBHubsupport
oVideo,audioandimagedecodingfromUSBattachedMS‐ClassorPTPdevices
oConnectingtoPCsorApplecomputersasUSBMS‐Classdevices
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CardReaderInterfacesandControllers
oSupportMS,SD/SDHC,MMC,andxDmemorycardformats
oSupportsreadingandplaybackofaudioandpicturemultimediafiles
oAVOSsoftwaresupportsallfileoperationsviafilesystemoneachmemorycard
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CoreCPUSubsystem
o32‐bitcoreCPUdedicatedforuserapplications
oEmbeddeddebuginterfaceusingICE/JTAG
oSharedMPEGSDRAMasruntimedatastorageforminimalsystemcost
oIntegratedinterruptcontroller
oIntegratedgeneralpurposetimersandcounters
oIntegratedgeneralpurposeDMAcontrollers
oSupportsupto8Mbytesof8‐bitFLASHchip
oSupportssingleSDRAMinterface(m1_*).TheSDRAMinterfacecansupport8Mor16M
bytesofSDRAM.

System,PeripheralsandMisc.Interfaces
oOne27MHzcrystaloscillatorforA/Vsystem
oAMPOWER‐IIpowerreductionalgorithmforportabledevices
oNumerousprogrammableGPIOpinsforsystemcontrolandinterrupts
oIntegratedi2cmastercontrollers,remotecontrolinputcircuitry,quadPWMoutputpins
o1.25voltand3.3voltpowersupplies
o3.3voltI/Osupport
o144pinsLQFPRoHSpackage



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AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 7/24 AMLOGICProprietary


3ExternalInterfaces
3.1 GlobalConfigurations
3.1.1 PowerOnConfiguration
Thechiphasacommonactive‐lowresetsignalcalledreset_n.Thissignalputstheentirechipintoaknown
statebyresettinginternalregistersandstate‐machinestotheirdefaultstates.Typicallythissignalisheldlow
foratleast100msecafterthepowerandcrystalclockisstabilized.Theresetprocessalsoplaysarolein
configuringcertainfunctionswithinthechip.Usingthestateoftheconfigurationpinsandtherisingedgeof
thereset_nsignal,theusercandictatetheconfigurationoftheJTAGpinsandthebootdevice.The
configurationpinsshouldbepulledupordownusing10Kresistorstoeither3.3vorground.


PIN Function
m1_a_10 This pin controls the JTAG configuration after RESET:
¾Tie to 3.3v with 10k resistor for JTAG debugging
¾Tie to ground with a 10k resistor to use the JTAG pins as GPIO
m1_we_n This pin controls the Boot Option after RESET:
¾Tie to 3.3v with 10k resistor if the boot device is NAND FLASH
¾Tie to ground with a 10k resistor if the boot device is NOR FLASH
m1_dqm1 This pin controls the FLASH Data Wide after RESET:
¾Tie to 3.3v with 10k resistor for 16-bit FLASH device
¾Tie to ground with a 10k resistor for 8-bit FLASH device
m1_cas_n This pin controls the NAND Page Size after RESET (only for NAND flash):
¾Tie to ground with a 10k resistor for 2048 bytes page size
¾Tie to 3.3v with 10k resistor for 512 bytes page size
m1_ras_n This pin controls the NAND Flash Size after RESET. The pin controls the number of
ALE pulses that are issued to set the ROW address.
¾Tie to 3.3v with 10k resistor for large size NAND flash device that needs 3 ALE
pulses
¾Tie to ground with a 10k resistor for small size NAND device that needs 2 ALE
pulses


Clocks
TheAML6210DPhasmultipleinternalclockdomains,butalltheinternalclockdomainsarederivedfroma
singleexternalreference:OSC.Asillustratedbelow,thecrystal/oscillatorpinpairs(OSCIN/OSCOUT)canbe
connectedtoacrystalordrivenfromanexternaloscillator.InthetypicalA/Vapplication,a27MHzcrystalis
connectedtotheOSCpins.Thefollowingdiagramdepictsatypicalcrystalcircuit;theactualvaluesofthe
componentsdependonthetypeofcrystalusedintheapplication.

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AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 8/24 AMLOGICProprietary


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3.1.3 JTAGforSoftwareDevelopment
TheembeddedcoreprocessorcanbecontrolledthroughitsJTAGportusingtheembeddedICEinterface.The
embeddedICEinterfaceallowsthedevelopertodownloadcode/datatotheSDRAMmemory,proberegisters
ontheAML6210DPchip,executeanddebugtheRISCcodeusingauserfriendlydevelopmentenvironment.
TheJTAGinterfaceisenabledbytyingm1_a_10highhighasillustratedbelow.
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3.1.4 GPIOs
Configurablehardwarecontrollers(e.g.i2c,card‐reader,etc.)andDMAsareintegratedintotheAML6210DP
devicetospeedupthecommonoperationsandrelievethecoreRISCforuser‐levelapplications.Since
hardwarecontrollersandstate‐machinescannotcoverallpossibleexternaldevicesorsystem‐levelsignals,
numerousgeneral‐purposeI/OpinsareavailableonthechipforpurposelikePortableMediaPlayerkeypads.
EachGPIOpincanbeindependentlyconfiguredtobeaninputoranoutput.Asindicatedinthediagram,
therearevariousI/Otypes.
OSCIN
OSCOUT
22pF
22pF
XTAL
27MHz
OSCIN
OSCOUT NC
27Mhz
100
k

TDI
TMS
TCK
TDO
VCC AOGPIO

TDI
TMS
TCK
TDO
JTAGController


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AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 9/24 AMLOGICProprietary




Readbac
k
Register
I/O
GPIOI/O

TypeOD

‐ (Pull‐uprequired)

I/O_EN
Register
Readback
Register
I/O
GPIOI/O

TypeFC ‐ (NOPull‐uprequired)
I/O_EN
Register
I/O_O
Register
Readback
Register
I
GPIOI/O

TypeI


O
GPIOI/O

TypeO
I/O_O
Register
GPIOPADTYPES

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AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 10/24 AMLOGICProprietary


3.2 MemoryInterfaces
3.2.1 SDRAMInterfaces
TheAML6210DPdeviceusesexternalSDRAMfordatastorageandcodeexecution.TheSDRAM1interfaceis
labeledasm1_*interface.TheSDRAMinterfacecanaccessupto16Mbytesofmemory.Dependingonthe
application,166MHz4Mx16or8Mx16SDRAMchipscanbeused.Thefollowingexampledepictsasystem
with8MbytesofSDRAMonm1_*interface.
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3.2.2 FLASHInterface
TheFLASHinterfacecanaccommodatean8‐bitsFLASHdevice.DuetothelimitednumberofI/Opins,the
FLASHinterfaceissharedwiththeSDRAM(m1_*)interface.Upto8MbytesofFLASHisaccessiblewiththe
8‐bitswideFLASHinterfacedesign.TheFLASHshouldbeconnectedasindicatedinthefollowingdiagram:



3.2.3 NANDFLASHInterface
TheNANDFLASHinterfacecanaccommodatean8‐bitsor16‐bitsNANDFLASHdevice.Duetothelimited
numberofI/Opins,theFLASHinterfaceissharedwiththeSDRAM(m1_*)interface.NANDFLASHhasavery
M1_D[0..15]
M1_A[0..11]
M1_BA1
M1_BA0
M1_CLK0
M1_RAS_n
M1_CAS_n
M1_SCS0_n
M1_DQM0
M1_DQM1
M1_WE_n



D[0..15]
A[0..11]
BA1
BA0
CLK
RAS#
CAS#
SCS#
DQML
DQMH
WE#
8Mx16SDRAM

8bitFLASH

A[17]
A[16]
A[15]
A[14]
A[13]
A[12]
A[11:0]
D[15:0]

WE#
CS#
OE#
M1_BA1
M1_BA0
M1_CAS_n
M1_RAS_n
M1_DQM1
M1_DQM0
M1_A[11:0]
M1_D[15:0]
M1_WE_n
FLASH_CS_n
FLASH_OE_n

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AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 11/24 AMLOGICProprietary


largecapacitythatrangesfrom32MBtomorethan1GB.TheNANDFLASHshouldbeconnectedasindicated
inthefollowingdiagram:



8bit

NAND

FLASH

R/B*
RE*
CE*
WE*
CLE
ALE

DQ[7:0]

NAND_R/nB
NAND_nRE
NAND_CE
NAND_nWE
M1_BA1/NAND_CLE
M1_BA0/NAND_ALE
M1_D[7:0]


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AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 12/24 AMLOGICProprietary


3.3 AudioInterfaces
ApairofaudioDACsisprovidedintheAML6210DPdevice.TheaudioDACsaredesignedforconnectingto
smallspeakerinsidethephotoframeorearbudsforexternallistening.Asimpleexternalamplifierisneeded.
Pleaseseethefollowingsamplecircuitdiagram.

Internally,thedelta‐sigmaalgorithmisusedtoimprovetheperformanceandensurehighSNRoutput.The
implementationincludesamulti‐tapinterpolationfilterwhichincreasesthesamplerateoftheaudio
channelstothemodulatorrate.Thentheaudiostreamispassedthroughasigma‐deltamodulatorthat
generatestheserialPWMdatastream.Aninternalanalogfilteristhenusedforout‐of‐bandnoisefiltering
andanalogsignalreconstruction.Externalamplifierisneededtoprovidethenecessarycurrenttodrivethe
speakersorheadphones.







ADATA_0(L)
ADATA_1(R)

AMPIFLER
Circuit
Internal
StereoADC


L
R
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AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 13/24 AMLOGICProprietary
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3.4 VideoOutputInterfaces
3.4.1 DigitalVideoOutput
TheAML6210DPintegratedinternalLCDvideoscalarandencoderandhigh‐resolutiontriplepanelDACs
(PDAC)fordirectconnectiontodigitalLCDpanels.TheLCDscaleandencoderconvertthevideoimagesto
theLCDresolutionandpreparetheimagetobedisplayed.ThenspecialLCDspecificditheringlogicand
gammacorrectionalgorithmisappliedbeforethevideodataissenttothedigitalvideooutput.
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3.4.2 LCDTimingController
TheAML6210DPAVprocessorhasabuilt‐inLCDtimingcontroller(TCON)thatworksinconjunctionwiththe
digitalvideooutputtoprovidethebestvideoperformanceonadigitalLCDpanel.TheTCONanddigitalvideo
outputdrivethedigitalLCDpaneldirectlywithoutanyadditionallogic.AML6210DP’sTCONis
programmableandcanbeusedinanysmalltomediumsizedigitalLCDpanels.TheLCDTCONalsoincludesa
dedicatedVGH/VGLpulsegeneratorfortheLCDpanelvoltagegenerator.Togetherwithsomesimplepassive
components,VGH/VGLcanbegenerated.
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
DVOut

Digital
LCD
Panel
LCD
Timing
Controller
VGH/VGL
Control
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AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 14/24 AMLOGICProprietary
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3.5 Peripherals
3.5.1 CardReaderInterface
TheAML6210DPhaveanintegratedhardwarecontrollerforSD/MS/MMC/xDcard‐readeroperations.The
hardwarecontrolleriscapableofexecutingthelow‐levelcardinterfaceprotocols,computingtheCRCor
checksum,andtransferringdatato/fromSDRAM.Thehardwareprovidesinterfaceforthenecessarysignals
(e.g.SD_CLK,SD_CMD,SD_D0‐3forSDcards)butsignalslikecarddetectandwrite‐protectareprovidedusing
GPIOonly.
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3.5.2 USBInterface
AM6210DPAVprocessorhasintegratedonehighspeedUSB2.0OTGcontrollerandPHYintothechip.The
outputUSBsignal(DP/DM)candrivetheexternalUSBcontroller(e.g.Hub,FLASHdrive,camera,PC,Mac,etc.)
directly.TheOTGcontrollercanactsasahighspeedUSBHostorUSBDeviceoratryOTGcontroller.
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AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 15/24 AMLOGICProprietary

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4OperatingConditions
4.1 DCCharacteristics
Table41DCCharacteristics
VDD = 3.3 +/- 0.3V, TA= 0 to 65°C
Symbol Parameters Condition Min Typ Max Unit
VIH High Level Input 2.0 3.3 V
VIL Low Level Input -0.3 0.8 V
VT+ Schmitt trigger, positive going Threshold 1.5
VT- Schmitt trigger, negative going threshold 0.93
V
Voh High-level output voltage Ioh = -2.0mA
to 24mA 2.4 V
Vol Low-level output voltage Iol = 2.0 mA
to 24mA 0.4
V
IIH High-level input current Vin = VDD 10nA 1
IIL Low-level input current 10nA 1
Ioz Tri-state output leakage current 10nA 1
uA
PDPower Dissipation Vin = VDD 0.8 W
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4.2 AbsoluteMaximumRatings
Thetablebelowgivestheabsolutemaximumratings.Exposuretostressesbeyondthoselistedinthistable
mayresultinpermanentdevicedamage,unreliabilityorboth.
Table42AbsoluteMaximumRatings
Characteristic Value Unit
1.25V Core Supply Voltage 1.4 V
3.3V Pads Supply Voltage 3.6 V
Input voltage, VI -0.5 ~ 4.6 V
Output voltage, VO -0.5 ~ 4.6 V
Junction Temperature 125 °C
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4.3 RecommendedOperatingConditions
Table43RecommendedOperatingConditions
Symbol Parameter Min. Typ. Max Unit
VDD(CORE) 1.25V Core Supply Voltage 1.2 1.25 1.32 V
VDD(PADS) 3.3V Pads Supply Voltage 3.0 3.3 3.6 V
TJ Operating Temperature 0 65 °C
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AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 16/24 AMLOGICProprietary
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5Pinout
TheAML6210DPA/Vprocessorpin‐outisdescribedinthefollowingtable.
Abbreviations:
¾I==Inputdigitalpin,O==Outputdigitalpin,I/O==Input/Outputpin
¾AI==Analoginputpin,AO==Analogoutputpin,AIO==Analoginput/outputpin
¾P==Powerpin,AP==Analogpowerpin,NC==Noconnection
Pin# PinName Description AlternateUsage/Comments Type
1 VAA3V Analogpower 3.3Vanalogpower AP
2 APAD0 Audiooutput Audiooutput–LEFT AP
3 APAD1 Audiooutput Audiooutput–RIGHT AO
4 AGND Analogground Analogground AP
5 TCON_STH2 LCDPanelsignal LCDpanelclockpulse I/O
6 TCON_STH1 LCDPanelsignal LCDpanelclockpulse I/O
7 TCON_OEV1 LCDPanelsignal LCDpanelclockpulse I/O
8 TCON_CPV1 LCDPanelsignal LCDpanelclockpulse I/O
9 VDD33 DigitalI/OPower DigitalI/O3.3VPower P
10 TCON_STV1 LCDPanelsignal LCDpanelclockpulse I/O
11 TCON_STV2 LCDPanelsignal LCDpanelclockpulse I/O
12 VSS33 DigitalGround DigitalGround P
13 TCON_VCOM LCDPanelsignal LCDpanelclockpulse I/O
14 TCON_OEH LCDPanelsignal LCDpanelclockpulse I/O
15 TCON_CPH1 LCDPanelsignal LCDpanelclockpulse I/O
16 GPIO//XD_INS GPIO GPIOforcardreader I/O
17 GPIO//SD_INS GPIO GPIOforcardreader I/O
18 GPIO//MS_INS GPIO GPIOforcardreader I/O
19 NAND_WE_n NANDInterface NANDInterfaceWE I/O
20 NAND_RDYBSY NANDInterface NANDInterfaceRDYBSY I/O
21 NAND_CE_n NANDInterface NANDInterfaceCE I/O
22 NAND_RD_n NANDInterface NANDInterfaceRD I/O
23 VDD12 DigitalCorePower Digitalcore1.2Vpower P
24 M1_A_3 M1_A_3 SDRAM1and/orFLASH I/O
25 M1_A_2 M1_A_2 SDRAM1and/orFLASH I/O
26 M1_A_1 M1_A_1 SDRAM1and/orFLASH I/O
27 VDD33 DigitalI/OPower DigitalI/O3.3Vpower P
28 M1_A_0 M1_A_0 SDRAM1and/orFLASH I/O
29 M1_A_4 M1_A_4 SDRAM1and/orFLASH I/O
30 M1_A_5 M1_A_5 SDRAM1and/orFLASH I/O
31 M1_A_6 M1_A_6 SDRAM1and/orFLASH I/O
32 VSS DigitalGround Digitalground P
33 M1_A_7 M1_A_7 SDRAM1and/orFLASH I/O
34 M1_A_8 M1_A_8 SDRAM1and/orFLASH I/O
35 M1_A_9 M1_A_9 SDRAM1and/orFLASH I/O
36 M1_A_10 M1_A_10 SDRAM1and/orFLASH I/O
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AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 17/24 AMLOGICProprietary
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Pin Pinname Description Comments/Alternateusage Type
37 M1_A_11 M1_A_11 SDRAM1and/orFLASH O
38 M1_BA1 M1_BA1 SDRAM1and/orFLASH O
39 M1_BA0 M1_BA0 SDRAM1and/orFLASH O
40 VDD33 I/OPower3.3V DigitalI/Opower3.3V P
41 M1_CLKO M1_CLKO SDRAM1and/orFLASH O
42 M1_DQM1 M1_DQM1 SDRAM1and/orFLASH O
43 M1_DQM0 M1_DQM0 SDRAM1and/orFLASH O
44 M1_SCS0_n M1_SCS0_n SDRAM1and/orFLASH O
45 M1_RAS_n M1_RAS_n SDRAM1and/orFLASH O
46 M1_CAS_n M1_CAS_n SDRAM1and/orFLASH O
47 M1_WE_n M1_WE_n SDRAM1and/orFLASH O
48 M1_D_8 M1_D_8 SDRAM1and/orFLASH I/O
49 VSS VSS Digitalground P
50 VDD12 DigitalCore1.2V Digitalcorepower1.2V P
51 M1_D_9 M1_D_9 SDRAM1and/orFLASH I/O
52 M1_D_10 M1_D_10 SDRAM1and/orFLASH I/O
53 M1_D_11 M1_D_11 SDRAM1and/orFLASH I/O
54 M1_D_12 M1_D_12 SDRAM1and/orFLASH I/O
55 VDD33 I/OPower3.3V DigitalI/Opower3.3V P
56 M1_D_13 M1_D_13 SDRAM1and/orFLASH I/O
57 M1_D_14 M1_D_14 SDRAM1and/orFLASH I/O
58 M1_D_15 M1_D_15 SDRAM1and/orFLASH I/O
59 M1_D_7 M1_D_7 SDRAM1and/orFLASH I/O
60 VSS VSS Digitalground P
61 M1_D_6 M1_D_6 SDRAM1and/orFLASH I/O
62 M1_D_5 M1_D_5 SDRAM1and/orFLASH I/O
63 M1_D_4 M1_D_4 SDRAM1and/orFLASH I/O
64 M1_D_3 M1_D_3 SDRAM1and/orFLASH I/O
65 M1_D_2 M1_D_2 SDRAM1and/orFLASH I/O
66 M1_D_1 M1_D_1 SDRAM1and/orFLASH I/O
67 M1_D_0 M1_D_0 SDRAM1and/orFLASH I/O
68 VDD33 I/OPower3.3V DigitalI/Opower3.3V P
69 REMOTE Remote RemoteControl I
70 PWM_LCD LCDPWM PWMfortheLCD? I/O
71 GPOutput//LCD_PWR_EN GPO GPOforLCD_powercontrol O
72 RESET_N Reset MasterReset I
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AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 18/24 AMLOGICProprietary


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Pin Pinname Description Comments/Alternateusage Type
73 USBA_id USBAidentifier
USBMini‐receptacleIdentifierbetweenmini‐
A/mini‐Bplug AI
74 USBA_vbus USBAminiVBUS
USBpowersupplypin(5volt).Anoff‐chipcharge
pumpisusedtoprovidepowertotheVBUSpin.
AP
75 USBA_vdd12
USBADigital1.2V
Power Digital1.2VpowerforUSB‐A
AP
76 USBA_vss12 USBADigitalGround DigitalgroundforUSB‐A AP
77 USBA_vssa33t USBAground AnaloggroundforUSB‐AtransceiverAP
78 USBA_dp USBAD+ D+analogsignalfromtheUSBcable A
79 USBA_dm USSAD‐ D‐analogsignalfromtheUSBcable A
80 USBA_vdda33t USBA3.3Vpower Analog3.3VpowerforUSB‐Atransceiver AP
81 USBA_rext USBAExtRefresistor
Externalresistorthatcontrolsthebiascurrentfor
USB
AP
82 USBA_vdda33c USBA3.3Vpower Analog3.3VpowerforUSB‐Acore AP
83 USBA_vssa33c USBAground AnaloggroundforUSB‐Acore AP
84 PLLC_AVDD33 PLLVDD PLLpower AP
85 PLLC_AVSS33 PLLGround PLLground AP
86 PLLB_AVDD33 PLLVDD PLLpower AP
87 PLLB_AVSS33 PLLGround PLLground AP
88 PLLA_AVDD33 PLLVDD PLLpower AP
89 PLLA_AVSS33 PLLGround PLLground AP
90 OSCIN OSCInput 27MHzcrystaloscillatorinput I
91 OSCOUT OSCOutput 27MHzcrystaloscillatoroutput O
92 VDD12 DigitalCorePower Digitalcore1.2Vpower P
93 BUTTON1 BUTTON_1 BUTTONorGPIOorMISCI/O
94 BUTTON2 BUTTON_2 BUTTONorGPIOorMISCI/O
95 BUTTON3 BUTTON_3 BUTTONorGPIOorMISC I/O
96 VDD33 VDD DigitalPower3.3V P
97 I2C_CLOCK GPIO GPIO I/O
98 I2C_DATA GPIO GPIO I/O
99 VSS VSS DigitalGround P
100 XD_CE CardReaderI/O CardReaderI/ForGPIO I/O
101 XD_RB CardReaderI/O CardReaderI/ForGPIO I/O
102 XD_WP//SD_WP CardReaderI/O CardReaderI/ForGPIO I/O
103 GPIO//CARD_POWER CardReaderI/O CardReaderI/ForGPIO I/O
104 XD_RE CardReaderI/O CardReaderI/ForGPIO I/O
105 XD_WE CardReaderI/O CardReaderI/ForGPIO I/O
106 XD_RE CardReaderI/O CardReaderI/ForGPIO I/O
107 XD_CE CardReaderI/O CardReaderI/ForGPIO I/O
108 VDD33 DigitalI/OPower DigitalI/O3.3Vpower P
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AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 19/24 AMLOGICProprietary



Pin Pinname Description Comments/Alternateusage Type
109 GPIO GPIO GeneralPurposeI/OorCARD_ENABLE I/O
110 XD_D0 CardReaderI/O CardReaderI/ForGPIO I/O
111 XD_D1 CardReaderI/O CardReaderI/ForGPIO I/O
112 XD_D2//SD_CMD CardReaderI/O CardReaderI/ForGPIO I/O
113 XD_D3//SD_CLK CardReaderI/O CardReaderI/ForGPIO I/O
114 VSS VSS DigitalGround P
115 XD_D4//SD_D0 CardReaderI/O CardReaderI/ForGPIO I/O
116 XD_D5//SD_D1 CardReaderI/O CardReaderI/ForGPIO I/O
117 XD_D6//SD_D2 CardReaderI/O CardReaderI/ForGPIO I/O
118 VDD33 DigitalI/OPower DigitalI/O3.3Vpower P
119 XD_D7//SD_D3 CardReaderI/O CardReaderI/ForGPIO I/O
120 VDD12 VDD DigitalPower1.2V P
121 LCD_R0 LCDVideoOut LCDVideoSignalOutput O
122 LCD_R1 LCDVideoOut LCDVideoSignalOutput O
123 LCD_R2 LCDVideoOut LCDVideoSignalOutput O
124 LCD_R3 LCDVideoOut LCDVideoSignalOutput O
125 LCD_R4 LCDVideoOut LCDVideoSignalOutput O
126 LCD_R5 LCDVideoOut LCDVideoSignalOutput O
127 LCD_G0 LCDVideoOut LCDVideoSignalOutput O
128 LCD_G1 LCDVideoOut LCDVideoSignalOutput O
129 VSS VSS DigitalGround P
130 LCD_G2 LCDVideoOut LCDVideoSignalOutput O
131 LCD_G3 LCDVideoOut LCDVideoSignalOutput O
132 LCD_G4 LCDVideoOut LCDVideoSignalOutput O
133 LCD_G5 LCDVideoOut LCDVideoSignalOutput O
134 VDD33 VDD DigitalPower3.3V P
135 LCD_B0 LCDVideoOut LCDVideoSignalOutput O
136 LCD_B1 LCDVideoOut LCDVideoSignalOutput O
137 LCD_B2 LCDVideoOut LCDVideoSignalOutput O
138 LCD_B3 LCDVideoOut LCDVideoSignalOutput O
139 LCD_B4 LCDVideoOut LCDVideoSignalOutput O
140 LCD_B5 LCDVideoOut LCDVideoSignalOutput O
141 JTAG_TMS//I2C_MASTER_CLOCK JTAGTMS JTAG I/O
142 JTAG_TDI//I2C_MASTER_DATA JTAGTDI JTAG I/O
143 JTAG_TCK//AUDIO_MUTE JTAGTCK JTAG I/O
144 JTAG_TDO//OTG_VBUS JTAGTDO JTAG I/O
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AML6210DPA/VProcessorUserGuideVersion0.4
6/7/2010 20/24 AMLOGICProprietary


5.1Packagepinoutdiagram

JTAG_TDO//OTG_VBUS JTAG_TCK//AUDIO_MUTE JTAG_TDI//I2C_MASTER_DATA JTAG_TMS//I2C_MASTER_CLOCK LCD_B5 LCD_B4 LCD_B3 LCD_B2 LCD_B1 LCD_B0 VDD33 LCD_G5 LCD_G4 LCD_G3 LCD_G2 VSS LCD_G1 LCD_G0 LCD_R5 LCD_R4 LCD_R3 LCD_R2 LCD_R1 LCD_R0 VDD12 XD_D7//SD_D3 VDD33 XD_D6//SD_D2 XD_D5//SD_D1 XD_D4//SD_D0 VSS XD_D3//SD_CLK XD_D2//SD_CMD XD_D1 XD_D0 GPIO 
37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
3
6
AML6210DP


144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109   
VAA3V
APAD0
APAD1
AGND
TCON_STH2
TCON_STH1
TCON_OEV1
TCON_CPV1
VDD33
TCON_STV1
TCON_STV2
VSS33
TCON_VCOM
TCON_OEH
TCON_CPH1
GPIO//XD_INS
GPIO//SD_INS
GPIO//MS_INS
NAND_WE_n
NAND_RDYBSY
NAND_CE_n
NAND_RD_n
VDD12
M1_A_3
M1_A_2
M1_A_1
VDD33
M1_A_0
M1_A_4
M1_A_5
M1_A_6
VSS
M1_A_7
M1_A_8
M1_A_9
M1_A_10

M1_A_11
M1_BA1 M1_BA0
VDD33
M1_CLKO
M1_DQM1 M1_DQM0
M1_SCS0_n
M1_RAS_n
M1_CAS_n
M1_WE_n
M1_D_8
VSS
VDD12
M1_D_9
M1_D_10 M1_D_11 M1_D_12
VDD33
M1_D_13 M1_D_14 M1_D_15
M1_D_7
VSS
M1_D_6 M1_D_5 M1_D_4 M1_D_3 M1_D_2 M1_D_1 M1_D_0
VDD33
REMOTE
PWM_LCD
GPOutput//LCD_PWR_EN
RESET_N
VDD33
XD_CE
XD_RE
XD_WE
XD_RE
GPIO//CARD_POWER
XD_WP//SD_WP
XD_RB
XD_CE
VSS
I2C_DATA
I2C_CLOCK
VDD33
BUTTON3
BUTTON2
BUTTON1
VDD12
OSCOUT
OSCIN
PLLA_AVSS33
PLLA_AVDD33
PLLB_AVSS33
PLLB_AVDD33
PLLC_AVSS33
PLLC_AVDD33
USBA_vssa33c
USBA_vdda33c
USBA_rext
USBA_vdda33t
USBA_dm
USBA_dp
USBA_vssa33t
USBA_vss12
USBA_vdd12
USBA_vbus
USBA_id

108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73

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