Analog Devices EVAL-ADM2867EEBZ User manual

EVAL-ADM2867EEBZ User Guide
UG-1677
One Technology Way •P. O. Box 9106 •Norwood, MA 02062-9106, U.S.A. •Tel: [phone] •Fax: [phone] •www.analog.com
Evaluating the 5.7 kV RMS ADM2867E Signal and Power Isolated
RS-485 Transceiver with ±15 kV IEC ESD
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 12
FEATURES
Simplified evaluation of the 25 Mbps ADM2867E
RS-485 transceiver
2-layer PCB compliant to EN 55032 Class B radiated emissions
Footprint for 10.15 mm × 10.05 mm, 28-lead SOIC_W_FP
package with >8.0 mm creepage and clearance
On-board ADP7104 LDO regulator with jumper options for
simplified evaluation in 5 V or 3.3 V configuration
Flexible, low voltage VIO supply rail to interface with I/O
nodes as low as 1.7 V
Selectable 3.3 V or 5V isolated supply voltage options available
IEC 61000-4-2 ESD protection on the A, B, Y, and Z pins
±12 kV contact discharge and ±15 kV air discharge
SMA connector for high speed 25 Mbps TxD input signal
Optional on-board LTC6900 oscillator to provide TxD
input signal
Screw terminal blocks for power connections, digital signals,
and RS-485 signals
Jumper-selectable enable and disable for digital input signals
Resistors and footprints for termination and loopback test
Test points to measure all signals
EVALUATION KIT CONTENTS
EVAL-ADM2867EEBZ
EQUIPMENT NEEDED
Oscilloscope
Signal generator
3.0 V to 5.5 V supply
1.62 V to 5.5 V supply
DOCUMENTS NEEDED
ADM2867E data sheet
GENERAL DESCRIPTION
The EVAL-ADM2867EEBZ allows the simplified, efficient
evaluation of the 5.7 kV rms ADM2867E signal and power
isolated RS-485 transceiver.
The ADM2867E features an integrated, isolated, dc-to-dc converter
that provides power to the isolated side of the device with no
additional ICs required.
An on-board ADP7104 low dropout (LDO) regulator accepts
an input voltage of 3.3 V to 20 V and regulates the voltage to a
selectable 3.3 V or 5 V supply for the VCC pin of the ADM2867E.
The LDO regulator can be bypassed to power the VCC pin of the
ADM2867E directly.
A flexible logic VIO supply allows the device to operate with a
digital input/output (I/O) voltage from 1.7 V to 5.5 V, which
enables communication with modern nodes using either a 1.8 V
or 2.5 V power supply. The VIO pin can also be supplied from
the ADP7104 regulated supply.
The EVAL-ADM2867EEBZ comes with options to evaluate the
ADM2867E in an individual system. Digital and RS-485 bus
signals are accessible via the screw terminal blocks on the EVAL-
ADM2867EEBZ. Each digital input can be configured via the
on-board jumper options.
Alternative methods can provide the transmit data input (TxD)
signal to the device. An optional LTC6900 oscillator is included
on the EVAL-ADM2867EEBZ and can be configured to provide a
clock signal as the TxD digital input within a 1 kHz to 20 MHz
range. For optimal signal integrity, use the on-board Subminiature
Version A (SMA) connector to connect an external TxD signal at
high data rates up to 25 Mbps.
The EVAL-ADM2867EEBZ has a footprint for the full duplex,
isolated, RS-485 transceiver in a 10.15 mm × 10.05 mm, 28-lead,
small outline, wide body with fine pitch (SOIC_W_FP) package.
The EVAL-ADM2867EEBZ is populated with the ADM2867E
5.7 kV rms, isolated RS-485 transceiver.
For full details on the ADM2867E, see the ADM2867E data sheet,
which must be used in conjunction with this user guide when
using the EVAL-ADM2867EEBZ.

UG-1677 EVAL-ADM2867EEBZ User Guide
Rev. 0 | Page 2 of 12
TABLE OF CONTENTS
Features .............................................................................................. 1
Evaluation Kit Contents................................................................... 1
Equipment Needed........................................................................... 1
Documents Needed.......................................................................... 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Evaluation Board Photograph......................................................... 3
Evaluation Board Hardware............................................................ 4
Setting Up the Evaluation Board................................................ 4
Input and Output Connections .................................................. 4
Radiated Emissions .......................................................................4
EN 55032 Radiated Emissions Test Results................................5
Other Board Components............................................................6
Full Duplex RS-485 Transceivers Loopback Test......................7
IEC 61000-4-2 Electrostatic Discharge (ESD) Protection.......7
Evaluation Board Schematic and Artwork.....................................9
Ordering Information.................................................................... 11
Bill of Materials........................................................................... 11
REVISION HISTORY
5/2020—Revision 0: Initial Version

EVAL-ADM2867EEBZ User Guide UG-1677
Rev. 0 | Page 3 of 12
EVALUATION BOARD PHOTOGRAPH
Figure 1.
22060-001

UG-1677 EVAL-ADM2867EEBZ User Guide
Rev. 0 | Page 4 of 12
EVALUATION BOARD HARDWARE
SETTING UP THE EVALUATION BOARD
The EVAL-ADM2867EEBZ is powered via the VREG_IN
connection on the P1 screw terminal connector. The voltage
connected to VREG_IN on the P1 screw connector can either be
regulated or connected directly to the VCC pin of the ADM2867E.
Insert the LK8 jumper into Position A to power the ADM2867E
directly from the VREG_IN terminal.
The on-board ADP7104 voltage regulator accepts a voltage from
3 V to 20 V on the VREG_IN terminal and can supply either a
3.3 V or a 5 V regulated supply to the VCC pin of the ADM2867E.
Select the regulated voltage via the LK8 jumper. Insert the
LK8 jumper into Position B to operate the device with a
regulated VCC supply of 3.3 V. Insert the LK8 jumper into
Position C to operate the device with a regulated VCC supply of
5.5 V. The VCC pin is fitted with a 10 μF decoupling capacitor
(C4) and a 0.1 μF decoupling capacitor (C5).
To power the VIO supply pin of the ADM2867E from the VCC
terminal block and operate the VIO and VCC supply pins at the same
voltage, insert Jumper LK9. To power the VIO supply pin from
a separate VIO terminal block, remove Jumper LK9. In this
configuration, the VIO input of the P1 terminal block can be
connected to a separate, low voltage logic supply between 1.7 V
and 5.5 V. A 0.1 μF decoupling capacitor (C7) is fitted at the
connector between the VIO pin and GND1pins of the ADM2867E.
A footprint for a second 10 μF capacitor (C11) can provide
additional decoupling capacitance to the VIO pin.
Use the VSEL pin of the ADM2867E to select the isolated supply
voltage for the RS-485 transceiver. To configure the device to
output a 3.3 V isolated supply voltage, connect the VSEL pin of the
ADM2867E to the GNDISO pins. To configure the device to output
a 5 V isolated supply voltage, connect the VSEL pin of the
ADM2867E to the VISOOUT pin. The R6 and R7 resistors can be
inserted or removed as needed to make these connections. Avoid
inserting the R6 and R7 resistors together because this connection
shorts the power and ground pins together.
See Table 2 and Table 3 for more details on the jumper and
power supply connections. The corresponding labeled test points
allow power supply monitoring on the EVAL-ADM2867EEBZ
with the probe referenced to ground.
INPUT AND OUTPUT CONNECTIONS
Digital input and output signals are connected via the P2 and
P3 screw terminal blocks to allow wire connections from the
EVAL-ADM2867EEBZ to a signal generator. The EVAL-
ADM2867EEBZ includes screw terminals for the TxD signal,
receiver data output (RxD) signal, receiver enable (RE), and driver
enable (DE) test points. Screw terminals for the driver inversion
function (INVD) and receiver inversion function (INVR) are
also available on P3. Alternatively, jumper connections can
connect these signals to the VIO pin or GND1pins of the
ADM2867E (see Table 2).
Connections to the RS-485 bus are made via the P7 and P8 screw
terminal blocks. The EVAL-ADM2867EEBZ has four bus input
and output signals: Signal A for noninverting input signals, Signal B
for inverting input signals, Signal Y for noninverting output signals,
and Signal Z for inverting output signals. The bus cables also
include a common ground connection and can be connected to the
P8 screw terminal block of the EVAL-ADM2867EEBZ. Test points
are available on the EVAL-ADM2867EEBZ and are appropriately
labeled for all digital and bus input and output signals.
RADIATED EMISSIONS
The EVAL-ADM2867EEBZ is a 2-layer printed circuit board
(PCB) that meets the EN 55032 Class B radiated emissions
requirements under full load while operating at the maximum
data rate. Advances in the isolated dc-to-dc converter eliminate
the need for complex mitigation techniques, such as edge guarding
and embedded stitching capacitance. Two 0402, surface-mount
ferrite beads are used to suppress high frequency noise and
minimize the amount of noise radiated by the ADM2867E.
The recommended ferrite beads have a high impedance in the
100 MHz to 1 GHz frequency range (see Table 1). The EVAL-
ADM2867EEBZ is populated with the BLM15HD182SN1 ferrite
beads on E1 and E2.
Table 1. Recommended Surface-Mount Ferrite Beads
Manufacturer Part Number
Murata Electronics BLM15HD182SN1
Taiyo Yuden BKH1005LM182-T

EVAL-ADM2867EEBZ User Guide UG-1677
Rev. 0 | Page 5 of 12
To maximize the margin to the EN 55032 Class B specification,
adhere to the following guidelines:
 Ensure that the decoupling capacitors are placed as close to
the corresponding ADM2867E pins as possible.
 Place a 10 μF capacitor (C4) and a 0.1 μF capacitor (C5)
between the VCC pin and GND1pins of the ADM2867E.
 Place a 0.1 μF capacitor (C7) between the VIO pin and
GND1pins of the ADM2867E.
 Connect Pin 24, Pin 26, and Pin 28 of the ADM2867E
together to form a single GNDISO net. Connect this net to the
GND2pins through the E1 ferrite bead.
 Place a 0.1 μF capacitor (C9) between the VISOOUT supply pin
and the GNDISO net of the ADM2867E.
 Connect the VISOOUT pin to the VISOIN pin of the ADM2867E
through the E2 ferrite bead.
 Place a 10 μF capacitor (C12) and a 0.1 μF capacitor (C8)
between the VISOIN supply pin (Pin 23) and the GND2pins
(Pin 22) of the ADM2867E.
 Remove any metal planes or floods from the area around
or under the GNDISO net and VISOOUT net.
The EVAL-ADM2867EEBZ designed according to these
guidelines meets the EN 55032 Class B requirements with
margin. See Figure 2, Figure 7, and Figure 8 for further details
on the recommended PCB layout.
Figure 2. Layout Guidelines to Achieve EN 55032 Class B
EN 55032 RADIATED EMISSIONS TEST RESULTS
The EVAL-ADM2867EEBZ meets the EN 55032 and CISPR32
Class B requirements for radiated emissions with margin. The
testing was performed in worst case conditions under a full
54 Ω load with both the transceiver and receiver transmitting
at 25 Mbps. Figure 3 shows the results obtained in a 10 meter,
semianechoic chamber, which are below the Class B limit.
Figure 3. CISPR32/EN 55032 Radiated Emissions Test
Table 2. Jumper Configurations
Link Jumper Connection Description
LK1 A Connects the RE input of the ADM2867E to the VIO pin. This setting disables the receiver.
B Connects the RE input of the ADM2867E to the RE terminal on the P2 connector.
C Connects the RE input of the ADM2867E to the GND1pins. This setting enables the receiver.
LK2 A Connects the DE input of the ADM2867E to the VIO pin. This setting enables the driver.
B Connects the DE input of the ADM2867E to the DE terminal on the P2 connector.
C Connects the DE input of the ADM2867E to the GND1pins. This setting disables the driver.
D Connects the DE input of the ADM2867E to the RE input signal. Therefore, the input for both RE and DE
is set by the LK1 jumper. This setting ensures that when the driver is enabled, the receiver is disabled, or
when the driver is disabled, the receiver is enabled.
LK3 AB Connects the TxD input of the ADM2867E and J1 SMA connector to the TxD terminal on the P3 connector.
BC Connects the TxD input of the ADM2867E and J1 SMA connector to the LTC6900 oscillator output.
To configure the oscillator frequency to be between 1 kHz and 12.5 MHz, set the R2 and R3 resistors.
Only use this option when the VIO supply input is between 3 V to 5.5 V.
Not inserted Connects the TxD input of the ADM2867E to the J1 SMA connector.
LK4 A Connects the INVD input of the ADM2867E to the VIO pin. This setting enables the driver inversion feature.
B Connects the INVD input of the ADM2867E to the INVD terminal on the P3 connector.
C Connects the INVD input of the ADM2867E to the GND1pins. This setting is used for normal driver operation.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
GND
1
GND
1
V
CC
V
IO
GND
1
GND
1
GND
1
10µF
0.1µF
0.1µF
V
SEL
GND
ISO
V
ISOOUT
GND
2
V
ISOIN
GND
ISO
RxD
RE
DE
INVR
GND
1
INVD
TxD
GND
2
A
B
GND
2
GND
2
Y
Z
GND
ISO
METAL KEEP OUT
ADM2867E
TOP VIEW
(Not to Scale)
0.1µF
10µFE1
E2
0.1µF
22060-002
80
70
60
50
40
30
20
10
0
RADI
A
TED FIELD STRENGTH (dBµV/m)
30 100
FREQUENCY (MHz)
1000
CLASS B
CLASS A
22060-009

UG-1677 EVAL-ADM2867EEBZ User Guide
Rev. 0 | Page 6 of 12
Link Jumper Connection Description
LK5 A Connects the INVR input of the ADM2867E to the VIO pin. This setting enables the receiver inversion feature.
B Connects the INVR input of the ADM2867E to the INVR terminal on the P3 connector.
C Connects the INVR input of the ADM2867E to the GND1pins. This setting is used for normal receiver operation.
LK6 Inserted Connects the Pin B of the ADM2867E to Pin Z.
Not inserted Disconnects the Pin B of the ADM2867E from Pin Z.
LK7 Inserted Connects the Pin A of the ADM2867E to Pin Y.
Not inserted Disconnects the Pin A of the ADM2867E from Pin Y.
LK8 A
Connects the V
CC
pin of the ADM2867E to the VREG_IN terminal on the P1 connector. This option bypasses the
ADP7104 regulator and allows an external power supply to connect directly to the VCC pin of the ADM2867E.
B Powers the VCC pin of the ADM2867E with a regulated 3.3 V power supply from the ADP7104. The ADP7104
must be supplied with at least 4 V through the VREG_IN terminal on the P1 connector.
C Powers the VCC pin of the ADM2867E with a regulated 5 V power supply from the ADP7104. The ADP7104
must be supplied with at least 6 V through the VREG_IN terminal on the P1 connector.
LK9 Inserted Connects the VCC pin of the ADM2867E to the VIO pin.
Not inserted Disconnects the VCC pin of the ADM2867E from the VIO pin. The VIO pin is powered from the VIO terminal
on the P1 connector.
LK10 Inserted Connects the 120 Ω RT2 termination resistor across the Pin A and Pin B of the ADM2867E.
Not inserted
Disconnects the 120 Ω RT2 termination resistor across the Pin A and Pin B of the ADM2867E.
LK11 Inserted Connects the 120 Ω RT1 termination resistor across the Pin Y and Pin Z of the ADM2867E.
Not inserted Disconnects the 120 Ω RT1 termination resistor across the Pin Y and Pin Z of the ADM2867E.
OTHER BOARD COMPONENTS
The EVA L -ADM2867EEBZ has footprints for the RT1 and RT2
termination resistors. Two 120 Ω termination resistors are fitted to
the EVA L -ADM2867EEBZ, but these resistors can be removed or
replaced with a resistor of a different value as needed. Insert the
LK11 jumper to add a 120 Ω load to the RS-485 driver. When LK6,
LK7, and LK10 are inserted, an additional 120 Ω termination
resistor is connected, resulting in a 60 Ω load on the RS-485 driver.
Biasing Resistors for Bus Idle Fail-Safe
The ADM2867E has a built in receiver fail-safe for the bus idle
condition, but there are footprints on the EVA L-ADM2867EEBZ
for fitting the R10 and R11 pull-up resistors to the VISO supply on
Pin A and Pin Y of the ADM2867E, as well as the R12 and R13
pull-down resistors to the GND2supply pins on Pin B and Pin Z.
These resistors can be fitted if the user is connecting to other
devices that require external biasing resistors on the bus. The exact
value required for a 200 mV minimum differential voltage in bus
idle condition depends on the minimum supply voltage and the
termination scheme. For 5 V transceiver operation, 1140 Ω is
recommended. For 3.3 V transceiver operation, 900 Ω is
recommended.
See the AN-960 Application Note, RS-485/RS-422 Circuit
Implementation Guide for more information about the bus idle
fail-safe.
On-Board LTC6900 Oscillator
An LTC6900 clock oscillator is provided on the EVAL-
ADM2867EEBZ to allow efficient evaluation of the device
without the need for an external signal source.
To use the LTC6900 oscillator for evaluation, insert the LK3 jumper
into Position BC. This setting connects the clock oscillator output
to the TxD input pin of the ADM2867E.
The R2 and R3 resistors can be used to configure the switching
frequency of the clock oscillator within the 100 kHz to 12.5 MHz
range. Calculate the frequency using the following equation:
20 kΩ
=10 MHz  16 kΩ (R2 + R3) 2 MΩ
(R2 + R3)
OSC
f

≤≤



where fOSC is the output frequency of the LTC6900 oscillator.
The LTC6900 oscillator is powered from the VIO supply, and
must only be used when the VIO supply voltage is between 2.7 V
and 5.5 V.
ADP7104 LDO Regulator
The EVA L -ADM2867EEBZ features an on-board ADP7104
LDO regulator that allows flexible power supply configurations
during evaluation.
To use the on-board regulator, insert the LK8 jumper into
Position B or Position C. This setting connects the regulator output
to the VCC pin of the ADM2867E. In this configuration, power
must be supplied to the VREG_IN input on the P1 connector.
The ADP7104 LDO regulator can be configured to provide
regulated 3.3 V or 5 V power to the VCC pin of the ADM2867E via
the LK8 jumper. When using the ADP7104 regulator, insert the
LK8 jumper at Position C to provide a regulated 5 V power supply
to the VCC pin of the ADM2867E. Insert the LK8 jumper at
Position B to provide a 3.3 V power supply to the VCC pin of the
ADM2867E. Note that when LK8 is inserted at Position B, 5 V
transceiver operation is not supported.

EVAL-ADM2867EEBZ User Guide UG-1677
Rev. 0 | Page 7 of 12
Insert the LK8 jumper into Position A to bypass the regulator
and power of the ADM2867E directly from the VREG_IN input
on the P1 connector. In this configuration, the VREG_IN input
on the P1 connector supports a voltage range of 3 V to 5.5 V.
Table 3 lists the supported power supply configurations and the
associated jumper configurations.
FULL DUPLEX RS-485 TRANSCEIVERS
LOOPBACK TEST
To set up a loopback test with the EVAL-ADM2867EEBZ, close
the LK6 and LK7 jumpers. The test details are shown in Table 3
and in Figure 5. A signal generator is connected to the TxD pin,
which allows verification of the bus signals and the receiver output.
Note that the jumper position for LK1 is Position C, LK2 is
Position A, LK4 is Position C, and LK5 is Position C on the
EVAL-ADM2867EEBZ. See Table 3 for the jumper configurations
required for different power supply configurations. The LK11
and LK12 jumpers can be inserted to terminate the transmitter
and the receiver with 120 Ω resistors. Connect both these jumpers
while the EVAL-ADM2867EEBZ is configured for the loopback
test to ensure that the driver is terminated with a standard RS-485
load of 60 Ω (bus terminated at both ends by 120 Ω).
IEC 61000-4-2 ELECTROSTATIC DISCHARGE
(ESD) PROTECTION
The EVAL-ADM2867EEBZ is tested to achieve protection
against IEC 61000-4-2 ESD to ±12 kV (contact) and ±15 kV (air)
on Pin A, Pin B, Pin Y, and Pin Z of the ADM2867E.
The IEC 61000-4-2 ESD standard describes testing using two
coupling methods known as contact discharge and air discharge.
Contact discharge implies direct contact between the discharge gun
and the equipment under test (EUT).
During air discharge testing, the charged electrode of the discharge
gun is moved toward the EUT until a discharge occurs as an arc
across the air gap. The discharge gun does not make direct
contact with the EUT.
During testing, Pin A, Pin B, Pin Y, and Pin Z of the ADM2867E
are subjected to at least 10 positive and 10 negative single
discharges with a 1 sec interval between each pulse. The highest
specified IEC 61000-4-2 ESD test is Level 4, which defines a contact
discharge voltage of ±8 kV and an air discharge voltage of ±15 kV.
Figure 4 shows the 8 kV contact discharge current waveform, as
described in the ADM2867E data sheet, which has a peak current
(IPEAK) of 30 A. The IEC 61000-4-2 waveform parameters include
rise times (tR) of <1 ns and pulse widths of ~60 ns.
Figure 4. IEC 61000-4-2 ESD Waveform (8 kV)
Figure 5. Full Duplex RS-485 Loopback Test
I
PEAK
30A
30ns 60ns
16AI
30ns
I
60ns
8A
10%
t
R
= 0.7ns TO 1ns
t
90%
22060-003
22060-004
OSCILLOSCOPE
GND
2
A
RxD
RE
DE
TxD
B
Z
Y
GND
2
RxD
LK12
LK7
A
B
Z
Y
P1 P7
EVAL-ADM2867EEBZ
4V TO 20V
POWER
SUPPLY
SIGNAL
GENERATOR
LK6
LK11
P8
INVD
INVR
TxD
LK1LK2LK4LK5
LK8
LK10
LK9

UG-1677 EVAL-ADM2867EEBZ User Guide
Rev. 0 | Page 8 of 12
Table 3. Input Supply Configurations
Jumper LK8 VSEL Pin VREG_IN Input Voltage Range VCC Supply VISO Supply
A Low Not used Power VCC directly on connector P1 with a
supply voltage between 3 V and 5.5 V
3.3 V isolated output
High Not used Power VCC directly on connector P1 with a
supply voltage between 4.5 V and 5.5 V
5 V isolated output
B Low 6 V to 20 V Regulator provides 5 V supply to VCC 3.3 V isolated output
High Invalid condition, 5 V isolated output is
not supported with VCC < 4.5 V
B High
C Low 4 V to 20 V Regulator provides 3.3 V supply to VCC 3.3 V isolated output
High 6 V to 20 V Regulator provides 5 V supply to VCC 5 V isolated output

EVAL-ADM2867EEBZ User Guide UG-1677
Rev. 0 | Page 9 of 12
EVALUATION BOARD SCHEMATIC AND ARTWORK
Figure 6. EVAL-ADM2867EEBZ Schematic
20kΩ
0Ω
0Ω
0.1uF
120Ω
390pF
LTC6900IS5#PBF
1µF
1µF
390pF
GND
ADP7104ARDZ
2213S-06G
GND 1
GND1
13.0kΩ
600Ω AT 100MHz
0Ω
GND1
GND1
GND1
GND 2
0.1µF
10µF 0.1µF
0.1µF
GND1
0.1µF
120Ω GND2
DNI DNI
10µF
GND1
DNI
DNI
22.1kΩ
10µF GND2
GND1
0Ω
GND2
DNI
GND2
600Ω AT 100MHz
GND1
ADM2867EBRNZ
R3
C3
R4
R7
C2
C13C6
R8
R10 R11
C12
C9
C8
C1
R2
C7
C11
C4 C5
LK11 LK10
E5 E4
LK3
LK9
VIO VISOGND2
GND1
VCC
R14
INVR INVD
TxD
DE RE RxD
Y Z B
R6
A
J1
R1
P3 P2
P1
LK5 LK4
R13 R12
RT2 RT1
P7 P8
E2 E1
LK7
LK6
LK2 LK1
U2
U1
U3
INVR_1
TxD_1
VREG VCC
GND1
VREG_IN
RE_1 DE_1
VCC
TxD_1
VIO
VREGVREG_IN
VIO
A Z
GND
VIO
INVD_1
VIO RxD DE TxD INVD INVR
Y
VIO
VIO
VIO
B
VISO
VISO VISO
2
1
1
2
2
2 2
1 1
3 2
1
21
3 2 1 3 1 2 3 1
6 4 2
5 3 1
5 3 1
6 4 2
3 2 1 3 2 1
2 2
1 1
2
2
1
1
8 6 4 2
7 5 3 1
6 4 2
5 3 1
18 27
PAD
4
63 5
1
35
2
4
18 17 27 25 23
7 4
11
8
13 12
28 26 24 22 21 16 15
14
6 5 3 2 1
10 19
20
9
RE_1
RE
OUT
DIV SET
GND
18.2kΩ
R5
C
B A
C
B A
SENSE/ADJ
PAD
VIN PG GND EN/UVLO NC
GND
VOUT
15pF C10
D C
B A
VREG
LK8
6 4 2
5 3 1
C
B A
GND1 C
B AGND
ISO
VSEL
GNDISO
VISOOUT
GNDISO
VISOIN
GND2 GND2
A B
Z
Y
GND2 GND2
GND1 INVR INVD TxD DE RE RxD VIO GND1 GND1 VCC GND1 GND1 GND1
22060-005
V+
A B C

UG-1677 EVAL-ADM2867EEBZ User Guide
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Figure 7. EVAL-ADM2867EEBZ Component Side, Layer 1
Figure 8. EVAL-ADM2867EEBZ, Layer 2
Figure 9. EVAL-ADM2867EEBZ, Silkscreen
2
2060-006
2
2060-007
2
2060-008

EVAL-ADM2867EEBZ User Guide UG-1677
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ORDERING INFORMATION
BILL OF MATERIALS
Table 4. EVAL-ADM2867EEBZ Bill of Materials
Qty Reference Designator Description Manufacturer Part Number
10 A, B, DE, INVD, INVR, RE,
RxD, TxD, Y, Z
Test points, yellow Keystone Electronics 36-5004-ND
5 C1, C5, C7 to C9 Capacitors, 0.1 µF, 0402 Kemet C0402C104K4RACTU
2 C2, C3 Capacitors, 1 µF, 0805 Murata GCM21BR71E105KA56L
2 C4, C12 Capacitors, 10 µF, 0805 TDK C2012X5R1E106K085AC
2 C6, C13 Capacitors, 390 pF, 0603 AVX Corporation 0603YC391KAT2A
1 C10 Capacitor, 15 pF, 0402 Murata GCM1555C1H150FA16D
1 C11 Capacitor, 10 µF, 0603 TDK C1608X5R1A106M080AC
2 E1, E2 Ferrite beads, 0402 Murata BLM15HD182SN1D
2 E4, E5 Ferrite beads, 0603, 600 Ω at 100 MHz Murata BLM18HE601SN1D
2 GND1, GND2 Test points, black Components Corporation TP-105-01-00
1 J1 Coaxial, straight SMA connector TE Connectivity 5-1814832-1
4 LK1, LK4, LK5, LK8 6-pin (3 × 2), 0.1 inch headers and shorting block Multicomp 2213S-06G
1 LK2 8-pin (4 × 2), 0.1 inch header and shorting block Multicomp 2213S-08G
1 LK3 3-pin (3 × 1), 0.1 inch header and shorting block Molex 22-28-4033
5 LK6, LK7, LK9 to LK11 2-pin (1 × 2), 0.1 inch headers and shorting block Harwin M20-9990246
5 P1 to P3, P7, P8 Three-way terminal blocks Wurth Elektronik 691131710003
3 R1, R3, R7, R8 Resistors, 0 Ω, 0603 Vishay CRCW0603000ZRT1
1 R2 Resistor, 20 kΩ, 0603 Panasonic ERJ-3EKF2002V
1 R4 Resistor, 13 kΩ, 0603 Panasonic ERJ-3EKF1302V
1 R5 Resistor, 18.2 kΩ, 0603 Panasonic ERJ-3EKF1822V
1 R6 Resistor, do not install, 0603 Not applicable Not applicable
1 R14 Resistor, 22.1 kΩ, 0603 Panasonic ERJ-3EKF2212V
4 R10 to R13 Resistors, do not install, 0805 Not applicable Not applicable
2 RT1, RT2 Resistors, 120 Ω, 0805 Panasonic ERJ-P6WF1200V
1 U1 Low power, 1 kHz to 20 MHz oscillator Analog Devices LTC6900IS5#PBF
1 U2 Low noise CMOS LDO Analog Devices ADP7104ARDZ-R7
1 U3 25 Mbps, 5.7 kV signal and power isolated RS-485
transceiver
Analog Devices ADM2867EBRNZ
3 VCC, VIO, VISO Test points, red Components Corporation TP-105-01-02

UG-1677 EVAL-ADM2867EEBZ User Guide
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NOTES
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD.Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the“Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until
you have read and agreed to the Agreement.Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices,
Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit anyThird Party to access the Evaluation Board. As used herein, the term
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ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer
may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
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UG22060-5/20(0)