Analog Devices ADM1063 User manual

Multisupply Supervisor/Sequencer
with ADC and Temperature Monitoring
ADM1063
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2005 Analog Devices, Inc. All rights reserved.
FEATURES
Complete supervisory and sequencing solution for up to
10 supplies
10 supply fault detectors enable supervision of supplies to
better than 1% accuracy
5 selectable input attenuators allow supervision of
supplies up to
14.4 V on VH
6 V on VP1 to VP4
5 dual-function inputs, VX1 to VX5
High impedance input to supply fault detector with
thresholds between 0.573 V and 1.375 V
General-purpose logic input
10 programmable output drivers, PDO1 to PDO10
Open collector with external pull-up
Push/pull output, driven to VDDCAP or VPn
Open collector with weak pull-up to VDDCAP or VPn
Internally charge-pumped high drive for use with external
N-FET (PDO1 to PDO6 only)
Sequencing engine (SE) implements state machine control of
PDO outputs
State changes conditional on input events
Enables complex control of boards
Power-up and power-down sequence control
Fault event handling
Interrupt generation on warnings
Watchdog function can be integrated in SE
Program software control of sequencing through SMBus
Complete voltage margining solution for 6 voltage rails
6 voltage output, 8-bit DACs (0.300 V to 1.551 V) allow voltage
adjustment via dc-to-dc converter trim/feedback node
12-bit ADC for readback of all supervised voltages
1 internal and 2 external temperature sensors
Reference input, REFIN, has 2 input options
Driven directly from 2.048 V (±0.25%) REFOUT pin
More accurate external reference for improved
ADC performance
Device powered by the highest of VP1 to VP4, VH for
improved redundancy
User EEPROM: 256 bytes
Industry-standard, 2-wire bus interface (SMBus)
Guaranteed PDO low with VH, VPn = 1.2 V
40-lead, 6 mm × 6 mm LFCSP and
48-lead, 7 mm × 7 mm TQFP packages
FUNCTIONAL BLOCK DIAGRAM
04632-001
PDO7
PDO8
PDO9
PDO10
PDOGND
VDDCAP
VDD
ARBITRATOR
GNDVCCP
VX1
VX2
VX3
VX4
VX5
VP1
VP2
VP3
VP4
VH
A
GND
PROGRAMMABLE
RESET
GENERATORS
(SFDs)
DUAL-
FUNCTION
INPUTS
(LOGIC INPUTS
OR
SFDs)
SEQUENCING
ENGINE
CONFIGURABLE
OUTPUT
DRIVERS
(HV CAPABLE
OF DRIVING
GATES OF
N-CHANNEL FET)
CONFIGURABLE
OUTPUT
DRIVERS
(LV CAPABLE
OF DRIVING
LOGIC SIGNALS)
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
SDA SCL A1 A0
SMBus
INTERFACE
REFOUTREFIN REFGND
VREF
12-BIT
SAR ADC
MUX
EEPROM
CLOSED-LOOP
MARGINING SYSTEM
ADM1063
D2ND1N D2PD1P
TEMP
SENSOR INTERNAL DIODE
Figure 1.
APPLICATIONS
Central office systems
Servers/routers
Multivoltage system line cards
DSP/FPGA supply sequencing
In-circuit testing of margined supplies
GENERAL DESCRIPTION
The ADM1063 is a configurable supervisory/sequencing device
that offers a single-chip solution for supply monitoring and
sequencing in multiple supply systems. In addition to these
functions, the ADM1063 integrates a 12-bit ADC and six 8-bit
voltage output DACs. These circuits can be used to implement a
closed-loop margining system, which enables supply adjustment
by altering either the feedback node or reference of a dc-to-dc
converter using the DAC outputs.
(continued on Page 3)

ADM1063
Rev. 0 | Page 2 of 36
TABLE OF CONTENTS
General Description ......................................................................... 3
Specifications..................................................................................... 4
Pin Configurations and Function Descriptions ........................... 7
Absolute Maximum Ratings............................................................ 8
Thermal Characteristics .............................................................. 8
ESD Caution.................................................................................. 8
Typical Performance Characteristics ............................................. 9
Powering the ADM1063 ................................................................ 12
Inputs................................................................................................ 13
Supply Supervision..................................................................... 13
Programming the Supply Fault Detectors............................... 13
Input Comparator Hysteresis.................................................... 14
Input Glitch Filtering ................................................................. 14
Supply Supervision with VXn Inputs ...................................... 14
VXn Pins as Digital Inputs........................................................ 15
Outputs ............................................................................................ 16
Supply Sequencing Through Configurable
Output Drivers............................................................................ 16
Sequencing Engine ......................................................................... 17
Overview...................................................................................... 17
Warnings...................................................................................... 17
SMBus Jump (Unconditional Jump)........................................ 17
Sequencing Engine Application Example ............................... 18
Sequence Detector...................................................................... 19
Monitoring Fault Detector ........................................................ 19
Timeout Detector ....................................................................... 19
Fault Reporting........................................................................... 19
Voltage Readback............................................................................ 20
Supply Supervision with the ADC ........................................... 20
Supply Margining ........................................................................... 21
Overview ..................................................................................... 21
Open-Loop Margining .............................................................. 21
Closed-Loop Supply Margining ............................................... 21
Writing to the DACs .................................................................. 22
Choosing the Size of the Attenuation Resistor....................... 22
DAC Limiting and Other Safety Features............................... 22
Temperature Measurement System.............................................. 23
Remote Temperature Measurement ........................................ 23
Applications Diagram .................................................................... 25
Communicating with the ADM1063........................................... 26
Configuration Download at Power-Up................................... 26
Updating the Configuration ..................................................... 26
Updating the Sequencing Engine............................................. 27
Internal Registers........................................................................ 27
EEPROM ..................................................................................... 27
Serial Bus Interface..................................................................... 27
SMBus Protocols for RAM and EEPROM.............................. 29
Write Operations........................................................................ 29
Read Operations......................................................................... 31
Outline Dimensions....................................................................... 33
Ordering Guide .......................................................................... 34
REVISION HISTORY
4/05—Revision 0: Initial Version

ADM1063
Rev. 0 | Page 3 of 36
GENERAL DESCRIPTION
(continued from Page 1)
Supply margining can be performed with a minimum of
external components. The margining loop can be used for
in-circuit testing of a board during production (for example, to
verify the board’s functionality at −5% of nominal supplies),
or it can be used dynamically to accurately control the output
voltage of a dc-to-dc converter.
The device also provides up to 10 programmable inputs for
monitoring under, over, or out-of-window faults on up to 10
supplies. In addition, 10 programmable outputs can be used as
logic enables. Six of these programmable outputs can provide
up to a 12 V output for driving the gate of an N-channel FET,
which can be placed in the path of a supply.
Temperature measurement is possible with the ADM1063. The
device contains one internal temperature sensor and two pairs
of differential inputs for remote thermal diodes. These are
measured by the 12-bit ADC.
The logical core of the device is a sequencing engine. This state-
machine-based construction provides up to 63 different states.
This design enables very flexible sequencing of the outputs,
based on the condition of the inputs.
The device is controlled via configuration data that can be
programmed into an EEPROM. The entire configuration can
be programmed using an intuitive GUI-based software package
provided by ADI.
04632-002
GPI SIGNAL
CONDITIONING
SFD
GPI SIGNAL
CONDITIONING
SFD
SFD
SFD
SELECTABLE
ATTENUATOR
SELECTABLE
ATTENUATOR
DEVICE
CONTROLLER
OSC
EEPROM
SDA SCL A1 A0
SMBus
INTERFACE
REFOUTREFIN REFGND
VREF
12-BIT
SAR ADC
ADM1063
CONFIGURABLE
O/P DRIVER
(HV) PDO1
PDO2
PDOGND
PDO3
VCCPGND
PDO4
PDO5
PDO8
PDO9
CONFIGURABLE
O/P DRIVER
(HV) PDO6
CONFIGURABLE
O/P DRIVER
(LV) PDO7
CONFIGURABLE
O/P DRIVER
(LV) PDO10
SEQUENCING
ENGINE
VX2
VX3
VX4
VP2
VP3
VP4
VH
VP1
VX1
AGND
VX5
VDDCAP VDD
ARBITRATOR
REG 5.25V
CHARGE PUMP
D2ND1N D2PD1P
TEMP
SENSOR INTERNAL DIODE
Figure 2. Detailed Block Diagram

ADM1063
Rev. 0 | Page 4 of 36
SPECIFICATIONS
VH = 3.0 V to 14.4 V1, VPn = 3.0 V to 6.0 V1, TA= −40°C to +85°C, unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
POWER SUPPLY ARBITRATION
VH, VPn 3.0 V Minimum supply required on one of VH, VPn.
VP 6.0 V Maximum VDDCAP = 5.1 V, typical.
VH 14.4 V VDDCAP = 4.75 V.
VDDCAP 2.7 4.75 5.4 V Regulated LDO output.
CVDDCAP 10 µF Minimum recommended decoupling capacitance.
POWER SUPPLY
Supply Current, IVH, IVPn 4.2 6 mA
VDDCAP = 4.75 V, PDO1 to PDO10 off, DACs off,
ADC off.
Additional Currents
All PDO FET Drivers On 1 mA VDDCAP = 4.75 V, PDO1 to PDO6 loaded with 1 µA
each, PDO7 to PDO10 off.
Current Available from VDDCAP 2 mA Maximum additional load that can be drawn from
all PDO pull-ups to VDDCAP.
DACs Supply Current 2.2 mA Six DACs on with 100 µA maximum load on each.
ADC Supply Current 1 mA Running round-robin loop.
EEPROM Erase Current 10 mA 1 ms duration only, VDDCAP = 3 V.
SUPPLY FAULT DETECTORS
VH Pin
Input Attenuator Error ±0.05 % Midrange and high range.
Detection Ranges
High Range 6 14.4 V
Midrange 2.5 6 V
VPn Pins
Input Attenuator Error ±0.05 % Low range and midrange.
Detection Ranges
Midrange 2.5 6 V
Low Range 1.25 3 V
Ultralow Range 0.573 1.375 V No input attenuation error.
VXn Pins
Input Impedance 1 MΩ
Detection Range
Ultralow Range 0.573 1.375 V No input attenuation error.
Absolute Accuracy ±1 % VREF error + DAC nonlinearity + comparator offset
error + input attenuation error.
Threshold Resolution 8 Bits
Digital Glitch Filter 0 µs Minimum programmable filter length.
100 µs Maximum programmable filter length.
ANALOG-TO-DIGITAL CONVERTER
Signal Range 0 VREFIN V The ADC can convert signals presented to the VH,
VPn, and VXn pins. VPn and VH input signals are
attenuated depending on selected range. A signal
at the pin corresponding to the selected range is
from 0.573 V to 1.375 V at the ADC input.
Input Reference Voltage on REFIN Pin, VREFIN 2.048 V
Resolution 12 Bits
INL ±2.5 LSB Endpoint corrected, VREFIN = 2.048 V.
Gain Error ±0.05 % VREFIN = 2.048 V.

ADM1063
Rev. 0 | Page 5 of 36
Parameter Min Typ Max Unit Test Conditions/Comments
Conversion Time 0.44 ms One conversion on one channel
84 ms All 12 channels selected, 16x averaging enabled
Offset Error ±2 LSB VREFIN = 2.048 V
Input Noise 0.25 LSBrms Direct input (no attenuator)
TEMPERATURE SENSOR2
Local Sensor Accuracy ±3 °C VDDCAP = 4.75 V
Local Sensor Supply Voltage Coefficient −1.7 °C/V
Remote Sensor Accuracy ±3 °C VDDCAP = 4.75 V
Remote Sensor Supply Voltage Coefficient −3 °C
Remote Sensor Current Source 200 µA High level
12 µA Low level
Temperature for Code 0x800 0 °C VDDCAP = 4.75 V
Temperature for Code 0xC00 128 °C VDDCAP = 4.75 V
Temperature Resolution per Code 0.125 °C
BUFFERED VOLTAGE OUTPUT DACs
Resolution 8 Bits
Code 0x80 Output Voltage Six DACs are individually selectable for centering
on one of four output voltage ranges
Range 1 0.592 0.6 0.603 V
Range 2 0.796 0.8 0.803 V
Range 3 0.996 1 1.003 V
Range 4 1.246 1.25 1.253 V
Output Voltage Range 601.25 mV Same range, independent of center point
LSB Step Size 2.36 mV
INL ±0.75 LSB Endpoint corrected
DNL ±0.4 LSB
Gain Error 1 %
Load Regulation −4 mV Sourcing current, IREFOUTMAX = −200 µA
2 mV Sinking current, IREFOUTMAX = 100 µA
Maximum Load Capacitance 50 pF
Settling Time to 50 pF Load 2 µs
Load Regulation 2.5 mV Per mA
PSRR 60 dB DC
40 dB 100 mV step in 20 ns with 50 pF load
REFERENCE OUTPUT
Reference Output Voltage 2.043 2.048 2.053 V No load
Load Regulation −0.25 mV Sourcing current, IDACnMAX = −100 µA
0.25 mV Sinking current, IDACnMAX = 100 µA
Minimum Load Capacitance 1 µF Capacitor required for decoupling, stability
Load Regulation 2 mV Per 100 µA
PSRR 60 dB DC
PROGRAMMABLE DRIVER OUTPUTS
High Voltage (Charge-Pump) Mode
(PDO1 to PDO6)
Output Impedance 500 kΩ
VOH 11 12.5 14 V IOH = 0
10.5 12 13.5 V IOH = 1 µA
IOUTAVG 20 µA 2 V < VOH < 7 V

ADM1063
Rev. 0 | Page 6 of 36
Parameter Min Typ Max Unit Test Conditions/Comments
Standard (Digital Output) Mode
(PDO1 to PDO10)
VOH 2.4 V VPU (pull-up to VDDCAP or VPn) = 2.7 V, IOH = 0.5 mA
4.5 V VPU to VPn = 6.0 V, IOH = 0 mA
V
PU − 0.3 V VPU ≤ 2.7 V, IOH = 0.5 mA
VOL 0 0.50 V IOL = 20 mA
IOL320 mA Maximum sink current per PDO pin
ISINK360 mA Maximum total sink for all PDO pins
RPULL-UP 20 kΩ Internal pull-up
ISOURCE (VPn)32 mA
Current load on any VPn pull-ups, that is, total
source current available through any number of
PDO pull-up switches configured onto any one
Three-State Output Leakage Current 10 µA VPDO = 14.4 V
Oscillator Frequency 90 100 110 kHz All on-chip time delays derived from this clock
DIGITAL INPUTS (VXn, A0, A1)
Input High Voltage, VIH 2.0 V Maximum VIN = 5.5 V
Input Low Voltage, VIL 0.8 V Maximum VIN = 5.5 V
Input High Current, IIH −1 µA VIN = 5.5 V
Input Low Current, IIL 1 µA VIN = 0
Input Capacitance 5 pF
Programmable Pull-Down Current,
IPULL-DOWN
20 µA
VDDCAP = 4.75, TA= 25°C if known logic state is
required
SERIAL BUS DIGITAL INPUTS (SDA, SCL)
Input High Voltage, VIH 2.0 V
Input Low Voltage, VIL 0.8 V
Output Low Voltage, VOL30.4 V IOUT = −3.0 mA
SERIAL BUS TIMING
Clock Frequency, fSCLK 400 kHz
Bus Free Time, tBUF 4.7 µs
Start Setup Time, tSU;STA 4.7 µs
Start Hold Time, tHD;STA 4 µs
SCL Low Time, tLOW 4.7 µs
SCL High Time, tHIGH 4 µs
SCL, SDA Rise Time, tr1000 µs
SCL, SDA Fall Time, tf300 µs
Data Setup Time, tSU;DAT 250 ns
Data Hold Time, tHD;DAT 5 ns
Input Low Current, IIL 1 µA VIN = 0
SEQUENCING ENGINE TIMING
State Change Time 10 µs
1At least one of the VH, VP1 to VP4 pins must be ≥3.0 V to maintain the device supply on VDDCAP.
2All temperature sensor measurements are taken with round-robin loop enabled and at least one other voltage input being measured.
3Specification is not production tested, but is supported by characterization data at initial product release.

ADM1063
Rev. 0 | Page 7 of 36
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
04632-003
ADM1063
TOP VIEW
(Not to Scale)
GND
40
VDDCAP
39
D1P
38
D1N
37
D2P
36
D2N
35
A1
34
A0
33
VCCP
32
PDOGND
31
AGND
11
REFGND
12
REFIN
13
REFOUT
14
NC
15
NC
16
SCL
17
SDA
18
NC
19
NC
20
V
X1 1
V
X2 2
V
X3 3
V
X4 4
V
X5 5
V
P1 6
V
P2 7
V
P3 8
V
P4 9
VH 10
PDO130
PDO2
29
PDO3
28
PDO427
PDO526
PDO625
PDO7
24
PDO8
23
PDO922
PDO1021
PIN 1
INDICATOR
Figure 3. LFCSP Pin Configuration
04632-004
NC = NO CONNECT
NC
48
GND
47
VDDCAP
46
D1P
45
D1N
44
D2P
43
D2N
42
A1
41
A0
40
VCCP
39
PDOGND
38
NC
37
NC
13
AGND
14
REFGND
15
REFIN
16
REFOUT
17
NC
18
NC
19
SCL
20
SDA
21
NC
22
NC
23
NC
24
NC 1
V
X1 2
V
X2 3
V
X3 4
V
X4
5
V
X5
6
V
P1
7
V
P2
8
V
P3
9
V
P4
10
VH
11
NC 12
NC 36
PDO1 35
PDO2 34
PDO3 33
PDO4
32
PDO5
31
PDO6
30
PDO7
29
PDO8
28
PDO9
27
PDO10
26
NC 25
ADM1063
TOP VIEW
(Not to Scale)
PIN 1
INDICATOR
Figure 4. TQFP Pin Configuration
Table 2. Pin Function Descriptions
Pin No.
LFCSP TQFP Mnemonic Description
15, 16,
19, 20
1, 12, 13,
18, 19, 22
to 25, 36,
37, 48
NC No Connection.
1 to 5 2 to 6 VX1 to VX5 High Impedance Inputs to Supply Fault Detectors. Fault thresholds can be set from 0.573 V to 1.375 V.
Alternatively, these pins can be used as general-purpose digital inputs.
6 to 9 7 to 10 VP1 to VP4 Low Voltage Inputs to Supply Fault Detectors. Three input ranges can be set by altering the input
attenuation on a potential divider connected to these pins, the output of which connects to a supply fault
detector. These pins allow thresholds from 2.5 V to 6.0 V, 1.25 V to 3.00 V, and 0.573 V to 1.375 V.
10 11 VH High Voltage Input to Supply Fault Detectors. Two input ranges can be set by altering the input
attenuation on a potential divider connected to this pin, the output of which connects to a supply fault
detector. This pin allows thresholds from 6.0 V to 14.4 V and 2.5 V to 6.0 V.
11 14 AGND Ground Return for Input Attenuators.
12 15 REFGND Ground Return for On-Chip Reference Circuits.
13 16 REFIN Reference Input for ADC. Nominally, 2.048 V.
14 17 REFOUT Reference Output, 2.048 V.
17 20 SCL SMBus Clock Pin. Open-drain output requires external resistive pull-up.
18 21 SDA SMBus Data I/O Pin. Open-drain output requires external resistive pull-up.
21 to 30 26 to 35 PDO10 to PDO1 Programmable Output Drivers.
31 38 PDOGND Ground Return for Output Drivers.
32 39 VCCP Central Charge-Pump Voltage of 5.25 V. A reservoir capacitor must be connected between this pin and GND.
33 40 A0 Logic Input. This pin sets the seventh bit of the SMBus interface address.
34 41 A1 Logic Input. This pin sets the sixth bit of the SMBus interface address.
35 42 D2N External Temperature Sensor 1 Cathode Connection.
36 43 D2P External Temperature Sensor 1 Anode Connection.
37 44 D1N External Temperature Sensor 1 Cathode Connection.
38 45 D1P External Temperature Sensor 1 Anode Connection.
39 46 VDDCAP Device Supply Voltage. Linearly regulated from the highest voltage on the VP1 to VP4 and VH pins to a
typical voltage of 4.75 V.
40 47 GND Ground Supply.

ADM1063
Rev. 0 | Page 8 of 36
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Voltage on VH Pin 16 V
Voltage on VP Pins 7 V
Voltage on VX Pins −0.3 V to +6.5 V
Voltage on DxN, DxP, and REFIN Pins −0.3 V to +5 V
Input Current at Any Pin ±5 mA
Package Input Current ±20 mA
Maximum Junction Temperature (TJmax) 150°C
Storage Temperature Range −65°C to +150°C
Lead Temperature, Soldering
Vapor Phase, 60 sec 215°C
ESD Rating, All Pins 2000 V
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL CHARACTERISTICS
40-lead LFCSP package: θJA = 25°C/W.
48-lead TQFP package: θJA = 14.8°C/W.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

ADM1063
Rev. 0 | Page 9 of 36
TYPICAL PERFORMANCE CHARACTERISTICS
6
0
1
2
3
4
5
0654321
04632-050
V
VP1
(V)
V
VDDCAP
(V)
Figure 5. VVDDCAP vs. VVP1
6
0
1
2
3
4
5
0161412108642
04632-051
V
VH
(V)
V
VDDCAP
(V)
Figure 6. VVDDCAP vs. VVH
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
00123456
04632-052
V
VP1
(V)
I
VP1
(mA)
Figure 7. IVP1 vs. VVP1 (VP1 as Supply)
180
160
140
120
100
80
60
40
20
00123456
04632-053
V
VP1
(V)
I
VP1
(µA)
Figure 8. IVP1 vs. VVP1 (VP1 Not as Supply)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
00161412108642
04632-054
V
VH
(V)
I
VH
(mA)
Figure 9. IVH vs. VVH (VH as Supply)
350
300
250
200
150
100
50
00654321
04632-055
V
VH
(V)
I
VH
(µA)
Figure 10. IVH vs. VVH (VH Not as Supply)

ADM1063
Rev. 0 | Page 10 of 36
14
12
10
8
6
4
2
00 15.012.510.07.55.02.5
04632-056
I
LOAD
( µ A)
CHARGE-PUMPED V
PDO1
(V)
Figure 11. Charge-Pumped VPDO1 (FET Drive Mode) vs. ILOAD
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
00654321
04632-057
I
LOAD
(mA)
V
PDO1
(V)
VP1 = 5V
VP1 = 3V
Figure 12. VPDO1 (Strong Pull-Up to VP) vs. ILOAD
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
00605040302010
04632-058
I
LOAD
( µ A)
V
PDO1
(V)
VP1 = 5V
VP1 = 3V
Figure 13. VPDO1 (Weak Pull-Up to VP) vs. ILOAD
1.0
–1.0
–0.8
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
0.8
40001000 2000 30000
04632-066
CODE
DNL (LSB)
Figure 14. DNL for ADC
1.0
–1.0
–0.8
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
0.8
0 4000300020001000
04632-063
CODE
INL (LSB)
Figure 15. INL for ADC
12000
10000
8000
6000
4000
2000
0204920482047
04632-064
CODE
HITS PER CODE
81
9894
25
Figure 16. ADC Noise, Midcode Input, 10,000 Reads