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V490
16-CHANNEL
VME
MULTI-RANGE
DIGITIZER
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Technical Manual
July 18, 2019

2
Copyright © Highland Technology
650 Potrero Avenue, San Francisco, CA 94110
Phone [phone] • Fax [phone]
www.highlandtechnology.com
NOTICE
HIGHLAND TECHNOLOGY, INC. PROVIDES THIS PUBLICATION “AS IS”
WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
(Disclaimer of expressed or implied warranties in certain transactions is not
allowed in some states. Therefore, the above statement may not apply to you.)
This manual may contain technical inaccuracies and/or typographical errors.
Changes are periodically made to this manual which are incorporated in later
editions. Highland Technology, Inc. may make changes and improvements to the
product(s) and/or programs described in this publication at any time without notice.
The V490 has finite failure rates associated with its hardware, firmware, design,
and documentation. Do not use the product in applications where a failure or
defect in the instrument may result in injury, loss of life, or property damage.
IN NO EVENT WILL HIGHLAND TECHNOLOGY, INC. BE LIABLE FOR
DAMAGES, INCLUDING LOST PROFITS, LOST SAVINGS OR OTHER
INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OF
OR INABILITY TO USE SUCH PRODUCT, EVEN IF HIGHLAND TECHNOLOGY,
INC. OR AN APPROVED RESELLER HAS BEEN ADVISED OF THE POSSIBILITY
OF SUCH DAMAGES, OR FOR ANY CLAIM BY ANY OTHER PARTY.

3
Table of Contents
1.Introduction....................................................................................................................5
2.Specifications: V490 Analog Input Module ..................................................................6
3.Overview........................................................................................................................8
3.1Channel Circuits......................................................................................................8
3.2Signal Processing.....................................................................................................9
4.Connectors and Installation..........................................................................................11
4.1Address DIP Switches...........................................................................................11
4.2Installation.............................................................................................................12
4.3D25 Input Connectors ...........................................................................................13
4.4D9 Calibration Connector......................................................................................14
4.5SMB Trigger Connector........................................................................................14
5.Operation......................................................................................................................16
5.1LEDs......................................................................................................................16
5.2Powerup Defaults ..................................................................................................16
5.3Quick Start.............................................................................................................17
6.VME Registers.............................................................................................................19
6.1VME Register Map ...............................................................................................20
6.2Module Overhead Registers..................................................................................27
6.3RELAYS Registers................................................................................................27
6.4ULED - User LED Control ...................................................................................28
6.5MODE - Calibration Bus Control .........................................................................28
6.6CALID, YCAL, DCAL - Calibration Status Registers.........................................29
6.7BIST Registers.......................................................................................................29
6.8MACRO, PARAMx - Macro Controls..................................................................30
6.9FZAP - FIFO Clear Register .................................................................................30
6.10VMETRIG - VME Trigger Register..................................................................31
6.11TRIGGER, BOUNCE, M - Global Trigger Controls........................................31
6.12CHER - Channel Setup Error Flags...................................................................31
6.13Channel Registers..............................................................................................32
6.13.1Channel Control Register...............................................................................32
6.13.2Filter Control Register ...................................................................................33
6.13.3FIFO Status Register......................................................................................35
6.13.4FIFO Divisor Register....................................................................................35
6.13.5Channel Realtime Data Registers...................................................................36
6.13.6Channel FIFO Data Registers ........................................................................36
6.14Realtime Considerations....................................................................................37
7.BIST.............................................................................................................................38
7.1Full BIST...............................................................................................................38
7.2Single-channel Self-Test .......................................................................................39
7.3Background BIST MUX function.........................................................................41
7.4Power Supply BIST...............................................................................................43
8.Local and Global Triggering........................................................................................44
9.Typical Performance....................................................................................................47
9.1Analog Filter..........................................................................................................47
9.2Digital Filters.........................................................................................................48

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9.3Interpolation ..........................................................................................................50
9.4Noise Performance ................................................................................................52
10.Versions ....................................................................................................................53
11.Customization ...........................................................................................................53
12.Hardware and Firmware Revision History ...............................................................53
12.1Hardware Revision History ...............................................................................53
12.2Firmware Revision History................................................................................53
13.Accessories................................................................................................................54

5
1. Introduction
This is the manual for the V490, a 16-channel fast analog-to-digital converter VME
module.
Features of the V490 include:
16 channels of differential analog input acquisition. Each channel is
independently programmable for input range, sample rate, operating
modes, and digital lowpass filtering.
Provides continuous, realtime measurement and simultaneously emulates
classic filtered, triggered ADC modes.
Input ranges from ± 10.24 mV to ± 40.96 volts with 16-bit resolution.
Common-mode rejection 100 dB typ, ± 10 volt common-mode range.
Overload protected to ± 250 volts on all ranges
ADC per channel with 500 Ks/s sample rate
Analog+DSP filter modes from 1 Hz to 100 KHz
4K sample FIFO and trigger interpolator per channel provide nanosecond
external-trigger accuracy.
FIFO input sample rate is programmable with internal, VME, or external
triggering. Unlimited numbers of modules may be simultaneously triggered.
No realtime handshaking is required. Once channel parameters are set up,
measurements appear in dual-port memory registers with VMEbus-speed
access.
Separate test connector supports in-crate calibration check.
Clearly labeled dipswitches set VME address; no jumpers, headers, or
trimpots.
Optional built-in self-test (BIST)

6
2. Specifications: V490 Analog Input Module
FUNCTION 16-channel differential analog-to-digital converter
DEVICE TYPE 16-bit VME register-based slave: A24:A16:D16:D32;
Implements 256 16-bit registers at switch selectable
addresses in the VME 16 or 24 bit addressing spaces
RANGES Programmable per channel
±10.24 mV ± 40.96 mV ± 160 mV ± 640 mV
± 2.56 V ± 10.24 V ± 40.96 V
RESOLUTION 16 bits, 0.313 μV on 10.24 mV range
INPUT IMPEDANCE > 500 K to ground, each differential input
ACCURACY ± 0.05% of range ± 20 μV ± 5 μV/°C
CMRR 100 dB typical on 10 mV range to 60 dB typical on 40 V
range
CM range ± 10 V, ± 140 V on 10 and 40 V ranges
SAMPLE RATE 500 Ks/s
FIFO path has programmable trigger rate
FILTERING Analog, 80 KHz 5-pole pre-ADC lowpass
Digital, 1 Hz to 50 KHz, 8-pole Bessel or Butterworth
PROTECTION ± 250 volts either input to ground
OPERATING
TEMPERATURE
0 to 60°C; extended MIL/COTS ranges available
CALIBRATION
INTERVAL
One year
POWER Standard VME supplies:
+ 5 volts, 0.8 amp max
+12 volts, 250 mA max
-12 volts, 250 mA max

7
CONNECTORS Two D25 female, each 8 channels
One D9 male analog test
One SMB trigger i/o
INDICATORS LEDs indicate VME access, CPU activity, error conditions
Additional LED is user programmable
PACKAGING 6U single-wide VME module
CONFORMANCE ANSI/VITA 1-1994 (R2002) VME bus spec; does not
support byte writes
Bandwidth Specifications:
RN Code Range Bandwidth ( -3dB) Slew Rate Limit
0 ± 10.24 mV 9 KHz 0.58 V/ms
1 ± 40.96 mV 30 KHz 7.8 V/ms
2 ± 160 mV 80 KHz 71 V/ms
3 ± 640 mV 80 KHz 330 V/ms
4 ± 2.56 V 80 KHz 900 V/ms
5 ± 10.24 V 80 KHz 5.2 V/us
6 ± 40.96 V 80 KHz 14 V/us

8
3. Overview
The V490 includes 16 independent differential-input analog-to-digital converters.
3.1 Channel Circuits
Each channel includes
BIST/CAL relay
Input protection
Input attenuator
Variable-gain differential amplifier
100 KHz analog anti-aliasing lowpass filter
16-bit A/D converter
Digital signal processing

9
3.2 Signal Processing
In the standard V490, all sixteen ADCs are triggered at a constant 500 KHz rate.
Each resulting data stream is digitally lowpass filtered and the result posted to a
"realtime" VME register at the 500 KHz rate. Users may read this register at any
time.
An alternate path for ADC data provides a separate digital lowpass filter, a
programmable sample rate clock, trigger interpolator, and a 4K sample FIFO
memory with its own VME interface.
Signal Processing
Filter types and bandwidths are programmable on a per-channel basis, with filter
responses available from 1 Hz to 100 KHz. The combination of pre-ADC analog
filtering, constant 500 KHz digitizing, and programmable digital filtering allows
essentially alias-free data acquisition.
The output of Filter A is immediately available to the VME interface, simulating an
ADC that receives a lowpass filtered analog input and is triggered the instant that it
is read by VME.

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A separate lowpass Filter B feeds the digital interpolator and FIFO memory. When
triggered, the interpolator delivers a sample to the FIFO that simulates a sample-
and-hold and ADC whose input is the filtered analog signal. The resulting sample
is not quantized to the 500 KHz ADC sample rate but accurately represents the
filtered analog value at the instant the trigger is received. Effective aperture jitter is
typically below 5 nanoseconds RMS.
The MTRIG global trigger signal can come from a variety of internal and external
sources; see section 8.
CAUTION: V490 differential inputs have approximately 500 K ohms impedance to
ground. If connected to floating sources, users should provide a DC path to ground
to prevent leakage currents and hum from producing excess common-mode
voltages.

11
4. Connectors and Installation
4.1 Address DIP Switches
The V490 appears as 256 16-bit registers in the VME 16 or 24-bit addressing
spaces. The base address of the 256 registers is set by dip switches.
Four 4-position rocker-type dipswitches are provided near the top edge of the
board. They are labeled, left to right, "A23" through "A9" and finally "A24M".
To set a switch to the logical "1" or "ON" position, press the side of the switch
nearest its "Axx" lettering. Use a toothpick or paper clip, not a pen or pencil.
The A24M switch, when set, allows the board to operate in the VME 24-bit (A24)
address space; in this case, all address switches are active and the board
responds to VME address modifier codes 0x39 and 0x3D.
If the A24M switch is off, the module resides in the A16 space and responds to
address modifiers 0x29 and 0x2D. In this case, only address switches A15 through
A9 are active.
Units are shipped with switches A15 and A14 on, all others off, locating the
register base at 0xC000 in the A16 space, as shown below.
Address DIP Switch

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4.2 Installation
The V490 may be installed in any standard 6U VME crate, including VME64
variants. It supports 32-bit data transfers using the P1 and P2 connectors, or may
be used in 16-bit mode using only the P1 backplane connector.
The V490 passes all interrupt and bus grant signals, so may be used with
backplane grant jumpers installed or not installed.
CAUTION: Do not install or remove the V490 with crate power on.
VME modules are not hot-pluggable. The V490 will be
damaged if hot-plugged.
CAUTION: Fully seat the module and secure front-panel screws
before applying power.
CAUTION: Handle the V490 with proper ESD precautions to avoid
static damage.
CAUTION: V490 differential inputs are high impedance. If connected
to floating sources, users should provide a DC path to
ground to prevent leakage currents and hum from
producing excess common-mode voltages.

13
4.3 D25 Input Connectors
Two front-panel female D-25 connectors are provided. Pinout is as follows:
J1 Pin Function J2 Pin Function
J1-1 ch 0+ J2-1 ch 8+
J1-14 ch 0- J2-14 ch 8-
J1-2 ch 1+ J2-2 ch 9+
J1-15 ch 1- J2-15 ch 9-
J1-3 ch 2+ J2-3 ch 10+
J1-16 ch 2- J2-16 ch 10-
J1-4 ch 3+ J2-4 ch 11+
J1-17 ch 3- J2-17 ch 11-
J1-5 ch 4+ J2-5 ch 12+
J1-18 ch 4- J2-18 ch 12-
J1-6 ch 5+ J2-6 ch 13+
J1-19 ch 5- J2-19 ch 13-
J1-7 ch 6+ J2-7 ch 14+
J1-20 ch 6- J2-20 ch 14-
J1-8 ch 7+ J2-8 ch 15+
J1-21 ch 7- J2-21 ch 15-
J1-22 VME GROUND J2-22 VME GROUND
J1-24 VME GROUND J2-24 VME GROUND

14
Connector shells are bonded to the VME front panel, which connects to the crate
frame through the module securing screws.
4.4 D9 Calibration Connector
A male D9 connector is provided for connection to an external precision voltage
source, allowing verification of module calibration without removing field-wiring
connectors. Each input channel incorporates a relay which allows it to be
switched, under software control, to this test connector.
Pinout of the D9 is:
P3-7 CalSig+
P3-6 CalSig-
P3-5 VME GROUND
An external voltage source may be connected to Pins 7 and 6, and one or more
channel relays activated to allow channels to measure the test source instead of
its normal input. If no other path exists from the test supply to ground, it is
recommended that its low side be connected to P3-5 in order to establish a solid
common-mode reference.
The RELAYS register is used to control the channel test relays and the MODE
register controls access to the cal bus. For example, writing value 4 to RELAYS
and 1 to MODE will connect the external source to the input of channel 2.
V490-2 modules, equipped with BIST, can internally generate test voltages that
can be applied simultaneously to the D9 test connector and to the internal cal bus.
This allows channel calibration verification using an external DVM.
See sections 6.3, 6.5, and 7.3 for details of channel test switching.
4.5 SMB Trigger Connector
An SMB trigger connector is located on the front panel between the D25 signal
connectors. It can serve as a trigger input or output. It is compatible with TTL, 3.3
volt CMOS, or 5-volt CMOS levels. As an output, it provides 3.3 volt CMOS trigger
pulses. See section 8.
The V490 is capable of accepting external triggers, or of operating multiple
modules in master/slave trigger modes, emulating asynchronously triggered, ADC-
per-channel architectures.

15
Highland can furnish SMB-BNC cables, multi-station trigger connector bussing
assemblies, and electrical or fiberoptic trigger fanouts.

16
5. Operation
5.1 LEDs
There are four front-panel LED indicators.
The blue VME led flashes whenever the module is accessed from the VME
bus.
The green CPU led flashes about once a second to indicate CPU activity
The red ERR led will flash to indicate errors:
Two blinks Channel Configuration Error
Three blinks Calibration table error; default calibrations are in use
Four blinks FPGA error; module may not respond to the VME bus
The orange USR led displays a user-defined blink pattern. See section 6.4
There is an additional LED on the PCB surface which illuminates green when the
FPGA is properly configured.
5.2 Powerup Defaults
At powerup or following a reboot macro, the module setup will be:
All channels on ± 10.24 volt ranges
All filters set to 1 KHz Bessel
All FIFO load rates 500 KHz; channel trigger divisors set to zero.
RELAYS, MODE, and BMUX registers clear
TRIGGER, BOUNCE, and M registers clear
ULED led control register clear
Users can immediately read input voltages in the sixteen RDAT0 through RDAT15
(signed, 16 bit) realtime data registers.
Powerup or reboot takes about 5 seconds.

17
5.3 Quick Start
Basic operation of the V490 can be demonstrated by the following steps:
A 6U VME crate and computer interface are required. The crate must be compliant
with the IEEE 1014 VME specification, or the equivalent ANSI/VITA 1-1994
(R2002) VMEbus spec. Any crate with the standard power supplies (+12, +5, -12)
and the 16-bit "P1" bus is adequate.
The computer interface must allow, as a minimum, reading and writing 16-bit
registers in the A16 or A24 address spaces.
Pick an address space and module base address and set the V490 dip switches
accordingly. See section 4.1. The as-shipped default is address 0xC000 in the 16-
bit address space.
With crate power off, insert the V490 into any crate slot and firmly secure its
mounting screws. Do not hot-plug VME modules.
Power up. After a few seconds, the V490 green "CPU" LED should flash, and the
other LEDs should be off.
Now run software that can display the contents of VME registers.
Read the manufacturer ID register, the16-bit VME register at the module base
address. The default address would be 0xC000. The blue "VME" LED should
flash, and the register value should be 0xFEEE, identifying this as a Highland VME
module.
Read the next register, offset address 2, default 0xC002. It should read 22490
decimal, 0x57DA, identifying the module as a V490.
The module powers up digitizing all 16 analog inputs, all on their ± 10.24 volt
range with 1 KHz Bessel lowpass filtering.
Read the RDAT0 register, offset address 0x48, default 0xC048. This represents
the differential voltage applied to channel 0 at J1 pins 1 and 14. If the register
value is "N", and is interpreted as a signed 16-bit value from -32768 (0x8000) to
+32767 (0x7FFF), the voltage is
V = N * 10.24 / 32768
The other channel voltages can be read in the RDAT1 through RDAT15 realtime
data registers, as mapped in section 6.1.

18
Channel ranges and filter settings can be changed by writing to the channel
control and filter control registers; see section 6.13.

19
6. VME Registers
The V490 implements 256 16-bit VME registers. REG# below is the ordinal
register number in decimal; OFFSET is the hex VMEbus offset from the module
base address.
Registers identified as "RO" should be treated as read-only and should not be
written from VME; these registers are periodically refreshed by the internal
microprocessor.
Read-write (RW) registers are written by VME and are not altered by the internal
microprocessor.
Read-write + macro registers (RWM) can be written by the user, but may also be
changed by the V490 in response to a user executed MACRO command. A macro
handshake protocol is defined in Section 6.8.
VMEbus response time (DS0* to DTACK*) averages about 125 ns.
Registers tagged # are serviced by FPGA logic at VMEbus speed.
Other VME registers are dual-port memory serviced by the uP. The
microprocessor normally services these registers about every 2.5 milliseconds.
Range changes, filtering changes, and relay actuation may take up to 25
milliseconds. See section 6.14 for comments on realtime issues.