Atmark Techno Armadillo-210 User manual

Hardware Manual
Version 1.0.1 Pre1
August 11, 2006
Atmark Techno, Inc.
http://www.atmark-techno.com/
Official Site
http://armadillo.atmark-techno.com/

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Table of Contents
1. Introduction ······················································································································1
2. Precautions ·······················································································································2
2.1. Safety Precautions ·······································································································2
2.2. Operational Precautions································································································2
2.3. Software Precautions····································································································2
2.4. Trademarks·················································································································2
3. Overview···························································································································3
3.1. Board Overview ···········································································································3
3.2. Block Diagram·············································································································4
4. Memory Map ·····················································································································5
4.1. Physical Memory Map···································································································5
4.2. Logical Memory Map When Using Linux·········································································6
5. Interface Specifications·······································································································7
5.1. Layout of Interfaces······································································································7
5.2. CON1 (LAN Connector)·································································································8
5.3. CON2/CON3 (Serial Interface 1) ····················································································8
5.4. CON4 (Serial Interface 2)······························································································9
5.5. CON5 (Parallel Interface)······························································································9
5.6. CON6 (External Reset/GPIO Terminal)·········································································10
5.7. CON7/CON8 (Power Input Connector) ··········································································11
5.8. CON9 (Power Output)·································································································11
5.9. D1/D2 (Status LED) ···································································································12
5.10. JP1/JP2 - Boot Mode Selection Jumpers ·····································································12
5.10.1. JP1 - Boot ROM Selection Jumper·······································································12
5.10.2. JP2 – Bootloader Mode Selection Jumper ·····························································12
5.11. LAN Connector LED································································································13
5.12. Structure of a Power Circuit ·····················································································13
6. Example of a Reference Circuit ··························································································14
7. Board Layout···················································································································15
8. Case Layout ····················································································································16
9. Appendix·························································································································17
9.1. How to Identify Board Revision····················································································17
10. Revision History ···········································································································18

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List of Tables
Table 3-1 Armadillo-210 Board Specifications·······································································3
Table 4-1 Armadillo-210 Memory Map ················································································5
Table 4-2 Logical Memory Map When Using Linux ·······························································6
Table 5-1 Details of Interfaces····························································································7
Table 5-2 LAN Signal Assignment ······················································································8
Table 5-3 CON2 Signal Assignment ····················································································8
Table 5-4 CON3 Signal Assignment ····················································································9
Table 5-5 CON4 Signal Assignment ····················································································9
Table 5-6 CON5 Signal Assignment ··················································································10
Table 5-7 Electrical Specifications of the Parallel Interface ··················································10
Table 5-8 CON6 Signal Assignment ··················································································10
Table 5-9 CON8 Signal Assignment ··················································································11
Table 5-10 CON9 Signal Assignment·················································································11
Table 5-11 jumper Setting and Behavior············································································12
Table 5-12 Status of a LAN Connector LED ·······································································13
List of Figures
Figure 3-1 Armadillo-210 Block Diagram.......................................................................................... 4
Figure 5-1 Layout of Interfaces.......................................................................................................... 7
Figure 5-2 Polarity Mark on AC Adapter..........................................................................................11
Figure 5-3 Structure of a Power Circuit inArmadillo-210.............................................................. 13
Figure 6-1 Example of a Reference Circuit......................................................................................14
Figure 7-1 Armadillo-210 Board Layout..........................................................................................15
Figure 8-1 Armadillo-210 Case Layout............................................................................................ 16
Figure 9-1 Armadillo-210 Board Revision ....................................................................................... 17

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1. Introduction
Thank you for your purchase of the Armadillo-210.
The Armadillo-210 is an ARM9 processor (CirrusLogic’s EP9307) based microcomputer equipped with
10BASE-T/100BASE-TX (Power over Ethernet/IEEE802.3af), RS232C serial interface and general-purpose
I/O.
The Armadillo-210 uses Linux as standard operating system (OS). It allows leveraging a wide variety of
software assets which have been developed using open sources. It also allows using GNU assembler and
C-compiler for software development.
■
This manual introduces the Armadillo-210 hardware specifications and how to use it. We hope the
information contained in this document will help you get the best functionality out of the Armadillo-210.

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2. Precautions
2.1. Safety Precautions
Before using the Armadillo-210, please read the following safety precautions carefully to assure correct use.
2.2. Operational Precautions
To avoid a permanent damage to the Armadillo-210, the following safety precautions must be observed
when handling the product.
zPower-on
Do not attempt to install or remove the GPIO connectors when power is applied to the Armadillo-210 or
peripheral circuits.
zStatic-Electricity
The Armadillo-210 incorporates CMOS devices. Until using the board, store it in the provided
antistatic package
zLatch-up
Due to excessive noise or a surge from the power supply or input/output, or sharp voltage fluctuations,
the CMOS devices incorporated in the board can cause a latch-up. Once a latch-up occurs, this
situation continues until the power supply is disconnected and thus can damage the devices. It is
recommended to take safety measures such as adding a protection circuit to the noise-susceptible
input/output line or not sharing a power supply with devices that can be the cause of noise.
2.3. Software Precautions
zThe software and documentation contained in this product are provided “AS IS” without warranty of any
kind including any warranty of merchantability or fitness for a particular purposes, reliability, correctness
or accuracy. Furthermore, Atmark Techno, Inc. does not guarantee any outcomes resulting from the
use of this product
2.4. Trademarks
Armadillo is registered trademarks of Atmark Techno, Inc. Other product and company names are
trademarks or registered trademarks of respective company or organization.
This product uses semiconductor components designed for generic electronics
equipment such as office automation equipment, communications equipment,
measurement equipment and machine tools. Do not incorporate the product into
devices such as medical equipment, traffic control systems, combustion control
systems, safety equipment and so on which can directly threaten human life or
pose a hazard to the body or property due to malfunction or failure. Moreover,
products incorporating semiconductor components can be caused to malfunction
or fail due to foreign noise or surge. To ensure there will be no risk to life, the
body or property even in the event of malfunction or failure, be sure to take all
possible measures in the safety system design, such as using protection circuits
like limit switches or fuse breakers, or system multiplexing.
！

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3. Overview
3.1. Board Overview
The Armadillo-210 main specifications are shown in Table 3-1.
Table 3-1 Armadillo-210 Board Specifications
Processor
CirrusLogic EP9307
ARM920T core
・ARM9TDMI CPU
・16kByte instruction cache
・16kByte data cache
・Thumb code (16bit instruction set) supported
System Clock CPU Core clock: 200MHz
BUS clock: 100MHz
Memory SDRAM: 32MByte (16bit width)
FLASH: 4MByte (16bit width)
LAN Interface
10BASE-T/100BASE-TX
Power over Ethernet (compliant with IEEE802.3af)
* Compatible with devices feeding with LAN connector’s 4/5-pin pair and 7/8-pin pair
Serial Port
2 channels (asynchronous, Max: 230.4kbps)
COM1:
・RS232C level input/output
・Flow control pins (CTS,RTS,DTR,DSR,DCD and RI)
COM2:
・3.3V I/O level input/output
・No flow control pins
General Purpose Parallel
Input/Output
8bits
Timer
・16bit general-purpose timer: 2 channels
(one channel is used for Linux system timer)
・32bit general-purpose timer: 1 channel
・40bit debug timer: 1 channel
Board Dimension (mm) 37.5 × 50.0 (exclusive of protrusions)
Case Dimension (mm) 45.0 × 79.0 × 26.5 (exclusive of protrusions)
Power Voltage DC9V - 48V
Power Consumption 1.2W (Typ.)

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3.2. Block Diagram
Armadillo-210 block diagram is shown in Figure 3-1.
SDRAM
256Mbit
Flash
32Mbit
CPUEP9307
SPI/I2S/
ACʼ97CODEC
GPIO
CON5
MemoryI/F
Bus
RTC
PLL
16bit
16bit
Ethernet
MAC
9〜48V 3.3V
SW-Reg.
On-Chip
BootROM
Timer
ParallelI/O8bit
32MByte
4MByte
1.8V
SW-Reg.
Video/LCD
Controller
CON2
(D-Sub9)
ARM920T
CON7
(DCJack)
CON1
(RJ45)
Interrupt
Controller
LED
CON4
PoEI/F
(TPS2375)
USB0
USB1
USB2
Drv/Rcv
(MAX3243)
PHY
(LXT971A)
25MHz
EEPROM
(24LC01)
MACAddress
JPSW
BootMode
14.7456MHz
UART2
UART1
UART3
Figure 3-1 Armadillo-210 Block Diagram

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4. Memory Map
4.1. Physical Memory Map
Armadillo-210 physical memory map is shown in Table 4-1.
Table 4-1 Armadillo-210 Memory Map
Start Address End Address Device Memory
Area Set Value
0x0000 0000 0x0FFF FFFF Reserved CS0
0x1000 0000 0x1FFF FFFF Reserved CS1
0x2000 0000 0x2FFF FFFF Reserved CS2
0x3000 0000 0x3FFF FFFF Reserved CS3
0x4000 0000 0x4FFF FFFF Reserved
0x5000 0000 0x5FFF FFFF Reserved
0x6000 0000 0x603F FFFF Flash Memory (4MByte)
0x6040 0000 0x6FFF FFFF Reserved CS6 16bit width
0x7000 0000 0x7FFF FFFF Reserved CS7
0x8000 0000 0x8008 FFFF EP9307 Internal Register (AHB)
0x8009 0000 0x8009 3FFF Internal Boot ROM (16KByte)
0x8009 4000 0x800A FFFF Reserved
0x800B 0000 0x800F FFFF EP9307 Internal Register (AHB)
0x8010 0000 0x807F FFFF Reserved
0x8080 0000 0x8094 FFFF EP9307 Internal Register (APB)
0x8095 0000 0x8FFF FFFF Reserved
CPU System
Register
0x9000 0000 0xBFFF FFFF Reserved
0xC000 0000 0xC07F FFFF SDRAM (8MByte)
0xC080 0000 0xC0FF FFFF Reserved
0xC100 0000 0xC17F FFFF SDRAM (8MByte)
0xC180 0000 0xC3FF FFFF Reserved
0xC400 0000 0xC47F FFFF SDRAM (8MByte)
0xC480 0000 0xC4FF FFFF Reserved
0xC500 0000 0xC57F FFFF SDRAM (8MByte)
0xC580 0000 0xCFFF FFFF Reserved
SDCE0 16bit width
0xD000 0000 0xDFFF FFFF Reserved SDCE1
0xE000 0000 0xEFFF FFFF Reserved SDCE2
0xF000 0000 0xFFFF FFFF Reserved SDCE3

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4.2. Logical Memory Map When Using Linux
When using Linux, the Armadillo-210 is mapped to the following logical memory map via MMU.
Table 4-2 Logical Memory Map When Using Linux
Start Address End Address Device Memory
Area Set Value
Dynamic +0x003F FFFF Flash Memory (4MByte) CS6 16bit width
0xC000 0000 0xC1FF FFFF SDRAM (32MByte)
0xC200 0000 0xCFFF FFFF Reserved SDCE0 16bit width
0xD000 0000 0xFEFF FFFF Reserved
0xFF00 0000 0xFF08 FFFF EP9307 Internal Register (AHB)
0xFF09 0000 0xFF09 3FFF Internal Boot ROM (16KByte)
0xFF09 4000 0xFF0A FFFF Reserved
0xFF0B 0000 0xFF0F FFFF EP9307 Internal Register (AHB)
0xFF10 0000 0xFF7F FFFF Reserved
0xFF80 0000 0xFF94 FFFF EP9307 Internal Register (APB)
0xFF95 0000 0xFFFF FFFF Reserved
CPU System
Register

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5. Interface Specifications
5.1. Layout of Interfaces
The layout of the Armadillo-210 interfaces is shown in Figure 5-1.
15
1
2
9
10
15
69
1 2
1 2
9
10
1 2
12
CON4
CON2
CON3
CON5
CON6
CON9
D2
D1
CON7CON1
JP2{
JP1{CON8
Figure 5-1 Layout of Interfaces
Table 5-1 Details of Interfaces
Symbol Interface Shape Remarks
CON1 LAN Connector (10BASE-T/100BASE-TX) RJ-45
CON2 Serial Interface 1 D-Sub9 pin (male)
CON3 Serial Interface 1 10-pin (2.54mm pitch) Connector not mounted
CON4 Serial Interface 2 5-pin (2.54mm pitch) Connector not mounted
CON5 Parallel Interface (8bit GPIO) 10-pin (2.54mm pitch) Connector not mounted
CON6 External Reset/GPIO terminal 2-pin (2.54mm pitch) Connector not mounted
CON7 Power Input Connector DC Jack
CON8 Power Input Terminal 2-pin (2.54mm pitch) Connector not mounted
CON9 Power Output Terminal 2-pin (2.54mm pitch) Connector not mounted
D1 Status LED (Green) LED
D2 Status LED (Red) LED
JP1 Jumper for Setting Boot Mode 2-pin (2.54mm pitch)
JP2 Jumper for Setting Boot Mode 2-pin (2.54mm pitch)