Xilinx Alveo X3522 User manual

Alveo X3522
User Guide
UG1523 (v1.0) October 18, 2022
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Table of Contents
Chapter 1: Introduction.............................................................................................. 4
Intended Audience......................................................................................................................4
Features........................................................................................................................................4
Block Diagram..............................................................................................................................5
Terms and Acronyms.................................................................................................................. 6
Chapter 2: X3 Migration Quickstart..................................................................... 9
Software Migration................................................................................................................... 11
Chapter 3: What's New..............................................................................................13
Queue Handling........................................................................................................................ 13
Receive........................................................................................................................................13
Transmit......................................................................................................................................15
Interrupts................................................................................................................................... 17
Filtering.......................................................................................................................................17
Ports............................................................................................................................................17
Drivers........................................................................................................................................ 18
Features......................................................................................................................................19
Tuning.........................................................................................................................................19
Chapter 4: Basic Configuration.............................................................................21
Supported Speed and Mode.................................................................................................... 21
Status LEDs.................................................................................................................................21
Basic Adapter Configuration....................................................................................................22
UEFI and PXE..............................................................................................................................23
Precision Time Protocol............................................................................................................24
Chapter 5: Tuning......................................................................................................... 25
Huge Pages................................................................................................................................ 25
Interrupt Affinity........................................................................................................................28
Dropping Multicast Traffic........................................................................................................34
Performance Tuning on Linux................................................................................................. 36
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Other Considerations................................................................................................................39
Tuning Recommendations....................................................................................................... 41
Chapter 6: Programming the X3522................................................................... 44
About Update Files....................................................................................................................44
Get the Update Files..................................................................................................................45
Install the Update Files............................................................................................................. 46
Program the FPGA.....................................................................................................................46
Confirm Success of the Update............................................................................................... 49
Chapter 7: Teaming/Bonding.................................................................................52
Setting Up Teams...................................................................................................................... 52
Chapter 8: Statistics and Logging....................................................................... 53
Linux ethtool Statistics..............................................................................................................53
Reading Sensors........................................................................................................................56
Driver Logging Levels............................................................................................................... 60
Appendix A: Additional Resources and Legal Notices............................. 61
Xilinx Resources.........................................................................................................................61
Documentation Navigator and Design Hubs.........................................................................61
References..................................................................................................................................61
Revision History.........................................................................................................................62
Please Read: Important Legal Notices................................................................................... 63
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Chapter 1
Introduction
This is the User Guide for the X3522 low latency network adapter variant of the X3522. This
chapter gives an introducon to the card and its features.
IMPORTANT! Before reading this guide, follow the instrucons in Alveo X3522 Installaon Guide
(UG1522) to install and congure the network adapter and its drivers. This guide assumes that you have
already installed the X3522 and that it can pass network trac.
Note: This guide does not describe the X3522PV adaptable accelerator variant. For more informaon
about using this variant, refer to the Vivado® documentaon.
Note: Throughout this guide the term Onload refers to both OpenOnload® and EnterpriseOnload® unless
otherwise stated. Users of Onload should refer to the Onload User Guide (UG1586), which describes
procedures for download and installaon of the Onload distribuon, accelerang and tuning the
applicaon using Onload to achieve minimum latency and maximum throughput.
Product Website
The most up-to-date informaon related to the Alveo™ X3522 card, downloads and
documentaon are available on the following website:
hps://www.xilinx.com/x3
Intended Audience
The intended audience for this User Guide are soware installaon, conguraon, test and
applicaon engineers responsible for conguring, tesng, evaluang or using the X3522.
Features
The following table lists the features that are available in an X3522.
Chapter 1: Introduction
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Table 1: Features
Feature Availability
PCIe
PCIe® to host system Gen4 ×8 / Gen3 ×8
Number of PFs Up to 4
Stateless offloads
RX checksum offload
IPv4 TCP/UDP ✓
Interrupt moderation ✓
Side-band management
SMBus (DSP0237) ✓
PCIe VDM (DSP0238) ✓
NC-SI (NC-SI and DSP0222) ✓
PLDM
Monitoring and control (DSP0248) ✓
Preboot
UEFI ✓
Data integrity
ECC protected memories
Single-bit error correction ✓
Double-bit error detection ✓
Diagnostics
Initiate self-generated traffic and self-test ✓
Debug bus ✓
Block Diagram
A block diagram of the X3522 is shown in the following gure.
Chapter 1: Introduction
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Figure 1: X3522 Block Diagram
QSPI Secondary
Flash
XCUX35-3VSVA1365E
Satellite
Controller
LPC5500
Series
EP GTY x8
QSPI
DSFP28
DSFP28
QSPI Primary
Flash
GTY x4
DDR C1
DDR4 5x16
4/8 GB
x72
Port 1
Port 2
SMBus
PCIe
Gen4 x8
UART
Sensors
Alveo Configuration Port
2xJTAG, 3xUART
PMBus, SMBus, SWDIO
X25588-052622
Terms and Acronyms
The following table lists terms used in the guide and their denions.
Table 2: Terms and Definitions
Term Definition
AN, AN/LT Auto-negotiation / Link Training.
Sets the speed of an Ethernet link.
ARP Address Resolution Protocol.
Maps IP addresses to MAC addresses.
BASE-R FEC A type of Forward Error Correction also known as Firecode.
CPU Central Processing Unit.
CTPIO Cut Through Programmed Input/Output.
TX packets are streamed directly from the PCIe interface to the adapter port to deliver
lowest TX latency.
DAC cable Direct Attach Copper cable.
DDR Double Data Rate memory.
Transfers data on rising and falling edges of the clock.
DSFP Dual Small Form-factor Pluggable.
A 2-channel (dual) network transceiver design that is compatible with SFP+/ SFP28
transceivers. See https://dsfpmsa.org/.
Chapter 1: Introduction
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Table 2: Terms and Definitions (cont'd)
Term Definition
ECC Error Correction Code.
EFCT The native interface for an X3522.
FCS Frame Check Sequence.
Error-detecting code added to an Ethernet frame.
FEC Forward Error Correction.
Employs redundancy in channel coding as a technique used to reduce bit errors.
FPGA Field Programmable Gate Array.
A semiconductor device that is based around a matrix of configurable logic blocks
connected via programmable interconnects.
IRQ Interrupt Request.
LAN Local Area Network.
MCDI Management CPU Driver Interface.
Passes messages and events between the host driver and the X3522 firmware.
MTU Maximum Transmission Unit.
The maximum packet size that can be transmitted.
NC-SI Network Controller Sideband Interface.
An electrical interface and protocol for out-of-band system management.
NIC Network Interface Controller.
NUMA Non-Uniform Memory Access.
A multiprocessing design where memory is local to clusters of processors.
Onload A high performance user-level network stack from Xilinx, which accelerates TCP and UDP
network I/O.
PCIe Peripheral Component Interconnect Express.
A high-speed serial bus used to connect components.
PF Physical Function.
A PCIe physical device.
RS-FEC A type of Forward Error Correction also known as Reed Solomon.
RSS Receive Side Scaling.
Enables packet receive-processing to scale with the number of available CPU cores.
RX, Rx Receive.
SECDED Single Error Correction / Double Error Detection.
Error processing that can correct a 1-bit error, and detect a 2-bit error.
SFP Small Form-factor Pluggable.
A single-channel network transceiver design.
SMBus System Management Bus.
A single-ended two-wire bus for lightweight communication between system components.
TSO TCP Segmentation Offload.
Offloads the splitting of outgoing TCP data into packets to the adapter.
TX, Tx Transmit.
UEFI Unified Extensible Firmware Interface.
Provides support for disk-less booting to a target operating system.
UUID Universally Unique Identifier.
A 128-bit identifier that is unique and persistent.
Chapter 1: Introduction
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Table 2: Terms and Definitions (cont'd)
Term Definition
XCUX35 The FPGA used on an X3522.
Chapter 1: Introduction
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Chapter 2
X3 Migration Quickstart
Read this Quickstart if you are migrang to the X3522 adapter from its predecessors that were
designed by Solarare, such as the 7000-series, 8000-series and XtremeScale X2-series. It
outlines the major dierences between the X3522 and its predecessors, and where to nd out
more:
Reduced Latency
• ½ RTT latency for an X3522 is about 230 ns lower than for an X2522, measured using
eatency with a 200 byte packet over PCIe® Gen4 and 10 GbE.
• The X3522 has been opmized for PCIe Gen4. Using PCIe Gen3 instead of Gen4 incurs a
½ RTT penalty of >80 ns.
See the Onload User Guide (UG1586) for full details of test setup, and for comprehensive latency
values and graphs.
New RX and TX Data Path Designs
• RX queues are managed by the driver and are shared between applicaons. Applicaons that
share a queue should run on cores that share their L3 cache. Explicit huge pages are required.
• TX always uses CTPIO, with 16 apertures per port instead of the single aperture used by the
X2-series, allowing senders to have a dedicated aperture. This and other design improvements
have made CTPIO more robust.
See Queue Handling, Receive and Transmit.
New Drivers and Software Packages
• The X3522 uses a new Linux net driver named xilinx_efct, supplied separately from
Onload.
• The X3522 also uses the auxiliary bus driver. This is provided by some recent Linux
distribuons, or can be downloaded from Xilinx.
• TCPDirect is now supplied in its own package, separately from Onload.
See the Alveo X3522 Installaon Guide (UG1522), the Onload User Guide (UG1586) and the
TCPDirect User Guide (SF-116303-CD).
Chapter 2: X3 Migration Quickstart
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Low Background Traffic Recommended
• The kernel stack is not performant, and is only intended for light background trac.
• If any applicaons generate high trac, consider accelerang them with Onload.
• IGMP snooping is strongly recommended.
See the Onload User Guide (UG1586) to accelerate applicaons.
Focused Feature Set
• Some features not normally used in low latency deployments because of their adverse impact
have been removed.
• The maximum MTU is 1500 bytes.
See Features.
Standardized Tools for Firmware Management
• The sfupdate and sfboot ulies are no longer used.
• The devlink or ethtool Linux ulies are instead used for update, conguraon and
informaon.
See Chapter 6: Programming the X3522.
Higher Power Requirement
• Power draw varies more with trac load.
• The X3522 uses more power than the X2-series.
• Its airow requirements are consequently higher.
See the Alveo X3522 Data Sheet (DS1002).
DSFP28 Cages
• The X3522 has two DSFP28 cages, each of which supports two ports.
• If you connect a DSFP28 cable, or a DSFP28 to SFP splier, both ports for the cage are
exposed.
• If you connect an SFP cable, only the rst port for the cage is exposed.
• Ports are currently 10 GbE only.
See Ports and the Alveo X3522 Installaon Guide (UG1522).
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Software Migration
This secon outlines issues you might have when migrang soware to the X3522 from its
predecessors:
Onload Migration
• No applicaon changes are required.
• For best performance, system tuning is likely to need adjustment.
• A maximum of 15 Onload stacks can be created without sharing CTPIO apertures.
• You can add interfaces to the allowlist/denylist to avoid an applicaon consuming CTPIO
apertures on interfaces where it does not need to accelerate trac.
• Onload ulies interact only with components of the Onload package. In parcular, the
onload_tool ulity does not reload the xilinx_efct driver.
See the Onload User Guide (UG1586).
TCPDirect Migration
•TX-alternaves are not supported.
• Overlapped receives are not supported.
• You must ensure PIO is not enabled (i.e. set the aribute pio=0).
• Dynamically linked applicaons that do not have any of the preceding issues can be used
unchanged.
•Stacally linked applicaons require re-linking.
See the TCPDirect User Guide (SF-116303-CD).
ef_vi Migration
• There are new events to receive data, and new calls to retrieve the data.
• The driver manages the RX buers, so you do not post descriptors for packet buers, but
must instead release received packets aer processing them.
• TX must use only CTPIO.
• You must lter in soware for unwanted data, including non-UDP/TCP frames.
• Some example applicaons do not support the X3522.
See the Alveo X3 ef_vi Conversion Guide (XN-201257-CD) and the ef_vi User Guide (SF-114063-
CD).
Chapter 2: X3 Migration Quickstart
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sfptpd Migration
• The X3522 needs an updated version of sfptpd that recognizes its new PCIe vendor ID.
• It will then be treated in the same way as other Xilinx/Solarare NICs.
• No changes are needed to conguraon.
See the Enhanced PTP User Guide (UG1602).
Chapter 2: X3 Migration Quickstart
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Chapter 3
What's New
The X3522 adapter has been engineered from scratch to provide absolute lowest latency. This
has resulted in dierences in its hardware capabilies and host interface from its predecessors
that were designed by Solarare, such as the 7000-series, 8000-series and XtremeScale X2-
series. This chapter describes those dierences, and resultant changes in deployment to take
best advantage of them.
Note: Low-level changes that impact acceleraon technologies such as Onload, TCPDirect and ef_vi are
described in the corresponding User Guide. See References.
Queue Handling
The key dierence between the X3522 and its predecessors is its queue handling:
• Predecessors of the X3522 bundle together a receive queue, transmit queue, event queue,
and interrupt and call these a virtual interface (VI), They present a very large number (typically
1000s) of VIs that can be allocated to applicaons on demand.
• The X3522 has enrely separate receive and transmit queues that can be allocated more
exibly. They can be directed to separate event queues, and the event queues can be shared.
The X3522 presents fewer queues (typically one per CPU, but with an overall limit) and
applicaons can aach to them as required.
Receive
On the receive side, because there are a reduced number of queues they will in some situaons
need to be shared. The intended model is that a receive queue is associated with a CPU cluster
to benet from cache locality, and all the applicaons running on that cluster share that queue.
Because the receive queues are shared they must be managed by the driver rather than directly
by the applicaons.
On predecessors to the X3522 such as the X2522, packets are received into a 4 KB standard
page:
•Applicaons own and manage the packet buers, and post them to the NIC.
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• The driver uses events to nofy applicaons of new packets.
See the following gure:
Figure 2: Packet Buffers on the X2522
X#####-061422
2 KB
copy
References from
applications using
Onload zero-copy,
TCPDirect zero-copy
and ef_vi
Packet buffers Application bufferRX ring
X2522 References from
applications using
Onload and
TCPDirect
X26634-061422
On the X3522, packets are received into much larger 1 MB super buers, and the NIC delivers
mulple packets at a xed stride (2 KB) to each super buer.
• The super buers are allocated using explicit huge pages. All super buers for an RX queue
are held in a single pool.
• The driver owns the packet buers, posts them to the NIC, and publishes them to the
applicaons that are using that queue.
• The driver handles all the receive events and buer management leaving receivers free to
detect presence of new packets by watching the packet buer memory for changes instead of
consuming events.
See the following gure:
Chapter 3: What's New
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Figure 3: Packet Buffers on the X3522
2 KB
1 MB
copycopy
RX ring Super buffers
X3522
Packet buffers Application buffer
References from
applications using
ef_vi
References from
applications using
Onload zero-copy and
TCPDirect zero-copy
References from
applications using
Onload and
TCPDirect
X26635-061422
Because the receive queues can be shared by more than one client, there must be a trust
relaonship between processes on the system. The X3522 should not be used in scenarios where
strict POSIX isolaon is necessary.
Transmit
The only method for transming packets on the X3522 is Cut-Through Programmed I/O
(CTPIO). This has been heavily updated compared to its predecessors to reduce latency and make
it more robust:
• The X2522 has a single CTPIO transmit aperture per network port. The aperture is shared
between all senders, and so there is a risk of clashes between senders. If CTPIO fails, the
sender must fallback to DMA.
• The X3522 adapter supports up to 16 CTPIO transmit apertures per network port (so 16×4 in
total). The intenon is that every sender can have a dedicated CTPIO aperture and so avoid
clashes. If CTPIO fails, fallback automacally occurs to store-and-forward, which will always
succeed.
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Figure 4: CTPIO Apertures on the X2522 and X3522
NIC port
Kernel
App 1
App 2
App 3
...
CTPIO
X2522
NIC port
Kernel
App 1
App 2
...
App 15
CTPIO
CTPIO
CTPIO
...
CTPIO
X3522
X26636-050922
One of the CTPIO apertures on the X3522 is used by the Linux kernel, and so 15 are available for
other senders. Onload uses one of these apertures per stack.
In situaons where there are more than 16 senders, either some will not be able to perform
accelerated sends, or they will need to share access to an aperture. If processes are sharing
transmit apertures they must lock any access themselves enrely within soware, and this does
not give opmal performance. It would make sense for such processes to have similar locality to
the shared receive queues, so apertures are shared between processes running on the same CPU
cluster.
Each transmit aperture has an associated event queue. The common use case is for each transmit
aperture to have a separate event queue that is consumed by the user-level sender. This means
that a sending thread can process transmit events without having to handle receive events or
other trac. Event queues can also in theory be shared between transmit apertures.
The X3522 includes 32 KB of buering per transmit aperture to handle bursts of packets and
reordering of any out-of-order PCIe transfers.
The X3522 allows warming the code path, with a ag not to send data.
As it is fully cut-through, the X3522 does not support TCP/IP checksum ooad on transmit.
Like its predecessors, the X3522 sends a poisoned frame on failure, but its improved design
means this is signicantly less likely to occur.
Chapter 3: What's New
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Interrupts
The X3 NIC supports up to 32 interrupts per port, meaning there are enough for each receive
event queue and each transmit event queue to have a dedicated interrupt. They can be
associated exibly, and there is no requirement that the Nth interrupt maps to the Nth event
queue.
Filtering
The X3522 adapter has simpler hardware receive queue selecon (ltering) than its predecessors.
This simplicaon together with the shared receive queue architecture means applicaons need
to perform a level of ltering when inspecng received packets. Note the Onload and TCPDirect
libraries handle this applicaon level ltering on behalf of any soware they accelerate, and
therefore the user soware does not need to change.
The hardware ltering supports matching on local IP address/port/protocol, to direct the packets
to a parcular receive queue or to drop them. The hardware supports up to 256 lters per port,
implemented using a high performance hardware CAM.
The hardware only acons a single lter, even if subsequent lters would also match the packet.
There is no hardware replicaon of packets to deliver to mulple queues. The hardware has
mechanisms so that applicaons wanng the same packets can discover and share a lter and its
associated trac.
Multicast Filtering
The X3522 must idenfy mulcast packets by their IP address, whereas its predecessors did so
by MAC address. The X3522 adapter supports a mulcast-mismatch lter to redirect or drop
mulcast trac that does not match a more specic lter. This is the lowest precedence lter.
If an accelerated applicaon installs a mulcast-mismatch lter with drop rule, the net driver will
then not receive intended mulcast trac. The applicaon can avoid this issue by installing lters
to direct all desired mulcast trac to its receive queue. These lters will always have a higher
precedence than any mulcast-mismatch drop lter.
Ports
The X3522 adapter has a single port per cage when using SFP cables or a pair of ports per cage
with DSFP cables:
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• If the adapter is using SFP cables then each port is presented to the host as a separate PF and
the operang system treats the ports independently.
• If the adapter is using DSFP cables then there are sll two PFs but each PF presents a pair of
ports. The X3 drivers sll treat each port independently – that is, there is no dierence to the
user between ports that share a PF and ports that do not.
Note: The rest of this document ignores the fact that some network ports share a PF (this should be
invisible to applicaons), and only shows what is needed to use a single port on the NIC. For applicaons
that need to interface to mulple ports, all the structures are duplicated as each port uses separate
resources and interfaces.
Drivers
The X3522 uses a new net driver named xilinx_efct. It also requires the auxiliary bus driver
which is used for connecvity between the net driver and applicaon libraries, such as Onload
and TCPDirect.
The xilinx_efct and auxiliary bus drivers can both be downloaded from the product website
(see Product Website). The auxiliary bus driver is also provided by some recent Linux
distribuons.
Onload connues to supply the sfc driver used by predecessors of the X3522, but it does not
supply the xilinx_efct and auxiliary bus drivers . Likewise, Onload scripts and tools connue
to interact with the sfc driver, but do not interact with the xilinx_efct and auxiliary bus
drivers.
Drivers must be built and loaded in the following order:
1. Auxiliary bus driver.
2. xilinx_efct net driver.
3. Onload and sfc driver.
and must be unloaded in the reverse order.
So, to reload the auxiliary bus, xilinx_efct and Onload drivers:
# onload_tool unload --onload-only
# modprobe -r xilinx_efct
# modprobe -r auxiliary
# modprobe auxiliary
# modprobe xilinx_efct
# onload_tool reload --onload-only
Note: If you are also using the sfc driver, omit the --onload-only ag.
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Features
Some features not normally used in low latency deployments because of their adverse impact
have been removed. The following table gives a comparison of features on the X3522 and the
X2522 (its predecessor):
Table 3: Comparison of features on the X3522 and the X2522
Feature X2522 X3522
Size Low-profile, half length Low-profile, half length
Interfaces 2 SFP+ cages (2×10/25G) 2 DSFP+ cages (2×2×10G)
PCIe vendor ID 1924 (Solarflare) 10ee (Xilinx)
OS support Linux, Windows, VMWare Linux
Net driver name sfc xilinx_efct
Onload support Yes Yes
TCPDirect support Yes Yes
ef_vi support Yes Yes
Sfptpd support Yes Yes
Oscillator Discrete Stratum 3 Discrete Stratum 3
Hardware timestamps Yes Yes
Jumbo frame support Yes No
RX queues Multiple separate queues Shared queue
TX types DMA, PIO, CTPIO CTPIO only
Number of filters 16384 total 256 per port
Types of filter 3 or 5 part IP, MAC address, all-unicast,
all-multicast, all-discards
3-part IP, all multicast
Dropped on NIC Unsubscribed/unwanted Explicit only
Duplicate multicast filters Yes No
PF-VLAN Yes No
Multi-PF mode Yes No
SR-IOV support Yes No
Hardware TX checksum offload Yes No
You can upgrade the X3522 by enabling hybrid mode. You can then add your own applicaon
code to the datapath in the FPGA, meaning it can be easily customized to add new features.
Tuning
Changes in the design and behavior of the X3522 mean that it might require dierent system
tuning sengs from its predecessors.
Chapter 3: What's New
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Locality is especially important for good performance:
• Interrupts and applicaons should be on the same package.
•Mulple receiving threads should share an L3 cache.
The X3522 typically puts a higher load on the CPU than its predecessors, and some rebalancing
might be required:
• Onload sending is always done with CTPIO, and this uses more CPU than sending with DMA.
• The net driver rells the RX ring. Depending on trac rate, it might need more CPU me:
○The net driver must check every frame, even those desned for Onload.
○Conguring all-but-one core isolated from kernel threads is no longer viable for higher
trac rates.
See Chapter 5: Tuning.
Chapter 3: What's New
UG1523 (v1.0) October 18, 2022 www.xilinx.com
Alveo X3522 User Guide 20
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