BBK SMP242HDT2 User manual
1
DVB-Terrestrial Receiver
SMP244HDT2 /SMP242HDT2
Service Manual
This service manual should be used with the User Manual together.
Please read this Service Manual and User Manual carefully before service this product.
2
Contents
Safety Instructions ......................................................................................... 3
Generally Guide .................................................................................................................................. 3
Low Voltage Leakage Testing ................................................................................................................................. 3
High Voltage Leakage Testing ................................................................................................................................ 3
Electrical Specifications ................................................................................. 5
Mechanical Exploded View Drawing .............................................................. 6
Mechanical Parts List.......................................................................................................................... 6
Packaging and Accessories ........................................................................... 7
Packaging Exploded View Drawing .................................................................................................... 7
Appendix 1 Flowchart and Circuit Diagram .................................................... 8
Flowchart............................................................................................................................................. 8
Wiring Diagram ................................................................................................................................... 8
Circuit Diagram of Decoding Board .................................................................................................... 8
Circuit Diagram of Control Board........................................................................................................ 8
Appendix 2 Silkscreen of PCB ......................................................................19
Silkscreen of Decoding Board Top.................................................................................................... 19
Silkscreen of Decoding Board Bottom.............................................................................................. 19
PCB Diagram of Decoding Board Top .............................................................................................. 19
PCB Diagram of Control Board Bottom ............................................................................................ 19
Appendix 3 Component List..........................................................................24
Component List of Decoding Board.................................................................................................. 24
3
Safety Instructions
Generally Guide
1. Please check electric circuits before maintenance and change the damaged or over heated components if
short-circuit has been found.
2. Please check all protective devices have been installed well after maintenance, such as insulation covering
and paper.
3. Please finish following electrical leakage tests after maintenance to avoid electric shock.
Low Voltage Leakage Testing
Take out power cord from an AC outlet and connect a length of wire between the two leads of the plug.
Use Gear R x 10K of the voltmeter to measure the resistance between shorted-out AC plug and exposed
metallic parts like screw cap, control shaft etc. which shall be infinite.
Picture 1
High Voltage Leakage Testing
As shown in Picture 1, connect a resistor of 1.5K, 10W and capacitor of 0.15 uF between exposed metallic
part and well grounded devices (water pipe etc.).
Plug power cord directly into the socket. Do not use insulated transformer to test.
Use 1000 Ohm/V or more sensitive voltmeter to measure AC voltage of the resistor.
Turn over the AC jack and plug into the socket again to iterate the inspection as above.
Inspect the voltage of the resistor between other exposed metallic parts and the earth in the same way.
Any parts’voltage of the resistor should not over 0.75Vrms. A leakage testing machine with voltage over
2,500 V can also be used for this inspection in which case the electric leakage should not be over 0.5mA. When
the leakage exceeds that limit, electric shock may occur. Please check and repair again before hand it over to
users.
4. Protect Electrostatic-Sensitive Devices from Electrostatic Discharge
Some solid states made of semiconductors materials can be easily damaged by commonly static charges,
those components are usually called electrostatic-sensitive devices. Such like integrated circuits, laser diodes
and field effect devices. The following tips will help you to reduce the impacts on those components while
electrostatic discharging.
Please release static which build-up on human body before handling electrostatic-sensitive devices by using
grounded tools. The antistatic strap which can be found in the market will be a good choice.
4
Please install the electrostatic-sensitive devices on conductor products such as aluminum foil to prevent static
build-up after disassembling from this DVB-T receiver.
The soldering iron must be earthed while soldering and unsoldering the electrostatic-sensitive devices.
Only antistatic solder can be used for electrostatic-sensitive devices disassembly. The electrostatic-sensitive
devices will be damaged by static without ESD prevention solder while disassembling.
Do not use Freon Volatile which may damage the electrostatic-sensitive devices by discharging static.
Do not take the new electrostatic-sensitive devices from the antistatic protection package unless you are
ready for installation. (Most electrostatic-sensitive devices will be packed with anti-static foam, foil or similar
conductive materials. And a lead wire to prevent short circuit.)
Please contact the core or circuit parts of the device to be installed with ESD protection package before carry
out the new electrostatic-sensitive devices from it. And make sure no power supply on the device and remember
other precautions.
Try to reduce body movements while assembling or disassembling electrostatic-sensitive devices. (Clothes
made of fabrics will build-up static by attrition. Feet lifts up from floor will also build-up static.)
5
Electrical Specifications
A Audio Section （MPEG-1 Layer Ⅱ, R. L Track Output）
No.
ITEM
UNIT
REQUIREMENTS
Test Environment
1
Audio Output Level
V
1.0～2.0
Output impedance is 10KΩ 1KHz 0dB
2
Frequency Characteristics
dB
+1/-2.0
20Hz-60Hz
0.5
60Hz-17.5KHz
+1/-3
17.5KHz-20KHz
3
S/N
dB
≥70
1KHz 0dB weighting
4
L/R Channel Separation
dB
≥60
N-CBAR100.TS f= 1KHz
P-CBAR75.TS
5
L/R Channel Level Difference
dB
≤0.5
60Hz-18KHz
6
Audio THD
%
≤1
60Hz-18KHz
7
Digital Coaxial Output Level
Vp-p
0.520%
75Ω Load
B Video (MPEG-2MP＠ML)
1
Output range
Video
Vp-p
1.015%
75Ω Load
Brightness/RGB
0.7±10%
Sync
0.308%
2
Frequency Characteristics (75Ω)
dB
0.5
0.5-4.8MHz
dB
≤+0.5/-1.0
4.8-5.0MHz
dB
≤+0.5/-4
5.0-5.5MHz
3
Brightness S/N
dB
≥56
WTD 5MHz
4
Chromatic S/N
dB
AM≥58
Load 75
PM≥51
5
Differential gain（DG）
%
≤5
Load 75
6
Differential phase（DP）
°
≤5
Load 75
7
Brightness non-linear distortion
%
≤5
Load 75
8
△τchrominance-luminance delay inequality
ns
≤30
Load 75
9
△K Chrominance-luminance Gain Inequality
%
≤5
Load 75
10
Brightness Waveform Distortion
%
≤3
Load 75
11
Chrominance Subcarrier Offset is not more than
Hz
200
Load 75
C Demodulation
1
Input Frequency Range
MHz
174~230MHz,470～862MHz (VHF/UHF)
2
Input Level Range
dBm
-75～-20
3
Frequency Offset
MHz
-0.4MHz~+0.74MHz
DPower Supply (~165-264V)
1
+5V
mA
2000
5%
2
+5V Active Antenna Amplifier
mA
30
5V overload protection
E Others
1
Free Fall
Meets QJ/ET08.02-2005 Standards
2
Remote Control Distance
M
≥8
In line
≥6
With range of 30°
3
Rated Power Consumption
W
8
6
Mechanical Exploded View Drawing
Mechanical Parts List
NO.
Part No.
Part Name
Qty
Notes
1
4101-1611-000H
Front Panel
1
Transparent ABS
2
4122-1611-000H
Buttons
1
ABS
3
D111-1716-000H
Bottom Cover
1
0,5mm cold-rolled sheet
4
B104-1635-701H
Decoding Board
1
5
4110-0777-000H
Top Cover
1
0,5mm cold-rolled sheet
6
3211-3008-0009
ST3*8PTTZc Screws
2
Main board/Bottom Cover
7
3211-3006-0005
ST3*6PWTTNi Screws
2
Top Cover/Bottom Cover
8
3211-3005-0002
ST3*5PTTZc Screws
1
Main board/Bottom Cover
9
C000-2000-1211
Feet Pad (Top)
2
Mid-density Sponge, Black
10
C000-2000-1212
Feet Pad (Bottom)
2
Mid-density Sponge, Black
7
Packaging and Accessories
Packaging Exploded View Drawing
Material List
NO.
Material No.
Name
Qty
1
4401-0777-000H
White Box
1
2
ST2.025.0521MXR1
User Manual
1
3
B301-1555-000H
Remote Control
1
4
4413-2312-2101
Bubble Bag 230*220mm
1
8
Appendix 1 Flowchart and Circuit Diagram
Flowchart
Wiring Diagram
Circuit Diagram of Decoding Board
Circuit Diagram of Control Board
9
MAIN POWER SUPPLY
(PN8136)
Decoder
ALI3812
HDMI
ON BOARD TUNER
(MxL603)
RF IN(75 ohm)
RF OUT(75 ohm)
AV(CVBS_AL/AR)
USB
Flowchart
10
Wiring Diagram
3 buttons
LED Display Window
11
.
R2100R
RXDSTRAPPIN10
.
BC28
0.01uF
.
BC4 33pF
.
BC32
0.01uF
.
R11
10K
47R
RN4
12
34
56
78
.
R13
NC/ 10K
.
R149 47R
.
R1100R
.
R5 20K
+TC8
10uF/10V/ 0805
VDDO
STD3V3
VDD33
VDDC ORE
STD3V3
STD3V3
TXDSTRAPPIN3 GPI O15
STD3V3
TVDAC3V3
ADAC_VD D
STD3V3
STD3V3
STD3V3
STRAPPIN1
STRAPPIN2
VDD33
SF_SO
SF_SCK
CEC
STRAPPIN5
CLK_N
CLK_P
SF_CS
SF_SI
EDDC _SDA
CH2_N
CH1_P
CH0_P
CH0_N
EDDC _SCL
CH2_P
CH1_N
16:9_EN
HTPLG
F_STANDBY
AUDI O_DR
MUTE
VDACOU T4
AUDI O_DL
USB2.0_D M
USB2.0_D P
IRRX
XDDRII _DQM1DDR II_D QM1
VDACOU T4
VDDO
XDDRII _A10
ADAC_VD D
XDDRII _A9
XDDRII _DQ6DDR II_D Q6
XDDRII _DQ1DDR II_D Q1
XDDRII _DQ9DDR II_D Q9
XDDRII _BA1
VREF
VDDO
XDDRII _DQS1DDR II_D QS1
AUDI O_DR
XDDRII _DQ14DDR II_D Q14
XDDRII _BA2
VDDC ORE
XDDRII _A1
XDDRII _A5
XDDRII _A7
XDDRII _DQ11DDR II_D Q11
XDDRII _DQSJ0DDR II_D QSJ0
XVREF_AUD
XDDRII _DQ4DDR II_D Q4
XDDRII _DQ12DDR II_D Q12
XDDRII _DQS0DDRII _DQS0
AUDI O_DL
XDDRII _DQ3DDR II_D Q3
XDDRII _BA0
XDDRII _A3
DDR II_R ASJ
VD33TMDS
VDDC ORE
XDDRII _A12
DDR II_W EJ
DDR II_C ASJ
DDR II_A4
DDR II_A2
DDR II_C K
DDR II_A0
DDR II_C KJ
XDDRII _DQ15D DRI I_DQ15
DDR II_A11
DDR II_A13
DDR II_A8
DDR II_A6
GND
DLLAVCC
F_STANDBY
F_SDA
F_SCL
F_SDA
F_SCL
VDACOU T3
SPDIF _OUT
SPDIF _OUT
.
R20 NC
F_SCL
F_SDA
GPIO17
M3812
U1
XRXADC _DVD 1
XRXPLLAVDD 2
XDVDD 3
XP_X27IN 4
XP_X27OUT 5
XDVSS 6
XVDDI O 7
XSFLASH_M ISO/XGPI O[0] 8
XSFLASH_C SJ/XGPI O[1] 9
XSFLASH_M OSI/XGPI O[2] 10
XSFLASH_SC LK/XGPIO[ 3] 11
XDFT _TM/XGPIO[4] 12
XVDDC ORE 13
XSPDIF /XGPIO[ 5] 14
XHTPLG/ XGPIO[6] 15
XSDA2/XGPI O[7] 16
XSCL2/XGPI O[8] 17
XHDM I_CLK_N 18
XHDM I_CLK_P 19
XHDM I0_N 20
XHDM I0_P 21
XHDM I1_N 22
XHDM I1_P 23
XHDM I2_N 24
XHDM I2_P 25
XVD10TX/ XVD33LDO 26
XVD33_HD MI 27
XVDAC_R EXT 28
XVDAC_OU T1 29
XVDAC_OU T2 30
XVDAC_VD DA 31
XVDAC_VSSA 32
XVDAC_OUT3
33
XVDAC_OUT4
34
XADAC_OL_P
35
XADAC_VREF
36
XADAC_OR_P
37
XVDD_ADAC/ XVDD IO
38
XVDDCORE
39
XDDR3_MA[2]/ DDR 2_MA[9]
40
XDDR3_MA[9]/ DDR 2_MA[12]
41
XDDR3_MA[13]/ DDR 3_ODT/DDR 2_MA[7]
42
XDDR3_MA[0]/ DDR 2_MA[5]
43
XDDR3_RESETJ/ DDR 2_MA[3]
44
XDDR3_MA[7]/ /DD R2_MA[1]
45
XDDR3_MA[5]/ DDR 2_MA[10]
46
XDDR3_MA[3]/ DDR 2_BA[0]
47
XDDR_BA[2]
48
XDDR3_BA[0] /XDDR2_BA[ 1]
49
XVDDCORE
50
XVREF
51
XVDDO
52
XDDR3_MD[4] /XDDR2_MD[ 3]
53
XDDR3_MD[6] /XDDR2_MD[ 4]
54
XDDR3_MD[2] /XDDR2_MD[ 1]
55
XDDR3_MD[0] /XDDR2_MD[ 6]
56
XDDR3_MD[11] /XDDR2_MD[ 12]
57
XDDR3_MD[9] /XDDR2_MD[ 11]
58
XVDDO
59
XDDR3_MD[13] /XDDR2_MD[ 14]
60
XDDR3_MD[15] /XDDR2_MD[ 9]
61
XDDR_DQM[1]
62
XDDR_DQS[ 0]
63
XDDR_DQSJ [0]
64
XDDR _DQS[1]
65
XDDR _DQSJ[1]
66
XVDDO
67
XDDR 3_MD[12]/XDDR 2_MD[ 15]
68
XDDR _MD[8]
69
XDDR 3_MD[14]/XDDR 2_MD[ 10]
70
XDDR 3_MD[10]/XDDR 2_MD[ 13]
71
XDDR _DQM[0]
72
XDDR 3_MD[3]/ XDDR 2_MD[ 7]
73
XDDR 3_MD[1]/ XDDR 2_MD[ 0]
74
XVDDC ORE
75
XDDR 3_MD[7]/ XDDR 2_MD[ 5]
76
XDDR 3_MD[5]/ XDDR 2_MD[ 2]
77
XDDR 3_CKE//XDD R2_ODT
78
XDDR 3_BA[1]
79
XDDR 3_MA[4]/XDDR2_M A[0]
80
XDDR 3_MA[6]/XDDR2_M A[2]
81
XVDDO
82
XDDR 3_MA[8]/XDDR2_M A[4]
83
XDDR 3_MA[11]//XDDR 2_MA[6]
84
XDDR 3_MA[1]/XDDR2_M A[8]
85
XDDR 3_MA[12]/XDDR2_M A[13]
86
XDDR 3_MA[10]/XDDR2_M A[11]
87
XDDR 3_SRASJ/DD R2_SCASJ
88
XDDR 3_SCASJ/XDD R2_SRASJ
89
XDDR _WEJ
90
XVDDC ORE_DPLL
91
XVD18_CLK
92
XDCLKOJ
93
XDCLKO
94
XVS33_DPLL
95
XVD33_DPLL/ XVDDI O
96
XUSB_DM 97
XUSB_DP 98
XUSB_REXT 99
XUSB_AVDD33TX 100
XPMU_CEC 101
XPMU_VDD IO 102
XPMU_PD 103
XIR_RX 104
XDFT_SE/XIR_RX/XGPIO[9] 105
XGPIO[31]/XCEC 106
XVSS 107
XVDDCORE 108
XEJ_TRSTJ/XSC2_PRESJ/XGPIO[10] 109
XEJ_TDI/XSC2_RST/XGPIO[11] 110
XEJ_TDO/XSC2_DATA/XGPIO[12] 111
XEJ_TMS/XSC2_POWENJ /XGPIO[13] 112
XEJ_TCLK/XSC2_CLK/XGPIO[14] 113
XUART_TX/XGPIO[15] 114
XUART_RX/XGPIO[16] 115
XVDDIO 116
XP_CRSTJ 117
XVDDCORE 118
XTSSI2_ERR OR/XGPIO[25] 119
XTSSI2_SY NC/ XGPIO[ 26] 120
XTSSI2_VALID /XGPIO[27] 121
XTSSI2_CLK/ XGPIO[28] 122
XTSSI2_DATA[1] /XGPIO[29] 123
XTSSI2_DATA[0] /XGPIO[77] 124
XGPIO[17] 125
XSDA/XGPIO[18] 126
XSCL/XGPIO[19] 127
XGPIO[20] 128
EP 137
EP 136
EP 135
EP 134
EP 133
EP 132
EP 131
EP 130
EP 129
EP 138
EP 139
EP 140
EP 141
EP 142
EP 143
EP 144
EP 145
EP 148
EP 149
EP 150
EP 151
EP 152
EP 153
EP 154
EP 155
EP 156
EP 157
EP 158
EP 159
EP 160
EP 161
EP 162
EP 163
EP 166
EP 167
H1
.
1
SSI2_D0
VDD18_C LK
DDR II_C KJ
DDR II_BA[ 0..2]
DDRII
DDR II_R ASJ
DDR II_D QS[0..1]
DDR II_D QSJ[0.. 1]
DDR II_D QM[0..1]
DDR II_C KJ
DDR II_C ASJ
DDR II_D Q[0..15]
DDR II_A[ 0..13]
DDR II_C K
VREF
DDR II_D QM[0..1]
DDR II_C K
DDR II_D Q[0..15]
DDR II_W EJ
DDR II_D QS[0..1]
DDR II_D QSJ[0.. 1]
DDR II_W EJ
DDR II_C ASJ
DDR II_BA[ 0..2]
DDR II_R ASJ
DDR II_A[ 0..13]
VREF
VDACOU T1
VDACOU T2
VDACOU T1
VDACOU T3
VDACOU T3
VDACOU T2
VDACOU T1
GPIO29
STD3V3
CN1
SIP-6PiN/ 2.0MM
1
2
3
4
5
6
Ferrite
.F B2
100M/120R/0603
Standby _LEDTDI
VDACOU T2
STD3V3
SPDIF _OUT
Standby _LED
IIC _SDA
IIC _SCK
DEMOD&Tuner I/F
ANT5V_ON_OFF
SSI2_D0
SSI2_CLK
SSI2_VALID
SSI2_SY NC
IIC _SCK
IIC _SDA
SSI2_CLK
SSI2_D0
GPIO25
GPIO15
SSI2_SY NC
SSI2_VALID
DEMO_RST
ANT_OVERLOAD 2
TV_MODE
TV_MODEGPIO20
PH2PH1
PH3 PH4
VDD33_D PLL
GND
TDI
TMS
TCLK
EJTAG Connector
STRAPPIN1
PMU_STANDBY
STRAP PIN
STRAPPIN5
STRAPPIN2
VD33TMDS
XDDRII _CKJ
HDMI POWER
XDDRII _A2
VDDC ORE
XDDRII _A8
XDDRII _A6
XDDRII _A13
XDDRII _A11
XDDRII _A0
XDDRII _A4
RXD
CH1_N
CH0_P
CH2_P
CLK_N
EDDC _SCL
TXD
CH1_P
CH0_N
CH2_N
UART
HTPLG
CLK_P
EDDC _SDA
HDMI
XOUT
VD10TX
IR
SF_SO
Crystal
VDD18_C LK
XDDRII _CK
FLASH I/F
XDDRII _WEJ
GND
SF_SI
SF_CS
TV_REXT
VDDO
PLL POWER
PMU33
USB_REXT
GND
XDDRII _DQSJ1DDR II_D QSJ1
SF_SCK
XDDRII _DQ7DDR II_D Q7
XDDRII _DQ5DDR II_D Q5
XDDRII _DQ0DDR II_D Q0
XDDRII _DQ2DDR II_D Q2
DDR II_A3
XDDRII _DQ13D DRI I_DQ13
DDR II_BA2
DDR II_BA0
XDDRII _DQM0DDR II_D QM0
DDR II_A5
DDR II_BA1
XDDRII _DQ10D DRI I_DQ10
DDR II_A1
DDR II_A10
USB_AVDD 33TX
VDDC ORE
VDDO
GND
XIN
GND
CEC
DDR II_A9
DDR II_A7
DDR II_A12
USB2.0_D M
CPUR STJ
GPIO25
VDDI O
IIC _SDASTRAPPIN9
IIC _SCKSTRAPPIN8
USB2.0_D P
CEC
VDDC ORE
TRSTJ
VDDC ORE
SSI2_SY NC
SSI2_VALID
TMS
TCLK
TDI
SF_CS
SF_SISTRAPPI N5
VDDI O
SSI2_CLK
TDO
SF_SOSTRAPPI N2
GND
DVDD
XOUT
XDVSS
TV_MODEGPIO20
XIN
VDDC ORE
SF_SCKSTRAPPI N1
DLLAVCC
HTPLG
EDDC _SDA
TV_REXT
CH0_N
CLK_N
CH1_N
VD10TX
CH2_P
EDDC _SCLSTRAPPI N11
VD33TM DS
CH1_P
VDDI O
CLK_P
CH0_P
TVDAC 3V3
DFT _MDSTRAPPI N4
CH2_N
IR
Scart
USB
USB_REXT
CPUR STJ
System Reset
FRONT PANEL I/F
USB2.0_D P
16:9_ENTRSTJ
XDDRII _DQ8DDR II_D Q8
AV I/F
USB_AVDD 33TX
USB2.0_D M
VDACOU T4
F_STANDBY
XDDRII _RASJ
AUDI O_DL
AUDI O_DR
GPIO29
GND
XDDRII _CASJ
VDDI O
.
BC9
0.1uF
.
C23
0.1uF
.
C17
0.1uF
.
BC8
0.1uF
.
BC18
0.1uF
.
BC10
0.1uF
VDDO
.
BC75
0.1uF
.
BC21
0.1uF
.
C78
0.1uF
.
C64
0.1uF
.
C24
0.1uF
.
C65
0.1uF
.
BC24
0.1uF
.
C61
0.1uF
VDDC ORE
STD3V3 VDDO
.
R34
4.7K
TVDAC3V3TVDAC3V3
DVDD
Title
Size Document Num ber Rev
Date: Sheet of
DB-M3812-T2-01V01 1.0
M3812
C
310Monday, Nov em ber 04, 2013
XDVSS
TDO
TRSTJ
Video DAC
XVREF_AUDADAC_VD D
.
BC2
100pF
RN2
47R
12
34
56
78
.
R16 15K 1%
.
BC38
0.1uF
.
R39 0R
.
BC27
0.1uF
.
BC1
1uF
.
R14
10K
.
BC68
4.7uF/ 10V/0603
+TC11
47uF/10V
+TC13
10uF/10V
RN1
47R
1 2
3 4
5 6
7 8
.
BC30
0.1uF
.
R150 47R
Ferrite
.F B7
100M/120R/0603
.
R12
10K
.
R6 4.7K
.
BC5 33pF
.
BC29
0.1uF
.
R160 0R
+TC5
47uF/10V
.
R7 4.7K
RN3
47R
1 2
3 4
5 6
7 8
.
Y1
27M
.
R206
12.1K
.
R8
1M
.
BC58
0.1uF
.
BC69
10uF/10v / 0805
+TC12
NC(4. 7uF/10V/ 0805)
.
BC3
0.1uF
.
BC33
0.1uF
GPIO17
.
R151 47R
.
R947R
.
R447R
.
R347R
.
BC25
0.1uF
Decoding Board Schematic Diagram (1)
12
.
R211K
.
R2510K
.
R23470R
.
R2710K
VDDO
VDDO
W9751G6KB-18/64Mby tes /BGA84
U2
VDD
A1
NC
A2
VSS A3
VSSQ A7
UDQS
A8
VDDQ
A9
DQ14
B1
VSSQ B2
UDM
B3
UDQS
B7
VSSQ B8
DQ15
B9
VDDQ
C1
DQ9
C2
VDDQ
C3
VDDQ
C7
DQ8
C8
VDDQ
C9
DQ12
D1
VSSQ D2
DQ11
D3 DQ10
D7
VSSQ D8
DQ13
D9
VDD
E1
NC
E2
VSS E3
VSSQ E7
LDQS
E8
VDDQ
E9
DQ6
F1
VSSQ F2
LDM
F3
LDQS
F7
VSSQ F8
DQ7
F9
VDDQ
G1
DQ1
G2
VDDQ
G3
VDDQ
G7
DQ0
G8
VDDQ
G9
DQ4
H1
VSSQ H2
DQ3
H3 DQ2
H7
VSSQ H8
DQ5
H9
VDDL
J1
VREF J2
VSS J3
VSSDL J7
CK J8
VDD
J9
CKE K2
WE K3
RAS K7
CK K8
ODT K9
NC, BA2
L1
BA0
L2
BA1
L3
CAS L7
CS L8
A10/AP M2
A1 M3
A2 M7
A0 M8
VDD
M9 VSS N1
A3 N2
A5 N3
A6 N7
A4 N8
A7 P2
A9 P3
A11 P7
A8 P8
VSS P9
VDD
R1
A12 R2
NC, A14 R3
NC, A15 R7
NC, A13 R8
(1066)
DDR II_CKJ
DDR II_CKE
DDR II_A13
DDR II_CK
DDR II_ODT
DDR II_CSJ
DDR II_DQ8
DDR II_DQ9
DDR II_DQ10
DDR II_DQ11
DDR II_DQ14
DDR II_DQ12
DDR II_DQ13
DDR II_DQ5
DDR II_DQ2
DDR II_DQ6
DDR II_DQ1
DDR II_DQ4
DDR II_DQ0
DDR II_DQ3
DDR II_DQ15
DDR II_BA0
DDR II_BA2
DDR II_BA1
DDR II_DQ7
DDR II_DQM1
DDR II_DQSJ 0
DDR II_DQM0
DDR II_DQS0
DDR II_DQS1
DDR II_DQSJ 1
DDR II_A11
DDR II_CASJ
DDR II_A5
DDR II_A8
DDR II_WEJ
DDR II_A0
DDR II_A1
DDR II_A12
DDR II_A4
DDR II_A7
DDR II_A10
DDR II_A2
DDR II_A6
DDR II_RASJ
DDR II_A9
DDR II_A3
VREF
DDR II
32x16=512MBit/8=64Mbytes
DDR II_CKJ
DDR II_BA[0. .2]
DDRII
VREF
DDR II_RASJ
DDR II_DQS[ 0..1]
DDR II_DQSJ [0.. 1]
DDR II_DQM[0. .1]
DDR II_CKJ
DDR II_CASJ
DDR II_DQ[ 0..15]
DDR II_A[0. .13]
DDR II_CK
DDR II_DQM[0. .1]
DDR II_CK
DDR II_DQ[ 0..15]
DDR II_WEJ
DDR II_DQS[ 0..1]
DDR II_DQSJ [0.. 1]
DDR II_WEJ
DDR II_CASJ
DDR II_BA[0. .2]
DDR II_RASJ
DDR II_A[0. .13]
VREF
L34 FB60R/ 0805
USBDM U SB_DM
USBDP U SB_DP
USB HOST
USB
5V
USB_5V
C73
0.1uF
+
C67
220uF/10V
USB_5V
J5
USB-MINI -AB
+5V 1
D- 2
D+ 3
ID 4
GND 5
SHLD 6
.
BC34
0.1uF
.
R19
1.8K
.
R26
10K
.
C86
4.7uF/ 10V/0603
.
R130 4.7K
HTPLG
.
R128 4.7K
.
C53
0.1uF
.
C75
0.1uF
.
C54
0.1uF
J1
HDMI
DETECT 19
+5V 18
GND 17
SDA 16
SCL 15
NC. 14
CEC 13
CLOCK- 12
GND 11
CLOCK+ 10
DATA_0- 9
GND 8
DATA_0+ 7
DATA_1- 6
GND 5
DATA_1+ 4
DATA_2- 3
GND 2
DATA_2+ 1
GND
20 GND
21 GND
22 GND
23
E12
NC/ ESD-6VP8U
11
10 10
22
99
44
77
55
66
3
3
8
8
.
R22
1K 1%
.
R18
1.8K
.
C85
0.1uF
.
R24
1K 1%
U7
GD25Q32BSIG
CS#
1
SO
2
W#
3
GND
4SI 5
SCK 6
HOLD# 7
VCC 8
.
C87
4.7uF/ 10V/0603
E13
NC/ ESD-6VP8U
11
10 10
22
99
44
77
55
66
3
3
8
8
.
BC57
0.1uF
5V
STD3V3
VDDO
5V
SF_SCK [ 3,7]
SF_SO [3, 7]
EDDC _SDA[3]
SF_SI [3, 7]
SF_CS [ 3]
EDDC _SCL[ 3,7]
CH2_N[3]
CH2_P[3]
CLK_N[3]
CLK_P[ 3]
CH0_N[3]
HTPLG[3]
CH1_P[3]
CEC[3]
CH0_P[3]
CH1_N[3]
CH0_NCH0N
STRAPPIN5
STRAPPIN2
STRAPPIN1
STRAPPIN2
STRAPPIN5
STRAPPIN1
.
R163 33R
.
R162 33R
EDDC _SDA
EDDC _SCL
HDMI
CH1_N
CH2_N
CH1_P
CEC
HTPLG
EDDC _SDA
CLK_N
CLK_P
CH2_P
CH0_P
EDDC _SCL
CH0_N
Receptacle
CH2N C H2_N
CH1P C H1_P
CH2P C H2_P
CH0P C H0_P
CH1N C H1_N
CEC
CH2P
CLKN
CH1P
CH2N
CH0N
D_HTPLG
CLKP
CH1N
CH0P
.
R37 NC /4.7K
.
R38 30K
.
R43 4.7K
.
R41 4.7K
JUMPER2
不插
为L
STD3V3
JP1
NC/ JUMPER2
1 2 CPU_PROBE_EN:default L
MEM_CLK_SEL:default H
STRAPPIN2
EROM_EN:default L
STRAPPIN1
Strap_Pin
STRAPPIN5
.
BC52
0.1uF
.
C59
0.1uF
.
C60
0.1uF
.
C11
0.1uF
.
C81
0.1uF
.
BC48
0.1uF
CLK_PC LKP
VREF
VDDO
SF_SI
SF_CS
SFLASH
SF_SCK
SF_SO
SF_SI
SF_CS
SF_SCK
SF_WJ
SF_HOLD J
CLK_NCLKN
SF_SO
Title
Size Docum ent Number Rev
Date: Sheet of
DB-M3812-T2-01V01 1.0
DDR _HDMI_USB_St rap-pin
C
410Monday , Nov ember 04, 2013
USB2.0_D P
USB2.0_D M
Decoding Board Schematic Diagram (2)
13
RGB OUT (1-3V)
STB StandBy
GPIO
0
CVBS OUT (0V)
TV_M ODE
MODE
1
0
P12V
F_STANDBY Q17
NC(2N 3904)
1
2 3
TV_SB
16:9_EN Q18
NC/ 2N3904
1
2 3
HIGH: 16:9 OUT(5-8V)
R131
NC(10K)
R141
NC(1K)
LOW: 4:3 OUT(9.5-12V)
R144 NC (10K)
R145
NC(1. 8K)
STD12V
Q22
NC(2N 3906)
1
2 3
TV Drive CTRL
F_STANDBY[3,4]
R146
NC(10K)
JK1-5
RCA_R _OUT
RCA_L_OU T
R1350R
RCA JACK
OPTION
AUDI O_DR
AUDI O_DL
AUDI O_DR
Audio LINE-OUT
MUTE
AUDI O_DL
R132
5.1K
C197
2.2uF/ 0603
R114
100K 5V_AMP
C200
390pF
R139
220K
GND
GND
R248
100K
5V_AMP
C204
390pF
UVP>1.15V
R249
220K
C205
6.8pF
R250
5.1K
R56 3K
GND
R58 1.2K
GND
GND
GND
R170
33R
LINE_OU T_L
R251
33R
C201
1000pF
C209
1000pF
RCA_R _OUT
GND
GND
C109
0.33uF
RCA_L_OU T
LINE_OU T_R
R171
10K
EN>1.2V
R252
10K
5V_AMP
From AudioDAC
GND
C146
0.33uF
To RCA
GND
C120
0.1uF
C210
6.8pF
-
+
+
-
U6
SGM8905
-IN1
1
OUT1 2
UVP 8
EN 3
PVSS
4CN 5
CP 6
PVDD
7
OUT2 9
-IN2
10
EPAD_GND
11
C147
10uF/10V/ 0805
C211
2.2uF/ 0603
R176
2K
R174 1K
JK4
NC/ AV-8.4-13
1
2
.
C149
NC/ 100pF
.
C148 NC /1uF
.
R51
NC/ 200R
.
R50 NC /33R
.
R52
NC/ 120R
SPDIF
SPDIF _OUT
close to
SOC
SPDIF _OUT SPDI F_OUT
.
R207
NC/ 10K
.
R214
NC/ 47R
Q8
NC/ 2N3904
1
2 3
.
R215
NC/ 10K
TV_FB
TV_MODE
STD3V3
CVBS/RGB
Title
Size Doc ument Num ber Rev
Date: Sheet of
DB-M3812-T2-01V01 1.0
AV
C
510Saturday , Nov em ber 02, 2013
TV_FB
CVBS_OUT
R93 75R
VDACOU T4[3]
.
R219
10K
+
TC4
330uF/10V
CVBS_OUT
16:9_EN
TV_SB
CVBS_OUT
YBLUE
SPDIF
PbGREEN
PrRED
TV_MODE
16:9_EN
RCA_R _OUT
Pr RED
RCA_L_OU T
Y BLUE
RCA JACK
CVBS_OUT
Pb GREEN
R L
Y/Pb/Pr,CVBS,L/R OUTPUT
Pr Pb CVBS
JK1
AV6-8.4-14
4
2
6
9
7
1
8
3
5
Y
.
R80 0R/ 0603
5V
16/9EN
(4.5V~7V)
0
TV (0V)
0
MODE
GPIO
JK3
NC(D 21-15(金佳
电子
)TV-SCART)
AOR
1
AIR
2
AOL
3
GND
4
GND
5
AIL
6
B
7
FUNC
8
GND
9
DATA 2
10
G
11
DATA 1
12
GND
13
GND
14
R
15
RGB C
16
GND
17
GND
18
VOUT
19
VIN
20
SHIELD
21
GND
22
GND
23
16:9
TV_DRIVE
0(9.5V~12V)AV
X
1
default
1
.
R153 NC /75R
.
R173 NC /75R
.
R152 NC /75R
Pb GREEN
Pr RED
VDACOU T1[3]
VDACOU T2[3]
VDACOU T3[3] Y BLUE
Decoding Board Schematic Diagram (3)
14
.C236
0.1uF
DEMO_1V2 VDD1.2V_Demod
TUN_SCL
TUN_SDA
TUN_AGC TUN_AGC
TUN_SDA
DEMO_RST
TUN_SCL
DEMO_RST
IIC_SCK
SSI2_D0
DEMOD I/F
IIC_SCK
SSI2_SY NC
IIC_SDA IIC_SDA
SSI2_VALID
SSI2_CLK SSI2_D0
TUNER I/F
SSI2_CLK
SSI2_SY NC
SSI2_VALID
.
R3133R
.
C227
NC/10pF
SSI2_CLK
.
R32
2.2K
.
R36
2.2K
DEMO_RST
VDD1.2V_Demod
VDD3V3_Demod
RESET_Demod
VDD1.2V_Demod
TUN_SCL
TUN_SDA
VDD3V3_Demod
.
BC36
0.1uF
.
R42 NC/0R
.L30 120nH
.
BC39 0.01uF
.
BC62
0.1uF
.
BC61
0.1uF
R45
510K
.
BC65
0.1uF
.
BC64
0.1uF
.
BC42
0.01uF
.
BC60
0.1uF
.
BC40
0.1uF
.
BC41 0.1uF
.
R28 10k
.
R35
2.2K
.
BC37
1uF
TS_MOSVALA
.
BC53
0.1uF
.
R33
2.2K
.
BC47
0.1uF
.
BC45
0.1uF
.
BC56 0.1uF
TS_MDO0
.
BC55 0.1uF
IF-9
.
BC67 33pF
XI
XO
.
BC66 33pF
.
Y4
20.48MHz
.
BC54 0.1uF
TUNER_SDA
TS_MOCLK
.
R40 10K(1%)
.
BC35
0.1uF
U9
MN88472
TSD03 1
TSD04 2
TSD05 3
TSD06 5
VSS 4
VDDH 6
TSD07 7
VDDL 8
SADR 9
VSS 10
SCL 11
SDA 12
VDDL 13
NRST 14
CSELO 15
GP0 16
VSS 17
INT 18
VDDL 19
TEST0 20
SHVPP 21
TEST1 22
SHVDDH 23
TEST2 24
VDDL 25
TEST3 26
VSS 27
VDDH 28
XI 29
XO 30
VDDL 31
VSS 32
AVSS
33
AIP
34
AIN
35
AVDD
36
VRB
37
VRT
38
IR
39
TCP0
40
XOUT
41
VDDL
42
MSDA
43
VSS
44
MSCL
45
VDDL
46
VDDH
47
AGCR
48
AGCI
49
VSS
50
HDVPPO
51
PCK
52
DEN
53
VDDL
54
TSCK
55
TSD00
56
VDDH
57
HDVDDH
58
TSD01
59
VSS
60
TSD02
61
HDVP1
62
VDDL
63
VSS
64
EPAD
65
TUNER_SCL
.L31 120nH
IF+9
VDD3V3_Demod
.
BC63
0.1uF
IF line: the shortest line,same length,
line width >0.5mm
VDD3V3_Demod
ADC bias current
resistor
IR pin resistance, tolerance is less than
1.0%, Ref: Panasonic: ERJ2RKF1002 (0402)
TUN_AGC9
LPF near the Demod
.
BC51 0.1uF
VDD3V3_Demod
.
BC49 0.1uF
.
BC44 0.1uF
TS_MOSTART
.
R44 0R
.
BC43 0.1uF
.
BC46 0.1uF
.
R46
NC/2.2K
Ferrite
.
FB6
100M/120R/0603
.
BC59
NC/10pF
VDD1.2V_Demod
DEMO_SDA
VDD3V3_Demod
VDD1.2V_Demod
.
BC50
1uF
TUNER_SDA
VDD1.2V_Demod
VDD3V3_Demod
VDD3V3_Demod
VDD1.2V_Demod
VDD1.2V_Demod
VDD3V3_Demod
VDD1.2V_Demod
VDD1.2V_Demod
DEMO_SCL
.
C228
100PF
IIC_SCK
IIC_SDA
.
C229
100PF
.
R2933R
.
R3033R
IIC_SCK
TS_MOSTART
TS_MOSVALA
TUNER_SCL
IIC_SDA
SSI2_SY NC
SSI2_VALID
SSI2_D0TS_MDO0
TS Interface
SSI
TS_MOCLK
TC2
100uF/10V
Ferrite
.
FB5
100M/120R/0805
STD3V3
VDD3V3_Demod
.
C230
0.1uF
.
C231
1000pF
VDD3V3_Demod
.
R1033R
.
R1533R
.
R1733R
Decoding Board Schematic Diagram (4)
15
RF_I N
RF_I N
C117
NC/ 10uF/10V/ 0805
P5V
ANT_5V
R196
10K
R190
10K
R186
100K
R188
1R5/0805
R187
1K
R189
10K
Q26
8550
3
1
2
Q28
2N3904
SOT-23
32
1
R192
1.3K
Q27
2N3906
3
1
2
GND
R193
10K
ANT_OVERLOAD 2
C114
0.1uF ANT5V_ON_OF F2
ANTENA 5V CONTROL
GND
I2C_SD A_TUN_M
.
BC6
NC/ 6.8pF
IF_AGC _DN_TUN _M
Vdd_3.3V_Tuner Vdd_1.8V_Tuner
Vdd_1.8V_Tuner
Vdd_3.3V_Tuner
.
C283 4700pF
.
C285 4700pF
.
BC11
0.1uF
.
L4
0R/15nH
.
L3
0R/15nH
.BC17
NC/ 2pF
T2
ATB2012_75011
12
43
.
L2
NC/ 2.2nH
.
C287 1000pF
.
C282 1000pF
.
BC13
4700pF
U4
MxL603
GND1
1
LNA_IN P
2
LNA_IN N
3
VDD_1p8_1
4
GPO
5
AGC
6
AS
9
RESET_N
10
VDD_3p3_2
11
VDD_1p8_2
12
VDD_1p2 13
GND_D IG 14
VDD_I O 15
SCL 16
SDA 17
CLK_OUT 18
XTAL_N 19
XTAL_P 20
VDD_1p8_3 21
VDD_3p3_1 22
LT_AC_GND 23
LT_OUT 24
GND2 25
IF_OUTP
7
IF_OUTN
8
DIF _IP_N
.
C288
0.1uF
DIF _IM_N
.
BC12
4700pF
.R48
0R
.
BC16
0.1uF
.
BC22
560pF
.
BC20
0.1uF
.
BC19
0.1uF
.
BC26
22pF .
BC23
22pF
I2C_SC L_TUN_M
.
Y5
16MHz
.
R47
0R
Optional components
of wifi filter
75 ohm Line
R49
510K
Vdd_3.3V_Tuner
BC31
1uF
RESET_N1
Vdd_1.8V_Tuner
L1
270 nH/HQ
FB10
BLM18HK331SN1D
C1
0.1uF
AS
.
BC15
0.1uF
I2C_SD A_TUN_M
TUN_SCL
TUN_SDA
I2C_SC L_TUN_M
R62
100R C203
22pF
C202
22pF
R63
100R
Close to tuner
R167
1K
0402C
I2C Dem od to Tuner
IF_AGC _DN_TUN _MTUN_AGC
C208
0.1uF
0402C
Close to tuner
AGC CIRCUIT
IF-
IF+
TD2
BAV99
.
BC14
1uF
ANT_5V
TUN_SCL
TUN_SDA
.
BC7
NC/ 6.8pF
Low-pass filter for filtering
PWM signal from demod
TUN_AGC
C101
10uF/10V/ 0805
FB4
120ohm@100MHz/0805
Vdd_3.3V_Tuner
C195
0.1uF
C179
10nF +
C69
220uF/10V
P3V3
RFout
.
C278 4700pF
.
C280 4700pF
.
R90
0R
TD1
BAV99
FB1
120ohm@100MHz/0805
RF_LOOP
RF_LOOP
Title
Size Doc ument Num ber Rev
Date: Sheet of
DB-M3812-T2-01V01 1.0
Mxl603 on board tuner
C
710Saturday , Nov em ber 02, 2013
JK5
WJ01-03(屏蔽罩)
11
5
53
34
4
22
6
6
7
7
8
8
2-IN 1-O
C118
10uF/10V/ 0805
Decoding Board Schematic Diagram (5)
16
P5V
C52
10uF/10V/ 0805(Ceramic )
BC71
0.1uF
VDDO=1.8V
L35
SD43-4R7MC 4.7uH /1.7A
BC70
47nF
Scart control
SY8022
STD12V(12mA)
DDRII Power
1.2V(350mA)
1.5V(900mA)
MOSFET
Power
Line
Device
demod(MN88472)
control
line
Power
Connector
SY8009B
DC-DC
STD5V(50mA) HDMI
5V
5V
Audio amp circuit
DC-DC
STD5V(30mA)
MOSFET
SI2323
SY8133
one way
0.6A
protect
SY6288AAAC
USB_VDD5(500mA) USB
IO, Flash, Spdif,
Panel, Tuner,
3.3V(10mA)
MOSFET STD3V3(400mA)
SI2323SY8009
DC-DC PMU,IR
5V
5V
Core Power
12V(800mA)
DC-DC
5V(1500mA)
Standby
Control
1.05V(500mA) Core Power
0:power on
1:power down
float:power
off
VDD33
.
R226
NC/ 2K
Q20
2N3904
1
2 3
VCC3.3V_PD
.
R227
10K
SOC_STANDBY
Q21
Si2323DS
1
32
.
R225
10K
STANDBY POWER
.
C49
1uF
.
R229
100K
5VP5V
12V
VDD33
5V_DCD C
STD3V3
F_STANDBY[3,4]
+
C4
100uF/10V
C154
0.1uF
STD3V3 DEMO_1V2
U5
AMS1117_1V2/SOT223
IN
3OUT 2
OUT 4
ADJ
1
DEMOD VDDCORE
Title
Size Docum ent Number Rev
Date: Sheet of
DB-M3812-T2-01V01 1.0
POWER ON BOARD
C
910Monday, Nov em ber 04, 2013
.
C31
0.1uF
.
C62
10uF/10V/ 0805
.
C115
22pF
.
C63
10uF/10V/ 0805
.
R140 1K
U15
APS2408ES5-ADJ
EN
1
GND
2
LX 3
VIN
4
NC 5
FB 6
.
R142
33K 1%
.
R208
100K
.
R143
150K 1%
P3V3
P5V
IO POWER STANDBY _CONTROL
+TC3
47uF/10V
P12V
.
R217
100K
F_STANDBY
[3,4]
.
R218
100R
L27
SD43-4R7MC 4.7uH /1.7A
.
C29
47nF
R61
200K 1%
C33
22pF
BC74
0.1uF
BC73
0.1uF
R64
100K 1%
C35
22pF
VDDO
R66
NC
VDDC ORE
R60
150K 1%
1V
P5V
R67
220K 1%
U8
APS2408ES5-ADJ
EN
1
GND
2
LX 3
VIN
4
FB 6
NC 5
C46
10uF/10V/ 0805(Ceramic )
C47
10uF/10V/ 0805(Ceramic )
BC72
0.1uF
+C2
100uF/10V
R70
1M
DDR POWER
L29
SD43-4R7MC 4.7uH /1.7AU10
APS2408ES5-ADJ
EN
1
GND
2
LX 3
VIN
4
FB 6
NC 5
C51
10uF/10V/ 0805(Ceramic )
+
TC6
100uF/10V
CORE POWER
Decoding Board Schematic Diagram (6)
17
！
！
PC2
NC/15uF 450V
！
L28
68mH
1
32
4
PC22
10uF 400V
PC14
1000uF/10V
PL7
NC/24mH
1
32
4
C91
0.1uF
PC15
1000uF/10V
PC16
NC(47uF/25V)
PC17
104/50V/0603
PC18
27nF/50V/0603
PR14 0R/0603
PR15
0R
！
PF2
T1AL250V
！
PX2
3P/3.96
1
2
PT2
KB1341-17855
1
3
4
5
6
7
8
9
10
2
PD14
FR104
PR16
22R/0603
！
PIC3
BPC-817B
1
23
4
PC20
2.2nF /630V_tery lene
PR17
100K/1W
PC21
0.22uF
PIC4
TL431
1
2 3
PD15
FR107
PR18
10K
PC23
222/400VAC
PR19
300R
PR20
10K
！
PD17 NC(F R104)
！
！
+
TC10
10uF/50V
PR22
10K
PC25
4.7uF/400V
PIC6
PN8106
GND
1
VDD
2
CTRL
3
COMP
4NC 5
NC 6
SW 7
SW 8
PR24
200K
PD18 1N5822
PR25
330R/0603
！
C135
0.1uF
L5
10uH/1.5A
P12V
P5V
P5V
C94
NC(0.1uF)
IN4007
PD12
PD10
IN4007
PD11
IN4007
PD13
IN4007
Decoding Board Schematic Diagram (7)
18
SW1
SW
24
13
POWER DT
Q24
2N3904
1
2 3
GND
VDD33
POWER ON
LED5
G/R
STANDBY
R165
1K
1 2
LED
R166
120R
1 2
R169 10K
12
+TC14
10uF/10V
Standby _LED Standby _LED
Title
Size D ocument Number Rev
Date: Sheet of
DB-M3812-T2-01V01 1.0
PANEL
B
810Saturday , N ov ember 02, 2013
IRRX
IR
.
C232
330pF
.
R116 1K
VDD33
.
R112
10R/R0603
.
R117
33K
IRRX
FRONT PANEL PORT
U12 IRM-3638T
OUT 1
GND 2
VCC 3
VDD33
DIG4 SEG7
DIG2
DIG3
LED2
4HR40285B1001/共阴
Dig1
1
A2
DP 3
F4
C5
Dig2
6
E7
D8
Dig3
9
B10
G11
Dig4
12
DIG1
SEG6
DIG4
DIG3
DIG2
DIG1
SEG6
SEG5
SEG3
SEG4
SEG2SEG1
DP
SEG7
SEG5
DP
SEG1
SEG4
SEG3
C55
0.1uF
12
SEG2
U3 FD650S
DIG1
1
CLK
2
DAT
3
GND
4
DIG2
5
DIG3
6
DIG4
7
A/KI1
8B/KI2 9
VCC 10
C/KI3 11
D/KI4 12
E/KI5 13
F/KI6 14
G/KI7 15
DP/KP 16
FB32
0R/120R 100M/0402
.
R99
NC/0R
FP_SCL
SEG2
.
R100 2K/NC
FP_SDAFP_SCL
FP_SDA
FB26
0R/120R 100M/0402
.
R96
4K7
STD3V3
.
R95
4K7
F_SDA
F_SCL
SW3
SW
2 4
1 3
SW2
SW
24
13
.
C233
NC/100pF
.
R97
NC/0R
DIG4
SEG1
FB27
0R/120R 100M/0402
CH+ CH-
KEY
.
R98
NC/0R
Decoding Board Schematic Diagram (8)
19
Appendix 2 Silkscreen of PCB
Silkscreen of Decoding Board Top
Silkscreen of Decoding Board Bottom
PCB Diagram of Decoding Board Top
PCB Diagram of Control Board Bottom
20
Silkscreen of Decoding Board Top
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